Let's use the native_posix entropy driver by now,
as the real target relies on the PSA one, and we
currently do not have plans to include that.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This is not yet possible.
So let's add a check that provides an easy to understanding
error message instead of a bunch of kconfig and build warnings.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
These tests run fine in this board, let's provide an
overlay and enable them.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Misc fixes for the grtc timer driver:
* In non tickless mode:
* The tick time would drift a bit with each interrupt
* If something would cause a very significant delay
in handling the tick interrupt the number of announcements
would be incorrect
* Fortickless mode: The calculation of the next tick time
in sys_clock_set_timeout() was incorrectly done,
resulting in two spurious, too early, wakes of the kernel
before each correct wake. This caused tests/kernel/context/
to fail.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
* Update the HW models module to
5d638052c9fe1ef3bd7638067354eba4d3f2fa78
Including the following:
* 5d63805 Makefile: Also build NRF54L15 models by default
* 0154337 GRTC: Add model
* ecd2a01 PPIB: Add model
* 086fe1e hal: hack: Add initial nRF54L15 support
* 384f29d zephyr integration: Add support for nRF54L15
* b17fffc hal: Include new peripherals hals in static hal version
* 67fc961 TEMP: Add nrf54L15 reset values
* 4fd6b6f docs: HW impl. status: Add nrf54L15
* 30f7a7b nrf54L15: Initial HW models with reused peripherals
* 6150de0 TIMER: Add support for CLK freqs != 16MHz
* 4b245cd IRQ controller: Fix typo
* 0b0ab3a irq_ctrl: Support more than 64 interrupts
* 86800c9 Override HAL type qualifiers to remove const
* d2433a1 Make: Add basic infra for NRF54L15
* 3ec8f66 nrf_hack: Reorganize header in preparation for the nrf54 plat
* 9f1f473 DPPI types: Use 54 like NRF_DPPI names
* ed8f9b7 Make: Provide a reasonable default for BSIM_COMPONENTS_PATH
* e55aaff RADIO: Add an explicit check to silence a build warning
* 7630b69 RADIO: Make function declaration prototype
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The new kconfig options intend to represent a final
nRF54L product, let's handle them appropriately.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
In preparation for simulated nRF54L targets,
let's add kconfig options aking to the ones
we have for the nRF52 and 53 devices.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Move it to a common file named `zephyr,memory-common.yaml`, which
replaces `zephyr,memory-attr.yaml` and takes its contents as well.
This is so that another binding, e.g., `vnd,memory-region`, can support
being combined with the `zephyr,memory-region` binding like so:
node@deadbeef {
compatible = "vnd,memory-region", "zephyr,memory-region";
zephyr,memory-region = "NAME";
...
};
To allow this, edtlib would require `vnd,memory-region` to include the
property definitions from this new common file.
The same can't be done by including `zephyr,memory-region.yaml` directly
because that file marks the property in question as always required, and
it shouldn't be required whenever the `vnd,memory-region` compatible is
used on its own.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Add the Kconfig options and use the aliased
addresses for the bootcode regions of the IMX7D
and IMX6SX SOCs to allow the Linux rproc
framework to load the irq-vectors into
the correct memory areas.
Activating this option might enlarge the bin
file if the zephyr,flash and rom_start chosen
region addresses are not matching.
It is up to the user to enable this feature
based on code location choices (OCRAM, DDR, TCM...).
Signed-off-by: Jérémy LOCHE - MAKEEN Energy <jlh@makeenenergy.com>
In order to support Linux rproc loading, some SOCs require
the boot-vector and irq-vectors to be placed into a defined
memory area for the mcu to boot.
This is necessary for NXP's IMX SOCs for instance but
can be leveraged by other SOCs that have multiple
zephyr,flash choices.
Signed-off-by: Jérémy LOCHE - MAKEEN Energy <jlh@makeenenergy.com>
By default, the QSPI region is marked as EXTMEM and inaccessible
(see #57467), mark the first 64MB as IO on stm32f769i_disco.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
According to the datasheet, fRSCLK (Clock Frequency for READ instructions)
is 66MHz; it doesn't mention 72MHz anywhere.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This puts the QSPI peripheral into memory-mapped mode when
CONFIG_STM32_MEMMAP is set. Writes and erase put it back into indirect
write mode.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This CONFIG_STM32_MEMMAP is for enabling the MemoryMapped mode
on external octo or quad spi memory.
In this case, the flash_stm32_read is done in mem map mode
the flash_stm32_erase is not available.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When CONFIG_USB_DEVICE_STACK=n then the sine wave
generator was enabled, which caused build errors.
This commit fixes those errors and also adds the
nRF5340 as a build target for the USB tests.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Align SYS_CLOCK_HW_CYCLES_PER_SEC with other SMP nSIM
configurations and set it to 1000000.
This significantly reduce verification time on HS5x platforms.
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Access to this region should no longer be requested via UICR, because it
will be statically reserved by secure domain firmware.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
PR #72100 broke execution of unit type tests. This commit fixes
it by bringing back the "old" logic for selecting a binary path
for unit type tests.
Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
Check if the driver is suspended in gpio_keys_change_deferred(), this
avoids a potential situation where a race condition could try and read
from a pin that has just been disconnected.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Since a long is 64-bits on 64-bit architectures, and 32-bits
on 32-bit architectures, we can simplify the definition of
PRIQ_BITMAP_SIZE by defining it in terms of BITS_PER_LONG.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
The gpio-emul driver does not actually require any reg property,
since it is not in the physical memory map of any device. So
let's remove that property from the bindings.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
When a sensor that depends on an ADC is enabled in devicetree, enable
the ADC subsystem. ADC is roughly equivalent to a bus for these sensors
(the mechanism through which data is transferred), which had the same
conversion applied in #48707.
The same benefits apply here, namely removing the need for the following
pattern in board `.kconfig` files:
```
configdefault ADC
default y if SENSOR
```
Signed-off-by: Jordan Yates <jordan@embeint.com>
Some stm32 devices with quadspi (like stm32l47x or stm32l48x)
does not support Dual-Flash Mode. Avoid building error even if
the &quadspi node has a <flash-id> property defined.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The mic_state is a guarded field in event_done_extra where it was
accessed outside of its guard.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Remove all CAN controller "bus-speed" and "bus-speed-data"
properties. These all use the default bitrates set via Kconfig.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set the default initial bitrates globally via Kconfig. The initial bitrates
can still be overridden using the "bus-speed" and "bus-speed-data"
devicetree properties.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix missing change to run Twister with default options setup.
Should be implemented together with #72399
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
SD ops card_read() implementation does not need to unlock mutex, as this
is managed by the calling function card_write_blocks. Remove this stray
k_mutex_unlock() call.
Fixes#72287
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RCAR MMC driver previously had to report inaccurate maximum supported
frequency to SD subsystem so that the subsystem would select SDR104 mode
timing. Remove this logic, as it should no longer be needed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Report bus frequency, and use correct names for the timing modes when SD
cards do not support UHS modes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Reword frequency and timing selection logic for SDIO framework so that
the maximum supported timing mode between the card and host will be
selected, even if the maximum frequency supported by the host is not
equal to the maximum frequency for that mode.
Also, resolve an issue where a host and card combo only supporting HS
mode or worse would still use legacy timing mode, because the CCCR flags
were not being checked when checking if HS bus speed could be used.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SDMMC framework frequency and timing selection logic has several
longstanding issues, including:
- requiring that SD hosts support the maximum frequency possible for a
given UHS mode in order to apply that timing
- selecting SDHC_TIMING_SDR25 for high speed mode, when SDHC_TIMING_HS
would be correct
Rework the frequency and timing selection logic within the SD framework
to resolve these issues.
Fixes#52589Fixes#67943
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add UNSUPPORTED frequency macro for HS mode frequencies, used when a
card does not support any high speed mode frequencies
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use frequency macros to define SD frequencies, this should increase
readability of the file and reduce errors.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Rather than relying to the alphanumeric test ordering implemented in
ZTEST to ensure certain tests run first, setup the SDHC IO properties to
known good values before starting any of the tests. This allows the SDHC
tests to run in any order, rather than needing certain tests to run
first.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update NXP hal to the revision pointing to the following commit:
"drivers: csi: Rework to fix the low framerate issue"
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
