Commit graph

84074 commits

Author SHA1 Message Date
Yonatan Schachter
fb140de04a soc: silabs_exx32: Select SOC_GECKO_SERIES1 for 1x devices
Select SOC_GECKO_SERIES1 for all Silabs devices of the series 1x.

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2023-09-18 12:55:40 +02:00
Yonatan Schachter
3a3f02c990 west: hal_silabs: Add support for librail for 1x devices
Update hal_silabs to support the use of librail for efr32xg1x
devices.

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2023-09-18 12:55:40 +02:00
Hake Huang
acf3755d1c ztest_new: add CONFIG_ZTEST_NO_YIELD to ztest_new
Rather than yielding to idle thread, keep the part awake.
So debugger can still access it,
since some SOCs cannot be debugged in low power states.

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2023-09-18 06:50:08 -04:00
Pavlo Havrylyuk
8f37003401 twister: platform filtering when test-only
Add the functionality to use -p and -P to filter out platforms
when using test-only

Signed-off-by: Pavlo Havrylyuk <pavlo.havrylyuk@infineon.com>
2023-09-18 06:33:47 -04:00
Hein Wessels
8219c7ccda doc: release process: link to milestone dates on wiki
This adds a link for convenience. Many times before I struggled to
find the date for the next feature freeze. This is to help others,
and myself, to find it easier in the future.

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-09-18 11:16:27 +01:00
Grzegorz Chwierut
033afe1c0c twister: doc: Update pytest and twister docs
Document how to use pytest_root keyword. Update docs
with changes in pytest-twister-harness plugin.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2023-09-18 05:59:35 -04:00
Grzegorz Chwierut
5bb3067942 twister: pytest: Allow list of pytest testpaths
Allow to specify a list of pytest directories, files or subtests
with pytest_root keyword in test yaml.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2023-09-18 05:59:35 -04:00
Ludvig Samuelsen Jordet
b990a74f8b Bluetooth: Mesh: Add support for Upload OOB Start
This adds support for the Upload OOB Start message to the DFD server, by
providing callbacks that the application can use to hook any OOB scheme
into the model behavior.

There are also extensive changes to the dfu_slot module, to accomodate
the new needs that appeared with the support for OOB transfer (mainly,
fwid, size and metadata are no longer available when the slot is
allocated, they appear later in the handling).

Signed-off-by: Ludvig Samuelsen Jordet <ludvig.jordet@nordicsemi.no>
2023-09-18 10:55:20 +01:00
Jordan Yates
dd090f06b7 net: wifi_mgmt: change type of wifi_scan_params->chan
All WiFi channel numbers fit within a 8 bit number, as the maximum
allocated channel is 233. This halves the memory requirement.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-09-18 10:54:31 +01:00
Brett Witherspoon
e363c5e26d drivers: rtc: stm32: use single instance driver
This driver only supports a single instance. This commit cleans up the
device definition and indicates this.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-09-18 10:54:04 +01:00
Brett Witherspoon
462a7262be drivers: rtc: stm32: add build assertion for source clock
Assert the source clock is defined in the device tree to ensure the
reference is valid.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-09-18 10:54:04 +01:00
Brett Witherspoon
0e8e7a0189 drivers: rtc: stm32: fix cell index of source clock
The DT_INST_CLOCKS_CELL macro takes as the first argument the device
instance and not the cell index. This change correctly gets the second
index of the first device as intended.

Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
2023-09-18 10:54:04 +01:00
Flavio Ceolin
efea1ad398 samples: userspace: Remove unnecessary build options
This sample is selecting many things that are not needed,
just remove them.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-09-18 10:44:04 +01:00
Dmytro Firsov
ac0f731b2e xen: add Kconfig option for Zephyr on Dom0less setups
Dom0less is Xen mode without privileged domain. All guests are created
according to hypervisor device tree configuration on boot. Thus, there
is no Dom0 with console daemon, that usually manages console output
from domains.

Zephyr OS contains 2 serial drivers related to Xen hypervisor: regular
with console shared page and consoleio-based. The first one is for
setups with console daemon and usually was used for Zephyr DomU guests.
The second one previously was used only for Zephyr Dom0 and had
corresponding Kconfig options. But consoleio is also used as interface
for DomU output on Dom0less setups and should be configurable without
XEN_DOM0 option.

Add corresponding XEN_DOM0LESS config to Xen Kconfig files and proper
dependencies in serial drivers.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Co-authored-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
2023-09-18 10:43:45 +01:00
Alberto Escolar Piedras
ff14d64086 samples zbus benchmark: Fix twister filter
For the posix arch, this sample only works for native_posix,
all others will get a build error:
https://github.com/zephyrproject-rtos/zephyr/blob/main/samples/subsys/zbus/benchmark/src/benchmark.c#L20
So let's filter them.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-09-18 10:43:17 +01:00
Alberto Escolar Piedras
e3aa649ee0 native simulator: Get latest from upstream
Align with native_simulator's upstream main
64b8be6311a61df2c63987813e8058560c8dc49c

Which includes:
 * 64b8be6 Make: Give option to add extra localization parameters
 * 05bc3ce Generalize code for N CPUs/MCUs
 * 489069b Makefile: Generalize for N embedded images
 * a4c817e runner->embedded trampolines: Improve definitions
 * 8d8dd29 nsi_utils: Provide debracket macro
 * 6b4956e Add optional embedded test hook definition

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-09-18 10:42:38 +01:00
Alberto Escolar Piedras
5dfc93b73c tests interrupt_offload: Set a proper interrupt for POSIX arch targets
The test assumed that interrupt line 5 was up for grabs, but it
is not in general. (For ex., on an nrf53_bsim this is the clock
interrupt, which cannot be hijacked).

Instead, for boards that define it, let's use the int line
used for offloading SW interrupts (which is defined for all posix
arch boards in tree)
And if this is not defined, let's skip the test.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-09-18 10:42:25 +01:00
Hein Wessels
3e369ec8ed drivers: spi: stm32: LOG_INF should be LOG_DBG to not clutter console
Drivers should only log extra information during initialization if
debug logging is enabled. Otherwise it always clutters the console
when not required.

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-09-18 10:41:41 +01:00
Benjamin Cabé
131105811d boards: esp32: M5Stack Core2 has PCF8563 RTC, not PCF8523
The RTC chip on i2c0 is a PCF8563, not a PCF8523.
RTC _almost_ works when using the latter, but not quite, hence why it
probably was missed before.
Fix tested as working using RTC Shell commands.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2023-09-18 10:40:10 +01:00
Aaron Massey
a7b25d599b fuel_gauge: Join get/set prop structs
The fuel gauge API uses separate get/set property structs to indicate what
properties are readable or writable. This lead to duplication in property
names and potential confusion for new users of the API. See issue #61818.
In addition to above, drivers already determine at runtime if a property is
supported for read or write actions.

Join the get/set fuel gauge property structs as a single struct.

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2023-09-18 10:38:59 +01:00
Martin Jäger
eae44a55d8 net: lib: sockets: sockets_tls: prefix mbedtls error with 0x
The errors are printed in hex, but no prefix was used. This could be
confused with usual errno return values. The 0x prefix makes clear
that it's a hex value.

Also a missing minus sign is added to one log message.

Signed-off-by: Martin Jäger <martin@libre.solar>
2023-09-18 10:38:44 +01:00
Sylvio Alves
f5fa4b3bcd soc: espressif: provide VMA to rodata and text by default
Flash segments require VMA to proper work. Executing from LMA
is not possible. Current implementation did not take into account
runtime iterable rom sections that any application could implement.
In the above cenario and as reported in the issue below, ESP32 won't run
when those ROM sections are created in application level.

This change make sure all flash segments are properly mapped
accordingly.

Fixes #61834

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-09-18 10:38:03 +01:00
Manuel Argüelles
78cc40f4e5 tests: code_relocation: exclude mr_canhubk3 board
The mr_canhubk3 board enables by default an off-chip watchdog that must
be serviced to avoid triggering a reset and cannot be disabled on a
per-test basis. The watchdog driver make uses of a semaphore during
device init and on this test the relocation of the kernel sources
produces a fault. So skip this test for this board.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-18 10:37:22 +01:00
Manuel Argüelles
da56b98f8b tests: arch: arm_irq_vector_table: exclude mr_canhubk3 board
The mr_canhubk3 board enables by default an off-chip watchdog that must
be serviced to avoid triggering a reset and cannot be disabled on a
per-test basis.

To add the needed ISR for this test involve doing modifications to the
LPSPI MCUX driver that does not worth the trouble for this test only,
so exclude this board.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-18 10:37:22 +01:00
Manuel Argüelles
775ec5ac19 tests: watchdog: wdt_basic_api: make mr_canhubk3 build only
Tests cannot be executed in the board because ECC initialization will
clear SRAM contents that are used by this test to persist data across
resets.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-18 10:37:22 +01:00
Manuel Argüelles
c9cc03b6ef samples: tracing: exclude mr_canhubk3 board
The mr_canhubk3 board enables by default an off-chip watchdog that must
be serviced to avoid triggering a reset and cannot be disabled on a
per-test basis.

The amount of data printed on this test prevents to initialize the
on-board watchdog within the expected window, causing a board reset.
Hence do not run the test on mr_canhubk3 board.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-18 10:37:22 +01:00
Manuel Argüelles
738b124281 tests: kernel: usage: skip for mr_canhubk3 board
The mr_canhubk3 board enables by default an off-chip watchdog that must
be serviced to avoid triggering a reset and cannot be disabled on a
per-test basis.

test_all_stats_usage assumes the CPU was never idle before the test
starts but this is not the case for mr_canhubk3 because the off-chip
watchdog driver has a thread kicked off during device init that will
conflict with the expected usage stats on this test. So skip this test
for this board.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-18 10:37:22 +01:00
Tomasz Leman
a5d1fd9857 soc: adsp: clk: update clock switch flow
This patch corrects clock selection flow for ACE platforms.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-18 10:35:23 +01:00
Tomasz Leman
9656056b19 dts: adsp: ace20: remove lp clock
LP/HP RING OSC clocks were replaced by the ACE IPLL clock.

If needed IPLL can be configured to work as low power clock. But right
now ACE uses only WOVCRO and IPLL (configured to work as HP RING OSC
clock).

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-18 10:35:23 +01:00
Tomasz Leman
50f0e223e8 dts: adsp: ace15: remove lp clock
LP/HP RING OSC clocks were replaced by the ACE IPLL clock.

If needed IPLL can be configured to work as low power clock. But right
now ACE uses only WOVCRO and IPLL (configured to work as HP RING OSC
clock).

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-18 10:35:23 +01:00
Tomasz Leman
cf6d5f95b6 adsp: clk: ace: select ipll if wovrco is unavailable
Selecting Low Power clock has the same result as selecting High
Performance clock (now IPLL). Therefore, the LP clock will be removed
from the list of available clocks on ACE family platforms.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-18 10:35:23 +01:00
Tomasz Leman
2d835e1b29 dts: adsp: ace20: replace hp with ipll clock
The ACE family platforms do not have LP/HP RING OSC clocks. They were
replaced by the ACE IP integrated PLL clock. Selecting LP or HP in
CLKCTL will result in enabling IPLL.

Clock can supply frequencies for both replaced clocks, default frequency
equals to 393.2 MHz.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-18 10:35:23 +01:00
Tomasz Leman
dcecda859c dts: adsp: ace15: replace hp with ipll clock
The ACE family platforms do not have LP/HP RING OSC clocks. They were
replaced by the ACE IP integrated PLL clock. Selecting LP or HP in
CLKCTL will result in enabling IPLL.

Clock can supply frequencies for both replaced clocks, default frequency
equals to 393.2 MHz.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-18 10:35:23 +01:00
Tomasz Leman
2f2689e3d3 intel_adsp: ace15: shim: update wovrco request bit
Updating value of WOVRCO request bit in CLKCTL register according to the
documentation. Previus value was mask used for clock enabling.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-18 10:35:23 +01:00
Tomasz Leman
ea9dd59460 yamllint: bindings: add ipll clock index
Adding new property to intel,adsp-shim-clkctl with ACE integrated PLL
clock index.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-18 10:35:23 +01:00
Diego Elio Pettenò
36883d2e68 samx2x: separate RAM/Flash sizes by model.
This creates separate dtsi files for the various memory density codes of
SAM X2xfamilies (they are the same where the specific size exists.)

All of the boards with the exclusion of EV11L78A use the same density
model of 18 (32KiB RAM and 256KiB flash) which is what the samd2x.dtsi
include specified for all of them previously.

The density code has been confirmed being the same across the D20/D21,
C20/C21, L21, and R21 families. This does not carry over to some other
series such as the E5x.

Signed-off-by: Diego Elio Pettenò <flameeyes@meta.com>
2023-09-18 10:35:07 +01:00
Fabio Baltieri
d8cdd86132 MAINTAINERS: include the ethos driver in the ethos module
The driver is bound to the module, there's no separate platform, so
let's just add the driver path to the module area so that changes for it
gets tagged and assigned.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-18 10:00:17 +01:00
Anas Nashif
a4de2eb3d1 kernel: doc: mark sections as internal in kernel.h
Add doxygen conditionals around internal segments of the header.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-17 07:59:30 -04:00
Anas Nashif
c4e190f414 kernel: header: remove unused z_queue_node_peek from kernel.h
This function is private to the kernel and should not be exposed in a
public header.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-17 07:59:30 -04:00
Anas Nashif
8dc2746c0e kernel: z_handle_obj_poll_events is internal not kernel.h material
This internal kernel API is misplaced in a public kernel header. Just
make it available to the code using it in the kernel.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-17 07:59:30 -04:00
Anas Nashif
cc4ab45a45 kernel: header: k_queue struct should not be hidden
This is not a private struct, it should not be hidden in the docs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-17 07:59:30 -04:00
Anas Nashif
c64ab30859 kernel: kernel_includes.h: double guard header
This header should not be included directly, only via kernel.h.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-17 07:59:30 -04:00
Anas Nashif
ceb42a688e kernel: remove reference to non existing z_thread_heap_assign
we have no z_thread_heap_assign, was suppoosed to reference
k_thread_heap_assign.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-09-17 07:59:30 -04:00
Christopher Friedt
1731010869 posix: pthread: do not assert in pthread_exit() on k_thread
If `pthread_exit()` is called from a `k_thread`, then we would
previously trigger an assertion. The problem with that, is that
is POSIX is acting as a compatibility layer.

Given that it is a reasonable expectation to have the calling
thread exit or abort when calling `pthread_exit()`, lets do just
that.

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-09-16 18:56:33 -04:00
Nikodem Kastelik
ad8f3e5b4e manifest: hal_nordic: fix wrong include in nrfx_pwm
New nrfx revision fixes issue in the PWM driver causing build
errors due to invalid include when workaround for anomaly 109
is enabled.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2023-09-16 11:15:46 +01:00
Peter Mitsis
c7255cf374 kernel: Remove references to _EXPIRED
The _EXPIRED macro is no longer necessary. It is a relic of an older
timeout processing algorithm from several years ago.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2023-09-15 19:16:20 -04:00
Wojciech Slenska
798b863f36 modem: modem_ppp: added net stats
Added ppp net stats to modem subsys.

Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
2023-09-15 15:13:06 -05:00
Wojciech Slenska
6f3bbe19a7 net: ip: stats: changed dependency for PPP stats
NET_STATISTICS_PPP are dependend on NET_L2_PPP, not on NET_PPP.
This allows to use statistics also in modem subsys.

Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
2023-09-15 15:13:06 -05:00
Mathias Storck
4431c4755c drivers: sensor: lis2dh: add tap interrupt
add interrupt for single tap on ST LIS2DH
shared interrupt with any motion

Signed-off-by: Mathias Storck <mathias.storck@gwa-hygiene.de>
2023-09-15 14:42:26 -05:00
Daniel DeGrasse
b0b32c5701 dts: arm: nxp: rt6xx: add SRAM code region
Add SRAM code region definition to RT6xx series SOC. The RT6xx shares
SRAM partitions between the code and data bus, but a default allocation
is chosen by the SOC level devicetree. The user can modify this
allocation by changing the base address and size of the sram_code and
sram0 regions in their board devicetree.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-09-15 14:37:07 -05:00