Commit graph

32 commits

Author SHA1 Message Date
Daniel DeGrasse
faf5593272 soc: arm: nxp_lpc: Only clock core from PLL1 when CONFIG_FLASH=n
Do not clock the LPC55xxx cores from PLL1 when CONFIG_FLASH is set. This
is required due to the following limitation of the flash controller
(documented in the reference manual):

Flash operations (erase, blank check, program) and reading a single word
can only be performed for CPU frequencies of up to 100 MHz. These
operations cannot be performed for frequencies above 100 MHz.

The PLL1 clock source will result in a core clock of 150MHz, which
violates this requirement.

Fixes #62963

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-10-08 11:25:02 +01:00
Emilio Benavente
c6e3bac4f2 soc: arm: lpc55xxx: Updated clock init
Updated the clock init to reflect the sdk also
updated the clock frequencies to reflect the
respective soc clock values, this file originally
contained unexpected clock values, updated comments
to reflect changes and got rid of doxygen style
comments

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2023-07-17 13:05:44 -05:00
Mahesh Mahadevan
0602ef8647 soc: nxp_lpc: Add USBFS support
1. Add support for the USB Full Speed controller
2. Add a Kconfig to specify if a dedicated USB
   RAM is available in the SoC.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-05-26 17:53:37 -04:00
Maxime Vincent
012663f178 soc: arm: nxp: add lpc55s16jbd64
Add support for lpc55s16jbd64 chip variant

Signed-off-by: Maxime Vincent <maxime@veemax.be>
2023-05-10 10:15:14 +02:00
Daniel DeGrasse
3b59b495b7 soc: arm: nxp_lpc: convert NXP LPC SOCs to use CMSIS SystemInit
Convert NXP LPC SOCs to use CMSIS SystemInit, and remove redundant code
where it exists. This will enable initialization flows to be more
standardized across all platforms.

Since LPC54xxx and LPC55xxx series enables SRAM banks in SystemInit,
provide Kconfigs to bypass this setting and keep additional SRAM
banks unclocked.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-02-20 09:47:28 +01:00
Daniel DeGrasse
fadd86d3e2 boards: lpcxpresso55s69: use LMA adjustment for second core
Use LMA adjustment building dual core image with LPC55s69. The load
address adjustment allows the second core image to be flashed onto the chip
by the debugger, into the secure region of the LPC flash.

Additionally, remove the build dependency that was enforced by the SOC.
This requirement to build the secondary core image first can be enforced
by the project itself, instead of the core.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-11-15 14:46:02 +01:00
Emilio Benavente
2f149fb653 soc: arm: nxp: lpc55xxx: Added FlexPWM to the SOC Kconfig
Added MCUX_PWM Kconfig dependency;
Added missing pin function definition needed for PWM;
Enabled submodule clocks for FlexPWM

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2022-09-19 10:10:32 +00:00
Mahesh Mahadevan
9619b02f9b soc: nxp: Add define needed by the SDK USB driver
1. Add USB_STACK_USE_DEDICATED_RAM=1 define that is
   used by the SDK USB driver
2. Delete unused "config USB_DEDICATED_MEMORY"

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-09-09 09:44:46 -05:00
Yves Vandervennet
6b66d7f266 flash: nxp: enabling lpc55s36's FMC
This commit enables the SoC's flash memory controller.

 - added lpc55s36 specific code in the NXP MCUX driver
   to take advantage of the SoC's check-before-read
   capability
 - enabled the FMC node in the SoC's dtsi (iap)
 - added the flash controller chosen node to the board's dts

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-25 10:24:41 -05:00
Yves Vandervennet
7a4bb3b27c can: nxp: enabling MCAN on NXP's lpcxpresso55s36
This commit introduces

 - changes on SoC Kconfig and dts files
 - board specific changes (CAN node status, pinctrl and Zephyr alias)

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-15 13:37:38 -05:00
Yves Vandervennet
cd7dbe92b1 soc: arm: nxp_lpc: lpc55xxx: disabling LPC55S36 IAP support
This is temporary until support has been enabled. lpc55s36's IAP controller
is different and does not match previous implementations.
The Zephyr driver uses a data structure matching the IAP controller to
implement a feature that should normally come out of the ROM.

Since IAP support is not in yet, disabling the option in the SoC's Kconfig
and disabling the node in the device tree is the proper way to go forward.

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-04 10:47:16 -05:00
Neil Chen
5642d4f805 soc: arm: nxp_lpc: lpc55xxx: LPC55S36: add device support
- Add soc information for LPC55S36

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2022-08-04 10:47:16 -05:00
Navin Sankar Velliangiri
90a11851ec soc: arm: nxp: add LPC55S06 support
Add initial support for the NXP LPC55S06.

Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
2022-03-09 09:46:17 -06:00
Gerard Marull-Paretas
95fb0ded6b kconfig: remove Enable from boolean prompts
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:

sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Henrik Brix Andersen
25433f1414 soc: arm: nxp: lpc55xxx: add MCAN support
Add support for the NXP LPC MCAN CAN-FD controller.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-01-10 12:00:20 +01:00
Mahesh Mahadevan
34ffd5a7d4 boards: lpcxpresso55s69: Add PWM support
Add PWM support

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-11-01 11:14:29 -04:00
Mahesh Mahadevan
381c7c7dfb boards: lpcxpresso55s69: Add I2S support
Add I2S support for LPCXpresso55S69 board

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-09-01 14:39:03 -04:00
Toby Firth
893bfc0fc1 drivers: counter: added ctimer driver for lpcexpresso55s69
Added shim driver for the CTIMERs for the lpcexpresso55s69 board.

Fixes: #22705

Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2021-08-24 17:13:22 -04:00
Mahesh Mahadevan
95ee8f0f64 soc: LPC55S69: Add USB support
1. Update soc.c file to add USB clock setup
2. Add a linker script file to move USB transfer
   buffer and controller buffers to USB RAM
3. Update Kconfig's to add USB support
4. Add zephyr_udc0 nodelabel

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-08-19 17:19:11 -04:00
David Leach
f567e02926 boards: arm: lpc55s28: Remove Trustzone-M flags
The LPC55S28 does not have the Trustzone-M support.

Fixes #36768
Fixes #37266
Fixes #37267

Signed-off-by: David Leach <david.leach@nxp.com>
2021-08-17 10:26:35 +02:00
Andrei Gansari
c85c5290d8 soc: lpc55xxx: enable second core and mailbox
Cnfigures the LPC55xxx SoC with dual-core (first core boots the second)
and enables the on-SoC mailbox to handle inter-core communication.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-10 15:38:54 -05:00
Christian Taedcke
ddf13a3256 soc: arm: nxp: Add LPC55S28 support
Add initial support for NXP LPC55S28.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2021-01-05 15:38:04 -06:00
Mahesh Mahadevan
76cc0ddc3e soc: LPC55S69: Add DMA support
Add DMA configuration for LPC55S69

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-21 06:26:40 -05:00
Mahesh Mahadevan
f025700d8f soc: LPC54xxx, LPC55xxx: Update to use clock control
Use the clock control driver to get flexcomm clock
frequency

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-15 11:17:24 -05:00
Toby Firth
dc37f988e0 drivers: adc: added support adc driver for lpcexpresso55s69
Added shim driver for the LPADC for lpcexpresso55s69 board.

Fixes #22703.

Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2020-10-12 14:59:40 -05:00
Henrik Brix Andersen
93c6c913cb soc: arm: nxp: add LPC55S16 support
Add initial support for the NXP LPC55S16.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-05-01 10:11:01 -05:00
Andrei Gansari
3692da14ea soc: lpc55xxx define secure/non-secure core
Define secure related features on the lpc55xxx soc cores.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-03-12 12:24:12 +02:00
Andrei Gansari
c9301ad8a3 soc: enables flash on LPC55xxx SoCs
Enables IAP Flash Controller device on LPC55xxx SoCs.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-01-16 08:19:46 -06:00
Andrei Gansari
487dc7cb94 soc: enable secure mode for LPC55xxx
Devices that are SECURE enabled may require sometimes to enable secure
bits on CMSE register.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-12-10 08:48:56 -06:00
Ulf Magnusson
bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00
Ulf Magnusson
975de21858 kconfig: Global whitespace/consistency cleanup
Clean up space errors and use a consistent style throughout the Kconfig
files. This makes reading the Kconfig files more distraction-free, helps
with grepping, and encourages the same style getting copied around
everywhere (meaning another pass hopefully won't be needed).

Go for the most common style:

 - Indent properties with a single tab, including for choices.

   Properties on choices work exactly the same syntactically as
   properties on symbols, so not sure how the no-indentation thing
   happened.

 - Indent help texts with a tab followed by two spaces

 - Put a space between 'config' and the symbol name, not a tab. This
   also helps when grepping for definitions.

 - Do '# A comment' instead of '#A comment'

I tweaked Kconfiglib a bit to find most of the stuff.

Some help texts were reflowed to 79 columns with 'gq' in Vim as well,
though not all, because I was afraid I'd accidentally mess up
formatting.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 15:53:23 +01:00
Andrei Gansari
e90d184746 soc: added LPC5500 family
SoC implementation for LPC5500 family.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-06-03 15:49:35 -05:00