The trace output layer was using this transformation already, make it
an official API. There are other places doing similar logic that can
benefit.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This whole file is written to assume XEA2, so there's no value to
using an abstraction call here. Write to the RSIL instruction
directly.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The xtensa atomics layer was written with hand-coded assembly that had
to be called as functions. That's needlessly slow, given that the low
level primitives are a two-instruction sequence. Ideally the compiler
should see this as an inline to permit it to better optimize around
the needed barriers.
There was also a bug with the atomic_cas function, which had a loop
internally instead of returning the old value synchronously on a
failed swap. That's benign right now because our existing spin lock
does nothing but retry it in a tight loop anyway, but it's incorrect
per spec and would have caused a contention hang with more elaborate
algorithms (for example a spinlock with backoff semantics).
Remove the old implementation and replace with a much smaller inline C
one based on just two assembly primitives.
This patch also contains a little bit of refactoring to address the
scheme has been split out into a separate header for each, and the
ATOMIC_OPERATIONS_CUSTOM kconfig has been renamed to
ATOMIC_OPERATIONS_ARCH to better capture what it means.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
There was a bunch of dead historical cruft floating around in the
arch/xtensa tree, left over from older code versions. It's time to do
a cleanup pass. This is entirely refactoring and size optimization,
no behavior changes on any in-tree devices should be present.
Among the more notable changes:
+ xtensa_context.h offered an elaborate API to deal with a stack frame
and context layout that we no longer use.
+ xtensa_rtos.h was entirely dead code
+ xtensa_timer.h was a parallel abstraction layer implementing in the
architecture layer what we're already doing in our timer driver.
+ The architecture thread structs (_callee_saved and _thread_arch)
aren't used by current code, and had dead fields that were removed.
Unfortunately for standards compliance and C++ compatibility it's
not possible to leave an empty struct here, so they have a single
byte field.
+ xtensa_api.h was really just some interrupt management inlines used
by irq.h, so fold that code into the outer header.
+ Remove the stale assembly offsets. This architecture doesn't use
that facility.
All told, more than a thousand lines have been removed. Not bad.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Commit 6b84ab3830 ("kernel/sched: Adjust locking in z_swap()") moved
the call to arch_cohere_stacks() out of the scheduler lock while doing
some reorgnizing. On further reflection, this is incorrect. When
done outside the lock, the two arch_cohere_stacks() calls will race
against each other.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
I have not had time to work with USB recently, so removing myself from
MAINTAINERS and CODEOWNERS for the USB subsystem.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Coverity analysis reported following cases with side effect in assertion
(ASSERT_SIDE_EFFECT):
CID: 219574
CID: 219644
CID: 219659
Avoid issue by loading volatiles to local variables before assertion.
Fixes: #33079Fixes: #33042Fixes: #33030
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Serial Wire JTAG configuration option is made available
under condition that SPI_3 was not enabled on SOC_STM32F103XE.
Besides being obsolete there are various other potential conflicts
with other periphals, and it is not possible to explicit them all.
To make it more coherent remove such condition, assume that user
needs to take care of such pin conflict and express SWJ as having
precedence over peripheral devices pin configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
MCUboot recently gives possibility to signal its state
using led.
For leverage this feature need to provide proper alias
for the led gpio pin.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Mcuboot was updated to the version synchronized with
the upstream 5b7ed6a which introduces:
- Added LED support for signaling enter to the serial recovery mode
- Added boot delay/debonuce of serial detect pin.
- Fixed compilation warnings with ZEPHYR_LOG_MODE_MINIMAL
- Added optional check which prevents attempting to boot image that
has been build for different ROM address than a slot it currently
resides in. Check is enabled if image was signed with
IMAGE_F_ROM_FIXED flag.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Sometimes it is hard to tell which instance of a thread is which
in the printed list, based solely on the name (if present) and
the k_thread pointer, so also print the thread entry fn pointer.
Signed-off-by: Pete Skeggs <peter.skeggs@nordicsemi.no>
Added comments to explain the re-use of allocated same
connection context to both 1M and coded PHY scanning context
when both PHY is enabled for initiating connection.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Initial work in progress implementation of Create Connection
Cancel for Extended connection initiation.
Adds implementation to teardown connection initiated at ULL
layer and gracefully release allocated resources.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Added low power configuration to testcase.yaml. In this mode
UARTE is disabled when RX and TX is not used.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Lowest power consumption can be achieved when uarte peripheral
is disabled when not used. In low power mode, need for both
directions is tracked and if both are no in use peripheral is
disabled. TX disabling is instant but RX requires flushing RX
fifo because data in hardware fifo is lost when peripheral is
re-enabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Refactored driver to prepare for low power extension. Functional
change is limited to handling of RX_DISABLED event which is now
generated from RXTO interrupt context after RX is stopped. Previously,
RX was not stopped after the transfer.
Rx flushing function contains hardware limitation workaround.
Workaround is applied only if flushed data is not discarded.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
People frequently do things like setting BOARD_ROOT to
/my/module/boards/arm/my_board when it should be set to /my/module.
Similar misconfigurations happen for SOC_ROOT.
Emit warnings in these situations to try to point users in the right
direction.
A similar change could be made for DTS_ROOT, but that is trickier
since at least one directory (the application root) is legitimately
added to it that does not always contain dts/ or include/
subdirectories.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The address pointer cannot be null at this point so remove
the checks.
Coverity-CID: 219595
Fixes#33071
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Zephyr docs state that timers will act as one-shot timers when started
with a period of K_NO_WAIT or K_FOREVER. However the code adjusting
period was setting K_FOREVER timeout ticks to 1 which caused the timer
to expire every tick. This adds a check to not adjust K_FOREVER periods
Signed-off-by: Eric Johnson <eric@liveathos.com>
New power states have more granularity than deep sleep and sleep
states. Just get rid of this and keep the same behavior for now.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Currently the power subsys is sending notifications about power state
changes before doing device pm. If one device fails to low power or
suspend the system never goes to an idle state. Change to send
notifications just before call SoC to suspend and avoid misleading
information.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
pm_system_resume is always implemented when PM is enabled. There is no
need to have this weak function under an ifdef PM.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
pm_system_resume_from_deep_sleep is not implemented or used
anywhere. Just remove it and keep the code base cleaner.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This function is useless and the state variable that it was
controlling is also not necessary because the same logic is being
handled by the variable post_ops_done.\
This reasonably simplifies idle thread logic.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
There is no need for this function. This function is called only in
one place and the code can be moved to the function that was calling
it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
pm_power_state_force had two different behavior, if
CONFIG_PM_DIRECT_FORCE_MODE was enabled this function immediately
calls pm_system_suspend() without wait the idle thread. Without this
option enabled, this function will wait for the idle thread run but
will use the given power state instead of asking the policy manager.
The problem in both cases is that the process involves handling
devices and the way that was implemented if at least one device failed
to go to low power or suspended the system power state would not
change / be forced.
This commit simplifies this API removing the conditional behavior
since it is not clear the need for that and effectively, and
immediately, forces the system to go to the given state without
bother with devices.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
pm_system_suspend is called only from the idle thread and should
not be exported as a public API.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The board specific interface in this sample is not handling errors.
Fix that by making board_init() return a negative error code or zero.
Rework the bbc_microbit specific board file by handling errors
appropriately and avoiding device_get_binding() to move some device
configuration errors to build time.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This structure contains a GPIO device, pin number, and devicetree
flags. Add helpers for getting one out of the devicetree and doing
useful initialization tasks with it.
Fixes: #31280
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The PRMsg service and backend had hardcoded and incorrectly named log
level. Created the Kconfig options for configuring log level of this
module.
Signed-off-by: Marek Porwisz <marek.porwisz@nordicsemi.no>
Some modems, under some conditions, have a tendency to get stuck without
a connection due to cached state. We have observed this on some Simcom
LTE modems after large cellular outages. The modems are unable to escape
their cached state for some reason unless they're factory reset (or a
cache clearence is forced in some other way).
This commit allows for the modem to be factory reset at each boot. This
minimizes dependencies on external state by ensuring each power-up is as
similar as possible.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Fix#32918 [Coverity CID :219528] "Arguments in wrong order
in tests/drivers/pwm/pwm_loopback/src/main.c"
Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
Currently RAM region specified in the DT for board mps2-an512 to store
data (not to run code) is set to start at 0x3000_0000 and a 16M
contiguous space is assumed. However, at that address there is no such
contiguous space of 16M, rather only a 128K area is available. As a
consequence large applications linked with Zephyr might end up using
memory regions that are not valid, specially at runtime when the stack
grows, causing a BusFault.
Application Note 512 only specifies a 16M contiguous space available
starting at 0x8000_0000 (please see 'Table 3-4: SSRAM2 and SSRAM3
address mapping' and 'Table 3-6: External PSRAM mapping to Code Memory',
on pages 3-7 and 3-8, respectively), which resides in the PSRAM
(external RAM).
The AN521 also specifies a 4M contiguous space available starting at
0x3800_0000 which can be used as RAM for data storage and which is not
currently described in the DT.
The current DT also defines a 224M flash region (to run code) which
doesn't effectively exist, because most of it is reserved (~148M).
That commit fixes the incorrect definition of region 0x3000_0000 (16M)
and hence defines a new region called 'sram2_3' that maps to region
0x3800_0000 (4M) which is used as RAM to store data, and fixes the flash
region defining a new region 'sram1' (4M) from where code is executed
(starting at 0x1000_0000). The board has no real flash memory, rather an
auxilary HW populates the appropriate memory regions from images found
in a MicroSD card.
That commit also defines the missing PSRAM (16M) region ('psram') which
can be used by large programs as a general purpose RAM.
Finally, it also fixes the DT for the non-secure memory regions to
reflect the fixes described above for the secure memory regions.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
The mps2_an521_nonsecure exists for TFM and is also utilized as a config
for multicore samples. We can enable just the TFM tests with only_tags
and get a bit of additional coverage in QEMU for the TFM integration.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CORTEX_M_SYSTICK is enabled by default on all STM32 based targets,
in common soc Kconfig files.
Forcing its definition in board files is redundant and prevents
to disable it when activating LPTIM as ticker.
Remove these definitions
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of listing Python dependencies in the docs, refer to the
requirements file. This way docs are never out of sync.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It is easier to follow the user guide if each platform has its own tab
for requirements.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Current DW I2C driver uses 32 bit access for some registers and
16 bit access for others. So if DW I2C IP is connected via bus
which doesn't support 16 bit access we will get bus error.
Fix that by switching to 32 bit access only instead of 16
and 32 bit mix.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Use an "initiated" flag in the lll_conn struct to guard the processing
of PDUs related to connection initiation (CONNECT_IND,
AUX_CONNECT_RSP). This avoids races between ULL and LLL when creating
a connection.
Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
