Commit graph

164 commits

Author SHA1 Message Date
Krzysztof Chruscinski
786647bdcf lib: os: assert: Avoid including printk.h in __assert.h
Create wrapper for printk to avoid including printk.h in __assert.h.
__assert.h is used everywhere thus should not have dependency to
printk.h.

Cleanup assert Kconfig options.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-03-16 10:27:20 +01:00
Gerard Marull-Paretas
95fb0ded6b kconfig: remove Enable from boolean prompts
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:

sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Krzysztof Chruscinski
c5a065e3b8 debug: thread_analyzer: Use bigger stack in certain configurations
When immediate logging is used and optimization is off then bigger
stack is needed for thread analyzer. Adjusting the value.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-02-22 14:44:11 +01:00
Krzysztof Chruscinski
1eb5183bee debug: thread_analyzer: Add option to print ISR stack usage
Add option to include analysis of interrupt stack(s) when
threads are analyzed.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-02-21 20:57:17 -05:00
Julien Massot
f5f61ac605 debug: Add back openocd alias
OpenOCD is still using these alias, until we fix OpenOCD
upstream we should keep them.

This partially reverts commit
1a7bc06086.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2022-02-02 14:34:41 -05:00
Maureen Helm
1a7bc06086 debug: Remove deprecated CONFIG_OPENOCD_SUPPORT
CONFIG_OPENOCD_SUPPORT was deprecated in favor of
CONFIG_DEBUG_THREAD_INFO in Zephyr v2.6.0 and can now be removed.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2022-01-24 10:23:20 -05:00
Antony Pavlov
0369998e61 arch: add MIPS architecture support
MIPS (Microprocessor without Interlocked Pipelined Stages) is a
instruction set architecture (ISA) developed by MIPS Computer
Systems, now MIPS Technologies.

This commit provides MIPS architecture support to Zephyr. It is
compatible with the MIPS32 Release 1 specification.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00
Mark Holden
7b2b283677 debug: coredump: allow for coredump backends to be defined outside of tree
Move coredump_backend_api struct to public header so that custom backends
for coredump can be defined out of tree. Create simple backend in test
directory for verification.

Signed-off-by: Mark Holden <mholden@fb.com>
2022-01-11 18:17:24 -05:00
Peter Mitsis
f498118daa debug: thread analyzer to display runtime stats
Updates the thread analyzer to display the thread runtime
stats.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2022-01-10 10:38:06 -05:00
Lauren Murphy
c1711997bc debug: coredump: add xtensa coredump
Adds Xtensa as supported architecture for coredump. Fixes
a few typos in documentation, Kconfig and a C file. Dumps
minimal set of registers shown by 'info registers' in GDB
for the sample_controller and ESP32 SOCs. Updates tests.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2021-12-14 07:40:55 -05:00
Daniel Leung
dc34f6c84d xtensa: introduce support for GDB stub
This adds basic support for GDB stub on Xtensa. Note that
this only provides the common bits on the architecture side.
SoC support is also required to fully enable GDB stub on
each Xtensa SoC.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
31f148a88e debug: gdbstub: add stubs to support breakpoint/watchpoint
This adds the architecture interface so that the GDB stub can
deal with breakpoints and watchpoints. By default, weak
functions are implemented to indicate breakpoints and
watchpoints are not supported.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
c4099f6754 debug: gdbstub: allow aligned memory access
Some architectures may require memory accessed to be aligned to
certain size and cannot be accessed byte-by-byte during memory
read/write in GDB stub. This adds the ability to specify
the alignment via kconfig. The existing byte-by-byte access is
retained as it is simplier code.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
48da4dbb2a debug: gdbstub: add bits to restrict memory read/write
This adds bits for architectures, SoCs or boards to restrict
memory access in GDB stub. This is mainly to make sure
GDB stub only read/write to memory that can be legally accessed
without resulting in memory faults.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
650a629b08 debug: gdbstub: remove start argument from z_gdb_main_loop()
Storing the state where this is the first GDB break can be done
in the main GDB stub code. There is no need to store the state
in architecture layer.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
6eaaaa9acc debug: gdbstub: introduce gdb_bin2hex()
Adds a new function gdb_bin2hex() to convert binary into
hexadecimal string representation. This is similar to
bin2hex() but does not force a null character at the end
of the output buffer. This avoids an issue where the last
character of the hexadecimal string is replaced with
null character before sending to GDB.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
413f859a36 debug: gdbstub: continue debugging for recoverable errors
There is no need to bail out of the debugging session if there
are recoverable errors, for example, erroneous GDB packet
received, cannot write to certain registers, etc. So simply
send an error message to GDB and continue the GDB stub main
loop for more debugging.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
e76d385e49 debug: gdbstub: add arch-specific funcs to read/write registers
This adds architecture-specific functions to read/write registers.
This allows architecture to have a sparse representation of
the register file as not all registers are saved during context
switches. This saves some runtime space, and provides some
flexibility on what architectures can do.

Remove from header the need to define ARCH_GDB_NUM_REGISTERS as
it is no longer used in the common gdbstub code.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
7fafd971f7 debug: gdbstub: ignore GDB packet exceeding buffer
If an incoming GDB packet is bigger than what the buffer can hold,
stop putting the extra characters into the buffer. This will still
read till the end to acknowledge the packet but will return error
instead. This allows the GDB session to continue instead of hanging
or timed out due to packets not being acknowledged.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Daniel Leung
f5f9a75142 debug: gdbstub: add kconfig for buffer size
This adds a kconfig to specify the buffer size for GDB packet
I/O. Some architectures may need a bigger buffer for the general
register packet, and we don't want it to overflow our buffer.

This also changes the packet read/write buffer to be allocated
outside of stack. Since the buffer can be large enough that it
won't fit inside the stack.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-30 15:24:00 -05:00
Torsten Rasmussen
d15717a78a kconfig: debug: experimental settings now uses select EXPERIMENTAL
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all subsys/debug settings having `[EXPERIMENTAL]` in their
prompt has has been updated to include `select EXPERIMENTAL` so that
developers can enable warnings when experimental features are enabled.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-10-25 10:46:48 +02:00
Pieter De Gendt
d5520f2e59 debug: coredump: flash backend: fix header if stream erase
If CONFIG_STREAM_FLASH_ERASE is set, a page erase is done before
writing the coredump header to the flash. If the flash page erase size
is larger than the flash write size this results in erasing part of
the coredump data.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-10-08 13:00:57 +02:00
Pieter De Gendt
1dc74d70f2 debug: coredump: flash backend: fix stream API data size
The stream api initialization for the coredump flash backend used an
incorrect size.

This commit subtracts the header size.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-10-08 13:00:57 +02:00
Robert Gałat
464cd567a9 coredump_log: coredump log in panic mode
Current impementation assumes that CONFIG_LOG_IMMEDIATE=y
guarantees complete transfer, and it is not true.
In my opinion core dump should always be printed in panic mode.

Signed-off-by: Robert Gałat <robert.galat@nordicsemi.no>
2021-09-29 14:50:12 -04:00
Daniel Leung
1672f6cea1 debug: thread_info: stack pointer is not supported for xtensa
Xtensa does not store the stack pointers in thread objects but
pushing the registers into the stack. There is no fixed location
to retrieve the stack pointer so mark it as unimplemented to
avoid the #warning.

Fixes #38405

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-09-09 19:06:38 -04:00
Gerson Fernando Budke
2797afb749 debug: thread_info: Add posix thread status
Add missing THREAD_INFO_OFFSET_T_STACK_PTR information for arch posix.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-08-30 13:18:04 -04:00
Anas Nashif
20896ba1e0 thread analyzer: fix formatting for unsigned int
On 64bit systems, this was issuing warnings due to wrong formatting.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-06-01 12:42:38 -05:00
Ioannis Glaropoulos
dd574f6ec7 kernel: stack_sentinel: disable in single-threaded builds
Add a dependency on MULTITHREADING for the
STACK_SENTINEL feature, so it may not get
enabled in single-thread Zephyr builds.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-28 10:41:46 -05:00
Joakim Andersson
253350c6e7 Kconfig: Increase default thread analyzer stack size
Increase the default thread analyzer stack size. On ARM systems the
stack usage is higher with CONFIG_FPU enabled.
The default of 512 is not enough in this case and lead to stack
overflow.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-05-13 12:36:57 -04:00
Anas Nashif
4d994af032 kernel: remove object tracing
Remove this intrusive tracing feature in favor of the new object tracing
using the main tracing feature in zephyr. See #33603 for the new tracing
coverage for all objects.

This will allow for support in more tools and less reliance on GDB for
tracing objects.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Jennifer Williams
ca75bbef3c tests: boot_time: remove all the code and instrumentation feeding into test
Remove the config BOOT_TIME_MEASUREMENT and corresponding #ifdef'd code
throughout (kernel/init.c, idle.c, core/common.S , reset.S, ... ) which
hold the extern hooks for z_timestamp_main and z_timestamp_idle in the
removed boot_time test suite.

Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
2021-05-05 10:41:15 -04:00
Krzysztof Chruscinski
d5664a4a2d debug: Allow spin lock validation only with multithreading
Spin lock validation is touching threads. Allow only when
multithreading is enabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-04-29 14:50:35 +02:00
Carlo Caione
256ca55476 arm64: Rework stack usage
The ARM64 port is currently using SP_EL0 for everything: kernel threads,
user threads and exceptions. In addition when taking an exception the
exception code is still using the thread SP without relying on any
interrupt stack.

If from one hand this makes the context switch really quick because the
thread context is already on the thread stack so we have only to save
one register (SP) for the whole context, on the other hand the major
limitation introduced by this choice is that if for some reason the
thread SP is corrupted or pointing to some unaccessible location (for
example in case of stack overflow), the exception code is unable to
recover or even deal with it.

The usual way of dealing with this kind of problems is to use a
dedicated interrupt stack on SP_EL1 when servicing the exceptions. The
real drawback of this is that, in case of context switch, all the
context must be copied from the shared interrupt stack into a
thread-specific stack or structure, so it is really slow.

We use here an hybrid approach, sacrificing a bit of stack space for a
quicker context switch. While nothing really changes for kernel threads,
for user threads we now use the privileged stack (already present to
service syscalls) as interrupt stack.

When an exception arrives the code now switches to use SP_EL1 that for
user threads is always pointing inside the privileged portion of the
stack of the current running thread. This achieves two things: (1)
isolate exceptions and syscall code to use a stack that is isolated,
privileged and not accessible to user threads and (2) the thread SP is
not touched at all during exceptions, so it can be invalid or corrupted
without any direct consequence.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-04-23 06:32:20 -04:00
Flavio Ceolin
9fd4ea91b7 coccinelle: Remove extra semicolon
coccicheck --mode=patch --cocci=semicolon.cocci

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-25 11:35:30 -05:00
Carles Cufi
59a51f0e09 debug: Clean up thread awareness data sections
There's no need to duplicate the linker section for each architecture.
Instead, move the section declaration to common-rom.ld.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2021-03-17 14:43:01 -05:00
Carles Cufi
d2465d6268 debug: Move away from openocd and make it generic
The exported structures that were originally introduced for OpenOCD have
since then been reused for other debugger plugins, including PyOCD and
Segger J-Link.

Rename the Kconfig option and the implementation from openocd to debug
thread info, so that it reflects the fact that this is no longer
specifically tied to OpenOCD.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2021-03-17 14:43:01 -05:00
Pete Skeggs
cb5ca42a0e debug: coredump: improve delayed logging
If CONFIG_LOG_IMMEDIATE=n, go to panic mode with LOG_PANIC() so full
coredump is logged.

Add missing log_strdup() call.

Signed-off-by: Pete Skeggs <peter.skeggs@nordicsemi.no>
2021-03-09 07:04:56 -05:00
Watson Zeng
f71cd2aaf5 spinlock: validate: fix the dependency with MP_NUM_CPUS
the implementation of spinlock validation uses two LSB bits in the
bottom of a pointer union to store a CPU index, which only has space
for 4 CPUS. the MP_NUM_CPUS should be <= 4.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-01-26 08:43:45 -05:00
Daniel Leung
d3218ca515 debug: coredump: remove z_ prefix for stuff used outside subsys
This removes the z_ prefix those (functions, enums, etc.) that
are being used outside the coredump subsys. This aligns better
with the naming convention.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
2b53f3ded2 debug: coredump: add new backend using flash partition
This adds another simple backend to use flash partition as
backing storage.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
6c569142ea debug: coredump: add shell commands for logging backend
This adds some shell commands to the logging backend. Since
this is a simple backend, only get/clear errors are
implemented.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
1dc813853a debug: coredump: add query and command APIs
This adds two new APIs to the coredump subsystem to perform
query and command. These can be used to query coredump subsys
for information, and to perform commands such as finding
out if there is a stored coredump.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
c4de586fbe debug: coredump: no need to track errors at frontend
The coredump frontend (mostly) consists of wrappers of backend
functions so there is really no need to track errors at
the frontend level. Let the backends deal with their own errors
and this simplifies the code a bit.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
236e7c7e33 debug: coredump: remove unused code
Originally there was a null backend but it was removed before
code was merged. However, some leftover code still refers to
this null backend. So remove the leftovers.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Anas Nashif
802d214582 debug: analyzer: add support for thread runtime stats
Add thread runtime statistics to the thread analyser.

With CONFIG_THREAD_RUNTIME_STATS enabled:

Booting from ROM..*** Booting Zephyr OS build zephyr-v2.4.0-2330-g77be0e93e65b  ***
thread_a: Hello World from cpu 0 on qemu_x86!
Thread analyze:
 thread_b            : STACK: unused 740 usage 284 / 1024 (27 %); CPU: 0 %
 thread_analyzer     : STACK: unused 8 usage 504 / 512 (98 %); CPU: 0 %
 thread_a            : STACK: unused 648 usage 376 / 1024 (36 %); CPU: 98 %
 idle 00             : STACK: unused 204 usage 116 / 320 (36 %); CPU: 0 %
thread_b: Hello World from cpu 0 on qemu_x86!
thread_a: Hello World from cpu 0 on qemu_x86!
thread_b: Hello World from cpu 0 on qemu_x86!
thread_a: Hello World from cpu 0 on qemu_x86!
thread_b: Hello World from cpu 0 on qemu_x86!
thread_a: Hello World from cpu 0 on qemu_x86!
thread_b: Hello World from cpu 0 on qemu_x86!
thread_a: Hello World from cpu 0 on qemu_x86!
Thread analyze:
 thread_b            : STACK: unused 648 usage 376 / 1024 (36 %); CPU: 7 %
 thread_analyzer     : STACK: unused 8 usage 504 / 512 (98 %); CPU: 0 %
 thread_a            : STACK: unused 648 usage 376 / 1024 (36 %); CPU: 9 %
 idle 00             : STACK: unused 204 usage 116 / 320 (36 %); CPU: 82 %
thread_b: Hello World from cpu 0 on qemu_x86!

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-14 13:00:47 -05:00
Anas Nashif
3d33d767f1 twister: rename in code
Some code had reference to sanitycheck, replace with twister.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-11 14:13:02 -05:00
Martin Åberg
2b1baf6e33 debug: openocd: Support for building on SPARC
This adds the pieces needed for openocd.c to compile when ARCH=SPARC.
In particular, it allows the tracing.osawareness.openocd sample to
build and run.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Flavio Ceolin
1b4ae345de debug: gdbstub: Send an error code when accessing invalid memory
GDB on host may ask the guest to read the a pointer contents even if
it is pointing to NULL. Send an error code when this occurs.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-02 20:54:57 -04:00
Flavio Ceolin
5408f3102d debug: x86: Add gdbstub for X86
It implements gdb remote protocol to talk with a host gdb during the
debug session. The implementation is divided in three layers:

1 - The top layer that is responsible for the gdb remote protocol.
2 - An architecture specific layer responsible to write/read registers,
    set breakpoints, handle exceptions, ...
3 - A transport layer to be used to communicate with the host

The communication with GDB in the host is synchronous and the systems
stops execution waiting for instructions and return its execution after
a "continue" or "step" command. The protocol has an exception that is
when the host sends a packet to cause an interruption, usually triggered
by a Ctrl-C. This implementation ignores this instruction though.

This initial work supports only X86 using uart as backend.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-02 20:54:57 -04:00
Daniel Leung
49206a86ff debug/coredump: add a primitive coredump mechanism
This adds a very primitive coredump mechanism under subsys/debug
where during fatal error, register and memory content can be
dumped to coredump backend. One such backend utilizing log
module for output is included. Once the coredump log is converted
to a binary file, it can be used with the ELF output file as
inputs to an overly simplified implementation of a GDB server.
This GDB server can be attached via the target remote command of
GDB and will be serving register and memory content. This allows
using GDB to examine stack and memory where the fatal error
occurred.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-24 20:28:24 -04:00