Provide power modes implementation for u5 socs.
For now STOP3 mode is not implemented as this mode is not
compatible with LPTIM activation and hence cannot be used
as a workable suspend to idle state using LPTIM as kernel
tick source.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When existing stop mode 1&2, VCO is set to range 4
and should be set back to range 1 to allow full speed
operations.
Rather than setting VCO at startup, set it inside clock
setting procedure so that it could done
in clock reset procedure when existing stop modes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enable i2c1 and i2c2 nodes on b_u585i_iot02a.
i2c1 is used as Arduino I2C
i2c2 is used as bus for HTS221 MEMS device.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This changes is an adaptation for the different boards
based on the SOC_STM32F412ZG that has been redifined
to SOC_STM32F412ZX
Signed-off-by: Francois Ramu <francois.ramu@st.com>
A new stm32f412vx devices is introduced.
The soc devices stm32f412cx, stm32f412vx, stm32f412zx are
removed to have a more generic stm32f412xx Kconfig.
The stm32cube modules stm32f412cx/vx/zx exists.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove CC1200 and CC2520 devicetree nodes from the test as they are not
sensors and are not being built by this test regardless.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adds build_all for ieee802154 drivers. A substantial number of drivers
are for SoC peripherals, so test cases are required many boards.
Fixes#11519.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Devices need to be resumed in the reverse order they are suspended.
e.g: devA +---> devB ---> devD
|
+---> devC
They are initialized in the following order, devA -> devB -> devC ->
devD, and suspended starting from the end of the list, devD -> devC ->
devB -> devA. When they are suspended they are temporary put in a list
that is used later to resume them.
This list has to be iterated from the end to the beginning, otherwise a
device may be resumed before its parent.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Remove two unused files that were left floating around when the
build_all sample was split up.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This updates Mbed TLS to 3.0 as well as trusted-firmware-m and mcuboot
to versions that also support this version.
Signed-off-by: David Brown <david.brown@linaro.org>
Mbed TLS 3.0 changes the configuration defines used to determine the
buffer size used for TLS. We were still setting the old one, which was
causing Mbed TLS to revert back to the large default buffer size. Set
both the in and out buffer sizes to match the config setting. A future
improvement may be to separate this into two configurations within the
Zephyr config.
Signed-off-by: David Brown <david.brown@linaro.org>
The psa-arch-tests project changed how third-party toolchains are
integrated. This broke the Zephyr sdk.
This patch aligns with the new mechanism.
https://github.com/ARM-software/psa-arch-tests/pull/276
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Mbed TLS 3.0 removes the definition for MBED_ERR_SSL_PEER_VERIFY_FAILED,
since non of its code ever returns that value. Since there isn't really
a perfect response, instead return a somewhat generic response
indicating this was unexpected.
Signed-off-by: David Brown <david.brown@linaro.org>
Moving to Mbed TLS 3.0 changes some of the Mbed TLS to better match the
PSA spec. Fix up the things where we are affected by these API changes.
Signed-off-by: David Brown <david.brown@linaro.org>
z_impl_sys_csrand_get is implement if the system is build with either
CONFIG_CTR_DRBG_CSPRNG_GENERATOR or CONFIG_HARDWARE_DEVICE_CS_GENERATOR.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Several fields of structures in mbedTLS 3.0 are now private. To access
them directly is necessary to define MBEDTLS_ALLOW_PRIVATE_ACCESS.
That is a temporary fix, the proper solution is not access directly
but using proper API.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Apply the modifications required by the newer library version.
These modifications came from the original file in the mbedTLS
repository.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Apply the modifications required by the newer library version.
These modifications came from the original file in the mbedTLS
repository.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Render Zephyr version in both, standalone Doxygen build and Sphinx
controlled build. In standalone mode, the package version given by
find_package(Zephyr...) is used, while in Sphinx build the conf.py
version is used.
The project brief has been shortened to make project title more compact
while still containing relevant information.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use the doxygen-awesome theme to improve the look and feel of the
Doxygen API documentation.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The mheap parameter documentation was missing for sys_multi_heap_fn_t.
This generates warnings on Doxygen 1.9.1.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Upgrade to Doxygen version 1.9.1. Package is downloaded directly from
the Doxygen official site, since it is not yet part of the latest Ubuntu
LTS. Note that libclang1-9 and libclang-cpp9 are runtime dependencies
required by Doxygen.
NOTE: Documentation can still be built with older Doxygen versions (e.g.
1.8.17 shipped with latest Ubuntu LTS), however, the template used in
upcoming patches claims to work better with Doxygen 1.9.1 or 1.9.2.
Using 1.9.1 as theme v1.6.0 has some issues on mobile view when using
Doxygen 1.9.2, see
https://github.com/jothepro/doxygen-awesome-css/issues/47.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The assert log of z_priv_stacks_ram_start failed to build due to passing
&z_priv_stacks_ram_start instead of just z_priv_stacks_ram_start.
Fixes#39190
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The mimxrt10xx evaluation boards that support the NXP USDHC IP
communicate unreliably with SD cards at 1.8V using the USDHC driver.
This commit temporarily disables 1.8V communication for all rt10xx
boards that currently support the USDHC driver.
Fixes#32289
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add a reference to the README and the folder itself from the modules
page. This is a more permanent alternative to using
ZEPHYR_EXTRA_MODULES for west users, so it logically belongs here.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Import any manifest files in a new 'submanifests' directory into
west.yml.
This lets users define custom zephyr modules or easily override
built-in modules by dropping their own manifest files into
submanifests/some-user-file.yaml.
Provide an example and a README with links to the relevant
documentation in 'submanifests' to get users started.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This name should be the same as cpus node in dtsi. After the power
policy is added, the cpu-power-states in the CPU properties can
be used.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Documents significant changes to sensor drivers in the v2.7.0 release,
including new drivers added and existing drivers modified.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes#38994, ARP messages were being sent to IPvXmcast MAC addresses
rather than the expected source MAC address or the broadcast address.
Signed-off-by: Robert Melchers <rmelch@hotmail.com>
If CONFIG_WIFI_ESP_AT_SCAN_MAC_ADDRESS: mac addr included in
scanning results.
if CONFIG_WIFI_ESP_AT_SCAN_PASSIVE: passive scanning is used instead of
default active scanning.
If CONFIG_WIFI_ESP_AT_SCAN_RESULT_RSSI_ORDERED: scanning response
ordered by RSSI.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
When mapping the following:
device_map(&base0, DEVA_BASE, DEVA_SIZE, K_MEM_CACHE_NONE);
device_map(&base1, DEVB_BASE , DEVB_SIZE, K_MEM_CACHE_NONE);
with:
- DEVA_SIZE not multiple of a 4KB granule L2 block size (0x200000)
- DEVB_SIZE more than 2 x 4KB granule L2 block size
The mmu code will fill the first device_map() in a L3 table, then
on the second mapping the mmu code will complete the previous L3
table.
At the end of this table, the actual code will select an L2 block
instead of a table because the *virtual address* is multiple with
the L2 block size.
But if the physical address is not, the virtual block offset will
be ORed to the physical address, and not added.
Leading to a weird scenario where virtual memory is duplicated
resulting of the addresses ORing and not addition.
Example:
device_map(&base0, DEVA_BASE, 0x20000, K_MEM_CACHE_NONE);
device_map(&base1, 0x44000000 , 0x400000, K_MEM_CACHE_NONE);
First will result in VA 0x5ffe0000 and second in VA 0x5fbe0000.
The MMU code will use a table to map 0x5ffe0000 to 0x5fbfffff.
For 0x5fc00000 to 0x5fdfffff, since the VA is multiple of an L2
block size, the L3 table is not used.
But the L2 block description entry address is 0x44060000, meaning
that for each access in this L2 block, the following will be done:
0x44060000 | (VA & 1FFFFF)
This is working for the 0x5fc40000 to 0x5fc5ffff access, but for the
0x5fbc60000 (0x5fbe0000 + 0x80000) access the PA gets calculated as :
0x44060000 | (0x5fc60000 & 1FFFFF) = 0x44060000 | 0x60000 = 0x44060000
Instead of the expected 0x44080000.
The solution is to check if the PA descriptor is aligned with the
level block size, if not move to the next level.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This commit allows let build echo_server sample with
overlay-netusb.conf.
USB subsystem must be enabled by the application.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Implements mechanism similar to the one available in net/lib/sockets.c
(since the merge of #27054) in sockets_can to enable parallel rx/tx.
Fixes#38698
Signed-off-by: Mateusz Karlic <mkarlic@internships.antmicro.com>
On LSM6DSO sensor the INT1 pin is used for both generating the drdy
interrupt and for switching to I3C hotjoin mode just after reset if
it is at logical '1' level. It might happen that after a board
reset the logical level '1' is preserved (maybe a level shifter)
forcing the LSM6DSO to enter erroneously in I3C mode, breaking any
attempt to communicate with it. (Fix#38902)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
