Set integration_platforms on these tests to just native_posix. This
should be sufficient to make sure these tests build and run.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Set SEARCH_PATH to "." instead of `pwd` if not set explicitly. This
avoids the construction of paths that contain `pwd` twice in test
scripts such as ll.1.sh.
Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
a0 is used as scratch register. Restore value of a0 (return address)
from stack frame before spilling registers on stack
Signed-off-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
Document the GATT APIs not waiting for TX context when being called
from the system workqueue context. This is because the TX contexts
are freed by the system workqueue so blocking would cause a deadlock.
The number of TX contexts are by default equal to the number of
TX buffers in the system. Since TX contexts is allocated after a buffer,
but freed from a lower priority than the buffer then there can be more
allocated TX contexts than TX buffers.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Remove the incorrect documentation note about the indication callback
being called from the system workqueue.
The callback will be called by the RX thread once the confirm indication
response has been received.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Assert if the null pointer de-referencing detection (via DWT) is
enabled when the processor is in debug mode, because the debug
monitor exception can not be triggered in debug mode (i.e. the
behavior is unpredictable). Add a note in the Kconfig definition
of the null-pointer detection implementation via DWT, stressing
that the solution requires the core be in normal mode.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Added an entry in the release notes for v2.6.0 release,
mentioning the support for null pointer dereferencing
detection.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We introduce build time asserts for
CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_PAGE_SIZE
to catch that the user-supplied value has, as requested
by the Kconfig symbol specification, a power of 2 value.
For the MPU-based implementation of null-pointer detection
we can use an existing macro for the build time assert,
since the region for catching null-pointer exceptions
is a regular MPU region, with different restrictions,
depending on the MPU architecture. For the DWT-based
implementation, we introduce a custom build-time assert.
We add also a run-time ASSERT for the MPU-based
implementation in ARMv8-M platforms, which require
that the null pointer exception detection page is
already mapped by the MPU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add a test case for the null pointer dereferencing detection
feature in Cortex-M. The test case is added in arm_interrupt
test suite and the README file is updated accordingly.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
By design, the DebugMonitor exception is only employed
for null-pointer dereferencing detection, and enabling
that feature is not supported in Non-Secure builds. So
when enabling the DebugMonitor exception, assert that
it is not targeting the Non Secure domain.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enable the null-pointer dereferencing detection by default
throughout the test-suite. Explicitly disable this for the
gen_isr_table test which needs to perform vector table reads.
Disable null-pointer exception detection on qemu_cortex_m3
board, as DWT it is not emulated by QEMU on this platform.
Additionally, disable null-pointer exception detection on
mps2_an521 (QEMU target), as DWT is not present and the MPU
based solution won't work, since the target does not have
the area 0x0 - 0x400 mapped, but the QEMU still permits
read access.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Implementation for null pointer exception detection feature
using the MPU on Cortex-M. Null-pointer detection is implemented
by programming an MPU to guard a limited area starting at
address 0x0. on non ARMv8-M we program an MPU region with
No-access policy. On ARMv8-M we program a region with any
permissions, assuming the region will overlap with fixed
FLASH0 region. We add a compile-time message to warn the
user if the MPU-based null-pointer exception solution can
not be used (ARMv8-M only).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Padding inserted after the (first-stage) vector table,
so that the Zephyr image does not attempt to use the
area which we reserve to detect null pointer dereferencing
(0x0 - <size>). If the end of the vector table section is
higher than the upper end of the reserved area, no padding
will be added. Note also that the padding will be added
only once, to the first stage vector table, even if the current
snipped is included multiple times (this is for a corner case,
when we want to use this feature together with SW Vector Relaying
on MCUs without VTOR but with an MPU present).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Additions to the null-pointer exception detection mechanism
for ARMv8-M Mainline MCUs.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Implement the functionality to detect null pointer dereference
exceptions via the DWT unit in the ARMv7-M Mainline MCUs.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When we enable the null pointer exceptino feature (using DWT)
we include debug.c in the build. debug.c contains the functions
to configure and enable null pointer detection using the Data
Watchdog and Trace unit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Extend the debug monitor exception handler to
- return recoverable faults when the debug monitor
is enabled but we do not get an expected DWT event,
- call a debug monitor routine to check for null pointer
exceptions.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Move the DWT utility functions, present in timing.c
in an internal cortex-m header.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Introduce the required Kconfig symbol framework for the
Cortex-M-specific null pointer dereferencing detection
feature. There are two implementations (based on DWT and
MPU) so we introduce the corresponding choice symbols,
including a choice symbol to signify that the feature
is to be disabled.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Either get priority from devicetree (liteeth) or remove Kconfig symbols
that aren't used anywhere for IRQ priority (gecko, stm32_hal).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The stream_flash_buffered_write, when invoked to do flush write, will
attempt to write the tail bytes from the buffer, filling the required
minimal write block size with erase value bytes; after write it rewinds
the buffer offset, bytes_written, by number of the "filler bytes".
Doe to lack of return code processing from flash_sync call, two things
would happen to context in case of failure:
1) the ctx->bytes_written would be rewind pass the value it had before
function call as it gets decremented by "filler bytes" even if write
failed;
2) the ctx->buf_bytes offset would be accounting for added "filler
bytes" which should not be counted as data in buffer.
Proper processing of return code has been added to remove effects
described above.
Unit tests have been expended to cover the scenarios.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The stream_flash_buffered_write used to read byte from flash, in front
of the current buffer pointer, to obtain value of errased flash;
the code has been replaced with obtaining the value from flash
parameters.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit moves block that checks if flash_stream_ctx.buf_bytes
is non-zero out of CONFIG_STREAM_FLASH_ERASE specific code, as that is
universal check and is valid also for not CONFIG_STREAM_FLASH_ERASE
code.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The flash_sync function is able to call, if specified, write
verification callback to check whether data flash has been correctly
written to a flash. Part of that procedure is to read date back of
the flash and call the verification callback on the buffer;
in case if the read would fail, the flash_sync would return,
with an error code, without updating stream_flash_ctx.
The same logic should be applied to failed verification, but, due to
missing return, the stream_flash_ctx gets updated with probably
incorrectly written bytes added to total bytes_written and buf_bytes,
representing number of bytes awaiting in buffer, being zeroed.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The stream_flash_erase_page would update stream_flash_ctx member
last_erased_page_start_offset, to page offset it attempted to erase,
even if such operation failed.
The commit changes this behaviour so that in case of failure the
last_erased_page_start_offset would still hold previously, successfully,
erase page offset.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Such instance is needed for building drivers that use DEVICE_DT_GET()
to get the pointer to the GPIO controller device structure.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unused symbols and related sections from the linker script. In
particular CONFIG_IS_BOOTLOADER and CONFIG_CODE_DATA_RELOCATION are not
currently supported on AArch64.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Looking at the data sheet for the npcx section 4.15.5 CR_UART Core
Registers, the UICTRL register that is used in the npcx poll
functions is invalid when running in FIFO mode. Instead, calls to
uart_npcx_poll_in and uart_npcx_poll_out should be redirected to
their respective FIFO read/fill functions (when using interrupts).
Changes:
- When calling uart_poll_in: forward the request to uart_fifo_read.
- When calling uart_poll_out: loop until uart_fifo_fill returns
non-0 (we wrote 1 byte).
Signed-off-by: Yuval Peress <peress@chromium.org>
Simple reorg of the function declarations. This change moves
the interrupt driven functions declared at the bottom of the
uart_npcx.c file to the top, clustered under the same ifdef.
Signed-off-by: Yuval Peress <peress@chromium.org>
All dma drivers are devicetree based now so we can remove the last
bits of Kconfig associated with the old driver style.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can utilize the devicetree macros to determine which instances to
enable. This will allow us to phase out the per instance Kconfig
symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Nothing sets the op mode to anything but master. For now default the
mode to master-only and we can determine a devicetree property in the
future if we need to support other configurations.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace Kconfig symbols SPI_DW_PORT_n_INTERRUPT_SINGLE_LINE with just
seeing how many IRQs are defined in the devicetree to determine single
or multiline interrupt support.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SoC that utilized the clock support isn't supported in Zephyr
anymore and there are no users of this code. Remove it for now as it
should get converted to utilize devicetree if needed in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The compiler was inserting additional redundant loads in many
`sys_dlist_*` APIs, in case writes aliased with previous reads.
However, these additional reads are unnecessary, as the only cases
where the aliasing would matter would be a violation of the `dlist`
API contract (e.g. if node->next == node but node->prev != node).
This is decidedly a micro-optimization.
Signed-off-by: James Harris <james.harris@intel.com>
Enable the driver for the Kinetis Digital-to-Analog (DAC) modules
present in the NXP Kinetis K2x SoC series.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Add device tree nodes for the Digital-to-Analog (DAC) modules present
in the NXP Kinetis K2x series.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>