Rename the board name to `scobc-a1`, and update the board's full name
to `SC-OBC Module A1`. And update the output of the `Hello World`
sample to match the latest Zephyr version.
Then, The supported feature section was replaced with a hw-directive
block.
Signed-off-by: Takuya Sasaki <takuya.sasaki@spacecubics.com>
In the EM (Engineering Model), the board was referred to as
"Space Cubics Module 1". Starting with the FM (Flight Model) release,
we are officially renaming it to:
`SC-OBC Module A1`
Accordingly, the board name is updated from `scobc_module1` to
`scobc_a1`.
Signed-off-by: Takuya Sasaki <takuya.sasaki@spacecubics.com>
set CONFIG_TIMESLICE_SIZE to 0 to disable time slicing.
Certain boards like nucleo_g071rb, nucleo_f091rc,
nucleo_l073rz will not start consecutive samplings as fast
as possible.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Test that the output of `adc_raw_to_microvolts_dt` matches the output of
`adc_raw_to_millivolts_dt` to the resolution of the latter.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add a family of functions that convert to microvolts instead of
millivolts. The resolution of an ADC with a 600 mV reference and a 12
bit output (nRF SAADC for example) is an order of magnitude better than
millivolts (0.146 mV), even before considering non-unity gains.
Signed-off-by: Jordan Yates <jordan@embeint.com>
The xsi single process test suite requires something like 256 bytes
of heap space. There is no legitimate reason to require 24kB of
ram.
This gets rid of a twister error
```
Error found: portability.xsi.single_process.newlib on
qemu_cortex_m0/nrf51822 (Not enough RAM but is one of the integration
platforms)
```
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
The arduino Uno R4 has only ioport1 enabled in the dts. The arduino
header however uses ioport0,1,3 [minima variant] and ioport 0,1,3,4
[wifi variant]. This causes a build failure for some of the pins.
This change makes sure than an application can use any arduino pins.
Signed-off-by: Loic Domaigne <tech@domaigne.com>
Initial commit for SPI driver support on RSK_RX130@512KB board
with RSPI module
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Minh Tang <minh.tang.ue@bp.renesas.com>
Add the `qemu_cortex_a53` configuration to run the build test
for the VIRTIO MMIO driver.
To add this test, we have split the virtio-pci and virtio-mmio test cases.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add `virtio-mmio` nodes that are retrieved from qemu internal
devicetree dump, to dts.
Also, enable the virtio-rng device on the command line.
Note: Ideally, it would be possible to dynamically generate the
command line by looking at the devicetree state,
but this PR is a fixed implementation to simplify it.
This will be addressed separately.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Since `VirtIO` is not the official notation,
unify the name to `VIRTIO`.
In the text, `Virtio` and `virtio` can also be used
depending on the context.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Includes explanation of the min-heap’s properties, constraints and
explains about the uses cases of min-heap. It also contains references
to Sample Application and min-heap API
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Introduce a simple sample application demonstrating the usage of the
min-heap API. The sample performs basic insert and remove operations
and logs the results to the console.
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Introduce test suite using Ztest for validating the min-heap API.
Covers insertion, removal, ordering, and custom comparators.
The tests verify correct behavior under both static and dynamic
initialization modes.
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Introduce a binary min-heap implementation as a generic data structure
for use in kernel and application code. A min-heap always maintains
the smallest element at the root, making insertion and removal of the
minimum element efficient (O(log n)).
The API allows both static and dynamic initialization, supports custom
comparators.
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Improvements include: check error codes, log level adjustments,
removed unreachable code, disable tilt when not used, call optimized
interrupt handler when tilt and tap are not used.
Signed-off-by: Ivan Wagner <ivan.wagner@tecinvent.ch>
The difference between __irq_disable() and irq_lock() is that the former
essentially translates to `cpsid i`, whereas `irq_lock()` translates to
setting BASEPRI (on cores with BASEPRI). This means that using
irq_lock() does not disable zero-latency interrupts (ZLIs), which
reduces the potential execution latency of ZLIs.
In both isr_wrapper and _arch_isr_direct_pm() (which is just
really an implementation of ISR_DIRECT_PM()), we were using
__irq_disable() to disable all interrups, including ZLIs. But the code
executed with interrupts disabled handles waking up from idle, and so
must only be protected against regular interrupts being executed, not
ZLIs, which should have no effect on the correct execution of the code.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Replace UTIL_AND(DT_INST_NODE_HAS_PROP(... construction with the
DT_INST_PROP_OR helper macro.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
