Commit graph

47919 commits

Author SHA1 Message Date
Shubham Kulkarni
ca39c7edd7 soc: esp32: linker: Fix backtrace for Invalid cache access exception
This change moves .rodata for panic handler and fatal.c into DRAM
Moves panic handler and its dependent functions into IRAM

Signed-off-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
2021-01-23 08:43:10 -05:00
Shubham Kulkarni
8b7da334d5 arch: xtensa: Print backtrace from panic handler
This change uses stack frame to print backtrace once exception occurs
Printing backtrace helps to identify the cause of exception

Signed-off-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
2021-01-23 08:43:10 -05:00
Torsten Rasmussen
774103d050 cmake: pristine.cmake requires SOURCE_DIR and BINARY_DIR as arguments
Calling cmake/pristine.cmake now requires SOURCE_DIR and BINARY_DIR as
arguments.

This ensures that pristine.cmake can evaluate if pristine is requested
on in-source builds, and bail out in such case with an error message.

All uses of `pristine.cmake` has been updated to use the new arguments.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-01-23 08:31:13 -05:00
Martin Jäger
0520ec814b samples: drivers: adc: add ADC example
This sample shows how to use the ADC API. Depending on the support of
sequential reads in the driver, 1 or 2 channels are read and printed.

A devicetree overlay is necessary to specify the used ADC channel(s).

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-01-23 08:27:46 -05:00
Martin Jäger
3c7b2771b1 drivers: adc: stm32: Fix sequence configuration
The STM32 driver currently does not support reading a sequence of
multiple ADC channels. Only the first channel of the sequence was
read and the rest was silently ignored.

Fix: Return an error if reading multiple channels is requested.

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-01-23 08:27:46 -05:00
Andrei Gansari
6055f25b13 samples: mpu_test: support for lpc flash driver
Adds support for legacy LPC IAP flash driver.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-23 08:01:00 -05:00
Andrei Gansari
6d86a6a139 soc: lpc54xxx: add memory controller definitions
Adds device tree and kconfig definitons to use legacy LPC IAP flash
driver.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-23 08:01:00 -05:00
Andrei Gansari
c450130446 modules: mcux: HAS_MCUX_IAP_LEGACY config
Adds HAS_MCUX_IAP_LEGACY configuration for legacy LPC IAP flash driver.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-23 08:01:00 -05:00
Andrei Gansari
6587c93aa9 drivers: soc_flash_lpc: LPC legacy flash driver
Older LPC platforms use Flash IAP with a command style firmware command.
Tested on LPC54114 platform.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-23 08:01:00 -05:00
peng1 chen
1e05bc2300 i2c_test: add a testcase to test i2c api for microchip board
test i2c api on microchip mec15xxevb_assy6853 board by writing
and reading data with nxp pca95xx device on board.

Signed-off-by: peng1 chen <peng1.chen@intel.com>
2021-01-23 01:34:10 -05:00
Anas Nashif
d95a5f9b35 tests: fifo: exclude m2gl025_miv
Excluding while we figure out the issue with this failing sporadically.
See bug #31549.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-23 00:42:13 -05:00
Anas Nashif
e6d3fc6700 test: schedule_api: increase timeout
Some qemu plaforms might need some more time.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-23 00:42:13 -05:00
Alexey Brodkin
7e8fa999bf ARC: QEMU: Enable icount support
This allows to get much more reproducible results in terms of
amount of tests passed & failed.

But note it requires QEMU for ARC with icount support!

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2021-01-23 00:42:13 -05:00
Alexey Brodkin
c1d5229549 Revert "tests: Exclude qemu_arc{em|hs} in some"
This reverts commit b98058ecd0.

With icount finally working in QEMU for ARC these tests start to
pass reliably, so no need to exclude them any longer.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2021-01-23 00:42:13 -05:00
Alexey Brodkin
3cd64c91bd Revert "tests: exclude qemu_arc_hs in lifo_usage test"
This reverts commit 6f4f5b1fe5.

With icount finally working in QEMU for ARC these tests start to
pass reliably, so no need to exclude them any longer.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2021-01-23 00:42:13 -05:00
Alexey Brodkin
47944bd12e Revert "tests: kernel: lifo_usage: Exclude on qemu_arc_em"
This reverts commit 27d42f060d.

With icount finally working in QEMU for ARC these tests start to
pass reliably, so no need to exclude them any longer.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2021-01-23 00:42:13 -05:00
Anas Nashif
7f44d74433 doc: fix typo trough -> through
Fix common typo.

Fixes #31543

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 17:53:06 -05:00
Kamil Gawor
3856547230 soc: arm: nrf5340: Arduino connectors
Add the Arduino connectors definitions for
the nRF5340DK and PDK.

Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
2021-01-22 23:37:19 +01:00
Eugeniy Paltsev
fd5fa203b6 linker: common-rom: tweak section naming to feet all linkers
MWDT toolchain adds additional suffix to sections name in case of
ffunction-sections / fdata-sections are enabled.

The 40d3653758 commit
(device: add post-process of elf file to manage device handles)
breaks linkage with MWDT toolchain as it adds new sections
which are not meet MWDT requirements.

Let's pick a single set of rules and syntax that work for all
toolchain.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-01-22 15:44:20 -05:00
Torsten Rasmussen
11016415dd doc: supporting module Kconfig code in module ext root
Fixes: #31486

Sourcing `cmake/extensions.cmake` to have Zephyr functions available
when including Zephyr CMake files into doc build system.

This is a follow up on #30904 by supporting generated Kconfig files
that might contain lines as `osource "$(ZEPHYR_<MODULE_NAME>_KCONFIG)"`
to be properly parsed for doc building.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-01-22 15:22:32 -05:00
Kumar Gala
895277f909 x86: Fix zefi.py creating valid images
When zefi.py was changed to pass compiler and objcopy the flag to
objcopy for the EFI target was dropped.  This is because the current
SDK (0.12.1) doesn't support that target type for objcopy.  However,
target is necessary for the images to be created correctly and boot.

Switch back to use the host objcopy as a stop gap fix, until the SDK
can support target for EFI.

Fixes: #31517

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-01-22 12:41:27 -05:00
Ioannis Glaropoulos
b0a85fb855 tests: kernel: thread: increase heap mem pool size
Increase the heap memory pool size in the
prj_armv8m_mpu_stack_guard.conf, to match
the value in the default configuration in
proj.conf (and fix an out-of memory issue
when allocating a kernel object).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-01-22 12:39:25 -05:00
Anas Nashif
cb67b2c7af MAINTAINER: various path updates/additions
More coverage for various areas, no maintainer changes..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 18:38:20 +01:00
Nicholas Lowell
ce480e8577 posix: clock: nanosecond resolution
directly convert ticks to nsecs in the clock_* posix
functions which will provide the best resolution the
system allows

Signed-off-by: Nicholas Lowell <nlowell@lexmark.com>
2021-01-22 12:37:58 -05:00
Robert Lubos
a42d6c98d3 drivers: ieee802154_nrf5: Block on net_pkt allocation in the RX path
Currently, if no net_pkt's are available, the radio driver RX thread
drops the 802.15.4 frame silently. This causes undesired behaviour,
where we can drop the packet which has already been acknowledged at
the 802.15.4 level.

Fix this, by blocking the RX thread if no net_pkt is avaliable. The
packets received while the RX thread is blocked will be accumulated in
the underlying nRF 802.15.4 driver, and eventually when it runs out of
internal buffers before the thread is unblocked, it'll stop
acknowledging the incoming frames.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-01-22 18:48:18 +02:00
Maureen Helm
a8d3c8e142 samples: flash_shell: Run on boards without zephyr,flash-controller
The flash shell can now build when there isn't a chosen
zephyr,flash-controller available, so we can simplify the filter to
apply this sample to more boards.

Two STM32 H7 board configurations are excluded because the flash driver
isn't supported yet on the M4 core.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
2c46824824 drivers: flash: Fix flash shell to work without dts chosen node
The flash shell can work with any flash driver instance, not just the
one chosen by zephyr,flash-controller. It's helpful for the flash shell
to use this instance by default, but not required. We can switch
instances at runtime with the "flash set_device" command.

Fix the flash shell so it can build when there isn't a chosen
zephyr,flash-controller available.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
cce08a46c4 samples: fs: Extend littlefs sample to mimxrt1064_evk
Adds the mimxrt1064_evk board to the platform_allow list for the
littlefs sample application.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
7ae122dce0 boards: arm: Configure FlexSPI QSPI flash on mimxrt1064_evk
Enables the FlexSPI NOR flash driver, configures the FlexSPI pins, and
updates the board documentation accordingly on the mimxrt1064_evk.

Note that this SoC has two FlexSPI instances: one instance has an
in-package QSPI flash used for XIP; the other instance has a board-level
QSPI flash used for storage, not XIP. This patch enables the flash
driver on the non-XIP flash only.

Tested with:
  - samples/subsys/fs/littlefs
  - samples/drivers/flash_shell

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>

boards: arm: Rename flexspi_qspi to flexspi_nor for mimxrt1064_evk

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
c489cf99e2 soc: arm: Enable FlexSPI flash driver on i.MX RT family
Enables the FlexSPI flash driver on the i.MX RT SoC family and
configures the peripheral clocks accordingly. We are careful to only
configure the peripheral clocks if we are not executing in place from
the FlexSPI flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
b0bd5a6ece drivers: flash: Introduce i.MX RT FlexSPI driver
Introduces a new flash driver for the FlexSPI peripheral on i.MX RT
SoCs. The hardware provides a flexible sequence engine (LUT) that
supports various types of external devices, including serial NOR flash,
serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It
supports up to four connected devices in single/dual/quad/octal modes
and provides memory-mapped read/write access to these devices through
the AHB bus.

The driver implementation consists of a shared controller for each
FlexSPI peripheral instance, and protocol-specific device drivers for
each external device. The controller provides a private interface for
multiple devices to access the FlexSPI peripheral registers. FlexSPI
devices provide the public flash driver interface to applications or
subsystems like storage or flash file systems; they also provide
protocol-specific LUT sequences to the controller.

Currently the only device type supported is QSPI NOR flash, but other
types like HyperFlash will be added later.

XIP is not yet supported, as this requires additional work to relocate
code to RAM and managing interrupts.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
52b77ac956 dts: boards: arm: Rework FlexSPI bindings on i.MX RT boards
Reworks the NXP FlexSPI device tree bindings to configure controller and
device properties needed for an upcoming FlexSPI flash driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
17ce756ce3 boards: arm: Clean up HyperFlash dts nodes on mimxrt10{50,60}_evk
Cleans up the HyperFlash device tree nodes on the mimxrt1050_evk and
mimxrt1060_evk_hyperflash boards to be more consistent with other
FlexSPI child nodes.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
f3a64b037e boards: arm: Add qspi flash dts node to mimxrt1064_evk
Copies the QSPI flash device tree node from the mimxrt1060_evk to the
mimxrt1064_evk board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm
1883c85abd modules: nxp_imx: Add HAS_MCUX_FLEXSPI
Adds a hidden config symbol HAS_MCUX_FLEXSPI selected by NXP SoCs when
the FlexSPI peripheral is present. It will be used as a dependency for a
new FlexSPI flash driver to prevent users from accidentally enabling the
driver on platforms that don't have the necessary hardware.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Daniel Leung
4e8abfcba7 x86: use TSC for timing information
This changes the timing functions to use TSC to gather
timing information instead of using the timer for
scheduling as it provides higher resolution for timing
information.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-22 11:05:30 -05:00
Mattias Säteri
cf4295d106 native_posix: Add flags to fs_open invocation
Added flags that were missing from fs_open() call.

Signed-off-by: Mattias Säteri <mattias.sateri@flir.com>
2021-01-22 10:37:57 -05:00
Nicolas Pitre
a2011d8af9 z_heap_aligned_alloc(): avoid memory wastage
The strategy used in z_heap_aligned_alloc() was to allocate an extra
align-sized memory block for storing a pointer to the memory heap.
This is wasteful in terms of memory usage when alignment is larger
than a pointer width. A loop is needed to find the initial memory
start when freeing it which isn't optimal either.

Instead, let's have sys_heap_aligned_alloc() rewind a pointer after
it is aligned to make just enough room for storing our heap reference.
This way the heap reference is always located immediately before the
aligned memory and any unused memory is returned to the heap.

The rewind and alignment values may coincide in which case only
the alignment is necessary anyway.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-01-22 10:04:43 -05:00
Xavier Chapron
47da2bed27 drivers: modem: sara-r4: Add sanity timeout for @ prompt
This wait on @ prompt was added in
fa3d586483.
The situation were the @ prompt is never received should not occurs,
however it's definitively safer to catch it instead of having a
deadlock.

Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
2021-01-22 10:04:11 -05:00
Piotr Pryga
609701fa21 Bluetooth: controller: radio: Fix compilation error
Fix compilation error caused by use of wrong header file:
nrfx/hal/nrf_radio.h instead of hal/nrf_radio.h.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-01-22 09:49:03 -05:00
Hake Huang
3940b407d9 driver: update gpt driver to support internal divider by dts
using dts support gpt clock source and divider

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Hake Huang
2a6657f952 clocks: ccm add gpt clock control into ccm driver
add clock frequence support for gpt

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Hake Huang
2a8a580825 clocks: add clock api for gpt
add clock api for gpt

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Hake Huang
38c53b6347 dts-binding: dts/bindings/timer: add gpt freq in dts binding
add gpt freq in dts binding

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Hake Huang
2d7f2a0f26 dts: add nxp gpt freq setting in dts
gpt has internal divider, add dedicated attributes
nxp,gptfreq is added as required one
gpt can customize the gpt freq

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Watson Zeng
f27e7bccf9 arc: sys_io: fix sys_read32 return value from uint16_t to uint32_t
Fix sys_read32 return value from uint16_t to uint32_t.
Current implementation causes read/modify/write of 32bit
registers to fail on the high bits.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-01-22 09:32:09 -05:00
Flavio Ceolin
f38ba314ea soc: nordic: Disable PM for SOC_NRF5340_CPUNET_QKAA
This targets was previously enabling PM but the code was doing nothing
because the logic was under an unsatisfied ifdef condition.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
7f48e992e8 soc: efm32wg: Select SOC_GECKO_CORE if pm is enabled
Power management requires core interrupt handling.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
321ce7fb77 power: Use substate-id in pm subsystem
Change subsystem to use struct pm_state with substate-id instead of
using only the power state category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
c5e82ecec3 power: Add substate-id property for a power state
There are platforms that have multiple states that maps to a specific
Zephyr power state. To accommodate this sort of situation this commit
adds an additional property to a power state that can be used by the
platform.

The power state now consists of two properties, a category and a
substate-id. The former property is the current power state.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00