Cleanup and preparation commit for linker script generator.
Zephyr linker scripts provides start and end symbols for each larger
areas in the linker script.
The symbols _image_rom_start and _image_rom_end corresponds to the group
ROMABLE_REGION defined in the ld linker scripts.
The symbols _image_rodata_start and _image_rodata_end is not placed as
independent group but covers common-rom.ld, thread-local-storage.ld,
kobject-rom.ld and snippets-rodata.ld.
This commit align those names and prepares for generation of groups in
linker scripts.
The symbols describing the ROMABLE_REGION will be renamed to:
_image_rom_start -> __rom_region_start
_image_rom_end -> __rom_region_end
The rodata will also use the group symbol notation as:
_image_rodata_start -> __rodata_region_start
_image_rodata_end -> __rodata_region_end
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This enables qemu_x86_tiny to be used for more general demand
paging testing where non-pinned code and data is not available
in physical memory at boot. This adds a custom linker script to
qemu_x86_tiny for pinning code and data. In the process, a new
kconfig CONFIG_BOARD_QEMU_X86_TINY has to be introduced to
distinguish from other qemu_x86* boards. This linker script
is based on the generic x86-32 one in
include/arch/x86/ia32/linker.ld, with additions to
put symbols into boot and pinned sections.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
add a config CONFIG_QEMU_UEFI_BOOT to indicate whether
the qemu will use UEFI bootable method;
add a new test "sample.basic.helloworld.uefi" to verify
UEFT bootable method on qemu_x86_64 platform.
Signed-off-by: Chen Peng1 <peng1.chen@intel.com>
This board was added to test coverage feature when coverage was
introduced. This is now being testing with other boards and
configurations on a regular basis, so no need for this extra overhead in
CI.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This enables the kconfig options so that the board would be
using boot and pinned linker sections.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Since CONFIG_KERNEL_VM_OFFSET no longer needs to be the same as
CONFIG_SRAM_OFFSET, set it to zero to reclaim the hole in
virtual address space.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The linker script has been updated to have correct load address
in the ELF file, so there is no need for the horrible hack.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There is no need to use this kconfig, as the phys-to-virt
offset is enough to figure out if the kernel is linked in
virtual address space in gen_mmu.py.
For code, use Z_VM_KERNEL instead.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a new qemu_x86_virt board where code and data are
mapped in virtual address space and is actually executing within
virtual address space.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This changes x86 to use CONFIG_SRAM_OFFSET instead of
arch-specific CONFIG_X86_KERNEL_OFFSET. This allows the common
MMU macro Z_BOOT_VIRT_TO_PHYS() and Z_BOOT_PHYS_TO_VIRT() to
function properly if we ever need to map the kernel into
virtual address space that does not have the same starting
physical address.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This driver emulates a EEPROM device in flash.
Reworked implementation with modified flash layout.
The emulation represents the EEPROM in flash as a region that is a
direct map of the eeprom data followed by a region where changes to
the eeprom data is stored. Changes are written as address-data
combinations. The size of such a combination is determined by the
flash write block size and the size of the eeprom (required address
space), with a minimum of 4 byte.
The eeprom page needs to be a multiple of the flash page. Multiple
eeprom pages is also so supported and increases the number of writes
that can be performed.
The eeprom size, pagesize and the flash partition used for the eeprom
are defined in the dts. The flash partition should allow at least two
eeprom pages. For fast read access a rambuffer can be enabled for the
eeprom (by setting the option rambuf in the dts).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
All x86 QEMU boards have a hard-coded memory size of 9MB which
does not corresponding with what is defined in device tree.
So make use of CONFIG_SRAM_SIZE to provide correct memory size.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
QEMU provides multiboot information by default so we can
use the provided memory map to mark reserved physical
memory. Note that 64-bit requires Multiboot2 which
currently both Zephyr and QEMU do not support, hence
it's not enabled for qemu_x86_64.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The default KERNEL_VM_SIZE if ACPI=y is too large for QEMU targets
which results in page tables being too big to fit in available
memory. So limit the VM size to a more reasonable one.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add a new Kconfig CONFIG_BUILD_OUTPUT_EFI and select that for boards
that want to generate an EFI application.
Make qemu_x86_64 also generate an EFI file, however do not enable this
by default yet.
Goal is to boot qemu using EFI to be able to test this path in the
future.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We no longer use a page pool to draw memory pages when doing
memory map operations. We now preallocate the entire virtual
address space so no allocations are ever necessary when mapping
memory.
We still need memory to clone page tables, but this is now
expressed by a new Kconfig X86_MAX_ADDITIONAL_MEM_DOMAINS
which has much clearer semantics than specifying the number
of pages in the pool.
The default address space size is now 8MB, but this can be
tuned by the application.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Just tell the kernel that RAM starts 1MB in, period.
Better simulation of a low-memory microcontroller as
we're not managing a very large number of page frames
we'll never use.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We no longer use a page pool to draw memory pages when doing
memory map operations. We now preallocate the entire virtual
address space so no allocations are ever necessary when mapping
memory.
We still need memory to clone page tables, but this is now
expressed by a new Kconfig X86_MAX_ADDITIONAL_MEM_DOMAINS
which has much clearer semantics than specifying the number
of pages in the pool.
The default address space size is now 8MB, but this can be
tuned by the application.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Just tell the kernel that RAM starts 1MB in, period.
Better simulation of a low-memory microcontroller as
we're not managing a very large number of page frames
we'll never use.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This build target has all the low-memory options enabled for
memory management: a 4MB address space, 32-bit paging mode,
no KPTI, an empty page pool, and common page tables for
memory domains.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
These are set such that we have enough pages in the pool
for typical driver mappings and to instantiate two more
memory domains, which is what our tests require.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
In the flash partition definitions for ARM boards,
the link to the legacy partition macros does not
exist any more. The commit cleans up the partition
definition by removing this link.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We added support for 32-bit page tables, without PAE.
Add a build target to ensure it doesn't bit-rot.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Limit to kernel tests, this should not try and run every sample or test
we have as it only verifies the coverage feature, but not collecting
coverage.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We now have a variant x86 build target that only is run
for tests tagged with "xip", which is this one.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
* Rename DT_SRAM_SIZE to DT_DRAM_SIZE since that is more correct
* Remove mmio-sram compatible since that is not correct for DRAM.
* Rename node label from sram0 to dram0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Instead of endlessly repeating the same command line args,
centralize this and tune the shift value on a per-board
basis.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
QEMU icount does not work correctly when more than 1 CPU is used,
but works fine with only 1 CPU enabled. So we can enable icount
on qemu_x86_64 when CONFIG_MP_NUM_CPUS=1. Sanitycheck goes from
~158 seconds to ~113 seconds on my dev machine.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
With addition of flash_get_parameters API call, it is needed to provide
support for the API to flash drivers.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Enable icount mode for qemu_x86 platform, The icount shift value is
selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
For HPET devices, configure it with fixed delivery mode because HPET
timer interrupt is needed to fuel the scheduler for all CPUS.
For all other type of devices, like UART, I2C, GPIO, Ethernet, etc.
configure them as lowest priority delivery mode, in which IO APIC
delivers the interrupt to the processor core that is executing at the
lowest priority among all the processors listed in the specified
destination. In this case, the device drivers can avoid the trouble of
handling repeated interrupts delivered to all CPUS.
Signed-off-by: Zide Chen <zide.chen@intel.com>
Options summary:
-icount shift=5: Execute one instruction every 32ns of virtual time
-icount align=off: Do not synchronise the host and guest clocks
-icount sleep=off: Advance virtual time without sleeping/waiting
-rtc clock=vm: Isolate the guest RTC time from the host
64-bit still has some issues that are being looked at.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Remove dts_fixup.h files that are not used (empty) or the defines aren't
used anymore and thus can be removed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
