x86: add qemu_x86_tiny

This build target has all the low-memory options enabled for
memory management: a 4MB address space, 32-bit paging mode,
no KPTI, an empty page pool, and common page tables for
memory domains.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>

boards/x86/qemu_x86/qemu_x86.dts

@@ -4,7 +4,9 @@
 
 #include <mem.h>
 
+#ifndef DT_DRAM_SIZE
 #define DT_DRAM_SIZE		DT_SIZE_K(4096)
+#endif
 #define DT_FLASH_SIZE		DT_SIZE_K(4096)
 
 #include <ia32.dtsi>

boards/x86/qemu_x86/qemu_x86_tiny.dts

@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2020 Intel Corporation.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DT_DRAM_SIZE		DT_SIZE_K(2048)
+#include "qemu_x86.dts"

boards/x86/qemu_x86/qemu_x86_tiny.yaml

@@ -0,0 +1,13 @@
+identifier: qemu_x86_tiny
+name: QEMU Emulation for X86 (small VM)
+type: qemu
+arch: x86
+simulation: qemu
+toolchain:
+  - zephyr
+  - xtools
+testing:
+  default: true
+  only_tags:
+     - kernel
+     - userspace

boards/x86/qemu_x86/qemu_x86_tiny_defconfig

@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_IA32=y
+CONFIG_BOARD_QEMU_X86=y
+CONFIG_HPET_TIMER=y
+CONFIG_PIC_DISABLE=y
+CONFIG_LOAPIC=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_NS16550=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+CONFIG_TEST_RANDOM_GENERATOR=y
+CONFIG_X86_MMU=y
+CONFIG_DEBUG_INFO=y
+CONFIG_SCHED_SCALABLE=y
+CONFIG_WAITQ_SCALABLE=y
+CONFIG_X86_VERY_EARLY_CONSOLE=y
+CONFIG_QEMU_ICOUNT_SHIFT=5
+
+CONFIG_X86_PAE=n
+CONFIG_X86_COMMON_PAGE_TABLE=y
+CONFIG_X86_KPTI=n
+CONFIG_KERNEL_VM_SIZE=0x400000
+CONFIG_X86_MMU_PAGE_POOL_PAGES=0