Remove v1 implementation from log_core and all references in the tree.
Remove modules used by v1: log_list and log_msg.
Remove Kconfig v1 specific options.
Remove Kconfig flags used for distinction between v1 and v2.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Do not check for exact SoC to pass '--cores=${CONFIG_MP_NUM_CPUS}'
options to runners an pass it unconditionally instead.
That preventis from issues when adding new SoC/board.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
The armv8 timer, arm gic, and arm gic-v3-its don't use or need the
devicetree label property. Update the dts bindings to not require it and
remove setting of the label property in dts files.
Signed-off-by: Kumar Gala <galak@kernel.org>
NS16550 driver no longer relies on definitions found in <soc.h>, SoC can
select UART_NS16550_ACCESS_IOPORT instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Updates hal_espressif's revision to include:
- latest pinctrl definitions.
- support for building ESP32C3 USB driver
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit fixes link pointing to HiFive1's page on the vendor site and
adds its image to the docs.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The STM32H7A3 SoC supports a CPU clock up to 280 MHz for VOS0. The AHB
bus is also limited to 280 MHz, while the APB buses are limited to
140 MHz.
This patch updates the PLL configuration to change the CPU frequency to
280 MHz, while tkaing into account the above constraints.
The Q output divisor is adjusted to keep a frequency in the same range,
in practice increased from 48 to 56 MHz. It is currently only used by
the SPI so that should not be an issue, especially given the SPI
interface can use much higher frequencies.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
In 8f9290d2741844 ('dts: bindings: riscv: Add and use bindings for
sifive CPUs'), new compat strings for SiFive CPUs were added, but with
riscv prefixes. Vendor-specific compats should just be prefixed with the
vendor, so move that over here.
Fixes: 8f9290d2741844 ('dts: bindings: riscv: Add and use bindings
for sifive CPUs')
Signed-off-by: Olof Johansson <olof@lixom.net>
The FDCAN clock was being enabled using HAL APIs instead of the generic
clock control API.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
G4 and U5 series missed clock information in DT. Driver likely worked
because it was using HAL helpers, bypassing the purpose of DT and clock
control drivers. The clocks property is now required in the binding
file.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently the device MMIO APIs is only able to map single DT-defined
regions and also the _NAMED variant is assuming that each DT-defined
device has only one single region to map.
This is a limitation and a problem when in the DT are defined devices
with multiple regions that need to be mapped.
This patch is trying to overcome this limitation by introducing the
DEVICE_MMIO_NAMED_ROM_INIT_BY_NAME macro that leveraged the 'reg-names'
DT property to map multiple regions defined by a single device.
So for example in the DT we can have a device like:
driver@c4000000 {
reg = <0xc4000000 0x1000>, <0xc4001000 0x1000>;
reg-names = "region0", "region1";
};
and then we can use DEVICE_MMIO_NAMED_ROM_INIT_BY_NAME doing:
struct driver_config config = {
DEVICE_MMIO_NAMED_ROM_INIT_BY_NAME(region0, DT_DRV_INST(0)),
DEVICE_MMIO_NAMED_ROM_INIT_BY_NAME(region1, DT_DRV_INST(0)),
};
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The Configure Data Path command must be included when the read Local
Supported Codecs [v2] command is supported. The Configure Data Path
command is needed when vendor-specific ISO data paths are supported,
but not otherwise tied to ISO. The respective weak function is
therefore moved to ull.c.
Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
Introduce configuration options for chosen RPL implementations.
This will allow introducing alternate persistent storage schemes
for the replay protection list.
Signed-off-by: Anders Storrø <anders.storro@nordicsemi.no>
Support writing to NOR-Flash over OSPI using
the following modes:
* 1-1-1
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion for write opcodes.
Allows users to set what write/program opcode is used
in the DTS (not for OPI mode).
Will use some default PP opcodes based on the mode.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support to read and erase NOR-Flash over OSPI using
the following modes:
* 1-1-2
* 1-2-2
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion and gets address width
from the SFDP:BFP.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds `four-byte-opcodes` property. When set, then used write and read
opcodes will be converted to 4-Byte opcode.
Doesn't convert erase opcodes yet.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds write opcode (`writeoc`) property. That allows to provide
custom write opcode in the DTS.
Doesn't support OPI mode.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds:
* PP and Read 4-Byte command defines
* PP 1-1-2 define
* Missing 1-2-2 (0xBB) and Read Fast (0x0B) command defines
Re-arranges the commands so that they stay in order.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
When an L2CAP_CREDIT_BASED_RECONFIGURE_REQ packet is received with
invalid parameters, the recipient shall send an
L2CAP_CREDIT_BASED_RECONFIGURE_RSP PDU with a non-zero Result field
and not change any MTU and MPS values.
This fix incorrectly reconfiguring valid channels while responding with
0x003 (Reconfiguration failed - one or more Destination CIDs invalid)
result code.
Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
TSE18813 clarified IUT behavior and rejecting reconfiguration which
would result in MTU decrease is enough. There is no need to disconnect
L2CAP channel(s).
This was affecting L2CAP/ECFC/BI-03-C qualification test case
(TCRL 2022-2).
Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
Avoid potentially calling __builtin_clz() twice with non-constant
values. Also add a test for it.
Clang produces false positive vla warnings so disable them. GCC will
spot real vla's already.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Added test command line arguments to filter
which tests are executed. Filtered tests should follow
suiteA::test1,suiteB::test2 format.
Signed-off-by: Al Semjonovs <asemjonovs@google.com>
Move to using NET_DEVICE_DT_DEFINE_INSTANCE instead of
NET_DEVICE_INIT_INSTANCE as the driver is devicetree based and it
lets us remove DT_LABEL usage in the driver itself.
Signed-off-by: Kumar Gala <galak@kernel.org>
When the SYS_CLOCK_EXISTS Kconfig option is not enabled, k_busy_wait()
has no implementation, so in such case, call nrfx_coredep_delay_us()
directly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The measurement time in normal mode was too short.
With this commit the maximum value of the datasheet is applied.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The driver supported getting register shift from Devicetree, from a
custom definition in SoC headers (fragile) or, it took a default value.
This change simplifies things by making reg-shift property required in
all instances.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The ns16550 flags reg-shift property as optional. In case it is not
supplied, the ns16550 driver relies on a value defined in <soc.h>, or,
by default it takes 4 (shift by 2).
This patch adds the property to all ns16550 nodes, with the following
values:
- 2 if SoC did not have any custom value defined by
UART_REG_ADDR_INTERVAL (corresponds to 1 << 2 = 4)
- If SoC defined DEFAULT_REG_INTERVAL (snps_arc_iot/it8xxx2), use such
value (4=2, 2=1, 1=0).
These changes will allow simplifying the ns16550 driver.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
