Introduce has-interrupt-mask-reg DTS property for nxp,pca95xx driver.
This additionnal property allow to specify that the gpio expander has an
interrupt mask register that must be configured by the driver.
This allow to use this driver with PCAL95xx.
This fixes issue #44834.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
We no longer need to relocate the SDK power management
source file to SRAM. Instead specific functions from the
SDK file are relocated to the ramfunc section.
This commit fixes Issue#44670
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The PWM driven LEDs had a wrong period: 0 nsec. A value of 20 msec has
been chosen as most other boards do for PWM driven LEDs. The polarity
has been set to normal (LEDs are driven active high).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to be consistent with other platforms, include the PWM
dt-bindings by default.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Validate `id` so that `bt_dev.irk[id]` cannot result in an out-of-bounds
access.
This fixes coverity report 239569.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
CONFIG_RISCV_ATOMICS_ISA enables A extension.
CONFIG_RISCV_MUL_ISA enables M extension.
CONFIG_FLOAT_HARD enables F extension. (FPU)
Since we changed to use configuration options to enable extensions,
we no longer need to specify extensions using zephyr_compile_options.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Increase the size of the flash storage partition from 2KB (one page) to
4KB (two pages) in order to support NVS.
Fixes: #44977
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit enables rng for nucleo_l073rz platfrorm. This has been
tested with tests/drivers/entropy/api and is working as expected.
Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
The period was set to 60 usec, a value that doesn't make much sense in
the context of PWM driven LEDs. Since the period cell was rarely used,
the value was likely added because it is required, but was never used. A
period of 20 msec has been chosen as most other boards do.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The Tx interval is now calculated at the beginning
of the Tx test and the next transmission is
triggerd by the switch timer instead of event
timer. This fixes a corner case issue when
timer rollover.
Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
Since gpio_dt_spec is finally available within spi_cs_control
struct, mark the old fields deprecated in order to use
gpio_dt_spec struct.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
When Host calls HCI_LE_Connection_CTE_Request_Enable with cte type
set to AoD with 1us slots or AoD with 2 us slots, the Controller
verifies if peer device supports Antenna Switching During CTE
Transmission (AoD) feature.
That is wrong because the feature is marked as optional when send
to peer, so it shall be igonerd by remote device.
There are no means to check if peer device supports particular
CTE type, hence the check has to be removed.
The check causes enable CTE REQ procedure to fail after feature
exchange has happened.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
The CTE request procedure can be run in periodic and non-periodic mode.
In periodic mode it stays enabled until Host call HCI_LE_Connection_CTE-
_Request_Enable(Enable=0x0).
In non-periodic mode the command is disabled after completion,
LL_CTE_RSP is successfully received.
There is missing disable of the procedure in the current code,
so Host is not able to run the command HCI_LE_Connection_CTE_Request_-
Enable(Enable=0x1) again without explicit call to HCI_LE_Connection_-
CTE_Request_Enable(Enable=0x0).
The commit adds missing code responsible for disable of the procedure.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Makes possible to enable LwM2M protocol v1.1 features. Uses SenML JSON
as default content format.
Signed-off-by: Veijo Pesonen <veijo.pesonen@nordicsemi.no>
...content formats
In case that SenML CBOR or SenML JSON are both disabled there is need to
use plain CBOR as backup.
Signed-off-by: Veijo Pesonen <veijo.pesonen@nordicsemi.no>
enable dma on rt1170 and rt1160 evk, since edma driver has been updated
to place TCD pools in correct location
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
if DMA support is not present, LPUART driver will not compile when async
API support is required. Skip test cases when dma support is not present
and LPUART driver is enabled.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add nxp,loopback mode to boards with LPUART. This will enable testing
the UART async api without a physical loopback connection.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
NXP LPUART IP supports loopback mode, where TX is internally connected
to RX input. Allow setting loopback mode up via the "nxp,loopback" dts
property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SOCs using the EDMA IP that supported caching must locate EDMA transfer
control descriptors (TCDs) in non cacheable memory. For M7 cores, this
can simply use the "nocache" section. For M4 cores, where the nocache
section does not exist, the chosen SRAM section must be a tightly
coupled memory block which cannot be cached. Add a note to all boards
with M4 SOCs that support caching explaining this issue, and enable EDMA
driver to locate TCDs in SRAM.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
LPUART driver should use shared ISR for all possible use cases,
including ASYNC API, so that multiple features requiring ISR can be
enabled simultaneously.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
There is errata clarification (Errata ID:18700)
about subscriptions on fixed group addresses.
It is possible to subscribe models on non primary elements
on any fixed group address except all nodes address.
Devices should be able to receive messages on fixed addresses
even if they do not support the feature
to which the fixed group address belongs.
Signed-off-by: Aleksandr Khromykh <Aleksandr.Khromykh@nordicsemi.no>
This commit adds audio dmic to the boards dts and a regulator
to enable the microphone VDD and L/R pin.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
- add an overlay file for the bbc_microbit board with specification
of GPIO that should be used as the PWM output to buzzer
- update a PWM related macro in the microbit specific code to refer
to PWM channel instead of pin
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- add `channel-gpios` property with GPIO assignment for the used PWM
channel to the `sw_pwm` node
- replace ambiguous "pin 21" in the sample's README with "pin P19"
that uses notation from the official micro:bit documentation and
is consistent with this pin number within the edge_connector node
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- add `channel-gpios` property with GPIO assignments for PWM channels
to `sw_pwm` nodes
- update PWM related macros to refer to channels instead of pins
- remove no longer needed inclusion of boards/arm/bbc_microbit/board.h
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align the board dts with the recent changes in the "nordic,nrf-sw-pwm"
binding (remove the no longer existing `channel-count` property) and
add a node representing the edge connector for convenient referring
to SoC pins connected to it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
... and "nordic,nrf-sw-pwm" binding:
- add `channel-gpios` property with GPIO assignments for PWM channels
to `sw_pwm` nodes
- use channel indexes instead of pin numbers in `pwms` properties that
define PWM LEDs
- add the period and flags cells to `pwms` properties in all PWM LED
definitions; use the commonly used period of 20 ms (giving 50 Hz)
as a default setting
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
... and "nordic,nrf-pwm" binding:
- use channel indexes instead of pin numbers in `pwms` properties that
define PWM LEDs
- add the period and flags cells to `pwms` properties in all PWM LED
definitions; use the commonly used period of 20 ms (giving 50 Hz)
as a default setting
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
... to align with what is used in most other PWM bindings.
Update PWM nodes in SoC .dtsi files accordingly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for inverting of PWM channel outputs in the pwm_nrf5_sw
driver by properly handling the `PWM_POLARITY_INVERTED` flag.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-sw-pwm" binding
and with related `DT_PWMS_*` macros.
The change described above requires also providing a way to specify
SoC pins that are to be assigned to the PWM channels. Hence, the commit
introduces in the "nordic,nrf-sw-pwm" binding the `channel-gpios`
property that replaces the `channel-count` one.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for inverting of PWM channel outputs in the pwm_nrfx driver
by properly handling the `PWM_POLARITY_INVERTED` flag.
The dts properties that were used so far for inverting of the outputs
("nordic,invert" and "chX-inverted") are kept as they are needed for
setting of the initial polarity, i.e. for setting the inactive state
of the outputs before any PWM signal generation is requested for them.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-pwm" binding
and with related `DT_PWMS_*` macros.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Increase the default TX stack size for BT_CTLR && BT_LL_SW_SPLIT,
as we have seen applications/samples nearing and even reaching
the stack size, causing stack overflows. This is especially
true if CONFIG_FPU=y which takes 96 bytes of the TX stack.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Fix assert on LL BIG terminate call before BIG sync is
established. Assert was caused due to duplicate calls to
release stream contexts, once in LL BIG terminate function
then when releasing the HCI BIG sync failed to be
established node rx was being released.
Use iso_broadcast and iso_receive samples, power cycle the
iso_broadcast device when iso_receive sample is waiting for
BIG sync to be established, iso_receive sample will perform
a BIG sync terminate that leads to the assert.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
At some recent point, directory <zephyr-root>/include was moved to
<zephyr-root>/include/zephyr. However, links from documentation to
Zephyr source on Github were not updated. Update them now.
Signed-off-by: Aleksandar Markovic <aleksandar.markovic.sa@gmail.com>
This extends the samples to build for C++ using the same code.
This shows MIPI Sys-T can work C++ too.
The change to main.c regarding to the struct log_msg_ids is
simply that the compiler errored out complaining the members
must be initialized the same order as the declaration.
Also C++ dislikes a string literal being assigned to char*,
so assign them to const char* instead.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Handle PECI command PING properly, also get Write FCS Byte as a check.
Now it is possible to perform a PECI Ping without crashing the bus or
blocking it for subsequent PECI transactions.
It is also possible to check whether the Ping was sucessful
or not with the Write FCS Byte.
Signed-off-by: Johannes Meister <johannes.meister@kontron.com>
