This commit resolves lock contention
issues by increasing the probablity of
contention during the test execution.
Increased wait delay when lock is taken
and Reduced wait delay when the lock is
released.
Achieved 99% lock contention probablity,
verified through runtime metrices.
Signed-off-by: S Swetha <s.swetha@intel.com>
Extend timeout on k_mem_slab_alloc() for kernel.memory_slabs
memory_slab_1cpu.mslab test suite as a workaround to allow its run
on slow platforms, e.g. simulated intel_ish_5_8_0.
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Check the order of constructors, making sure those with a specified
priority are called in numeric order after which those without priority are
called.
Signed-off-by: Keith Packard <keithp@keithp.com>
Add return value to z_add_timeout. It returns system tick when timeout
will expire.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Validate that `K_TIMEOUT_ABS_SEC` works the same way as the other
absolute timeout construction macros.
Signed-off-by: Jordan Yates <jordan@embeint.com>
According the specification, in extreme cases, the deviation of the APB
clock and LFCLK clock can reach up to +/-1% (+/- 10ms).
Therefore, exclude npcx platforms from the test because it required 1ms
accuracy.
fixes: #66185
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This patch allows checking for any custom ARM interrupt controller to get a
non-enabled IRQ line instead of assuming that GIC is enabled
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Some platforms were excluded due to issues that were fixed or resolved
themselves. Enable those platforms again and remove the comments related
to the issues.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Test was assuming that CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 but such
frequency is not well supported on SoC which are based on 32768 Hz RTC
clock. Align test to be able to work with different sys_clock
frequency by converting previously 20 ticks to milliseconds.
Set CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768 when system clock is using
Nordic RTC timer driver.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Type case CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC to uint32_t
while defining sys_clock_hw_cycles_per_sec_runtime_get()
to extend the range of frequency to 0xffffffff.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
k_thread_priority_set() on a pended thread wasn't re-inserting into the
waitq, causing the incorrect thread to run based on priority. When using
the scalable waitq config, this can also break assumptions of the tree
and leave the owner of a waitq still being in the waitq tree, cycles in
the tree, or a crash.
Remove and re-add a thread to a waitq to ensure the waitq remains in
order and the tree's assumptions are not violated.
To illustrate the issue, consider 4 threads in decreasing priority
order: A, B, C, and D along with two mutexes, m0 and m1. This is
implemented in the new complex_inversion mutex_api test.
1. D locks m1
2. C locks m0
3. C pends on m1
4. B pends on m1
5. A pends on m0, boosts C's priority, now tree on m1 is not sorted
6. D unlocks m1, left-most thread on tree is B. When removing B from
tree it cannot be found because it searches to the right of C due to
C's boosted priority when the node is actually on the left. rb_remove
silently fails.
7. B unlocks m1, left-most thread on tree is still B and it tries to
unpend itself, resulting in a NULL pointer dereference on
B->base.pended_on.
Signed-off-by: Josh DeWitt <josh.dewitt@garmin.com>
Make sure we install packages with no issues, some of the issues being
reporting on packages we might install using pip:
Warn: Project is vulnerable to: PYSEC-2019-41 / GHSA-qfc5-mcwq-26q8
Warn: Project is vulnerable to: PYSEC-2014-14 / GHSA-652x-xj99-gmcc
Warn: Project is vulnerable to: GHSA-9wx4-h78v-vm56
Warn: Project is vulnerable to: PYSEC-2014-13 / GHSA-cfj3-7x9c-4p3h
Warn: Project is vulnerable to: PYSEC-2018-28 / GHSA-x84v-xcm2-53pg
Warn: Project is vulnerable to: PYSEC-2017-74
Warn: Project is vulnerable to: GHSA-55x5-fj6c-h6m8
Warn: Project is vulnerable to: PYSEC-2014-9 / GHSA-57qw-cc2g-pv5p
Warn: Project is vulnerable to: PYSEC-2021-19 / GHSA-jq4v-f5q6-mjqq
Warn: Project is vulnerable to: GHSA-pgww-xf46-h92r
Warn: Project is vulnerable to: PYSEC-2022-230 / GHSA-wrxv-2j5q-m38w
Warn: Project is vulnerable to: PYSEC-2018-12 / GHSA-xp26-p53h-6h2p
Warn: Project is vulnerable to: PYSEC-2024-4 / GHSA-2mqj-m65w-jghx
Warn: Project is vulnerable to: PYSEC-2023-165 / GHSA-cwvm-v4w8-q58c
Warn: Project is vulnerable to: PYSEC-2022-42992 / GHSA-hcpj-qp55-gfph
Warn: Project is vulnerable to: PYSEC-2023-137 / GHSA-pr76-5cm5-w9cj
Warn: Project is vulnerable to: PYSEC-2023-161 / GHSA-wfm5-v35h-vwf4
Warn: Project is vulnerable to: GHSA-3f63-hfp8-52jq
Warn: Project is vulnerable to: GHSA-44wm-f244-xhp3
Warn: Project is vulnerable to: GHSA-56pw-mpj4-fxww
Warn: Project is vulnerable to: GHSA-j7hp-h8jx-5ppr
Warn: Project is vulnerable to: PYSEC-2023-175
Warn: Project is vulnerable to: PYSEC-2018-34 / GHSA-2fc2-6r4j-p65h
Warn: Project is vulnerable to: PYSEC-2021-856 / GHSA-5545-2q6w-2gh6
Warn: Project is vulnerable to: PYSEC-2019-108 / GHSA-9fq2-x9r6-wfmf
Warn: Project is vulnerable to: PYSEC-2018-33 / GHSA-cw6w-4rcx-xphc
Warn: Project is vulnerable to: PYSEC-2021-857 / GHSA-f7c7-j99h-c22f
Warn: Project is vulnerable to: GHSA-fpfv-jqm9-f5jm
Warn: Project is vulnerable to: PYSEC-2017-1 / GHSA-frgw-fgh6-9g52
Warn: Project is vulnerable to: GHSA-c6fm-rgw4-8q73
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The TOOLCHAIN_DISABLE_WARNING/TOOLCHAIN_ENABLE_WARNING macros are easier
to read and compiler agnostic.
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Add some overlay files for the silabs xg29_rb4412a board to enable tests
on the board. Also add the platform to some testcase.yaml files.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Some projects may have needs for more than 99 priority levels, so add
a third linker input section for each obj level.
Signed-off-by: Josh DeWitt <josh.dewitt@garmin.com>
Several devices have hardware-specific additional limits for
how short a sleep cycle can be. Add an entry for devices based
on Silabs sleeptimer when the OS tick rate is equal to the timer
frequency.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Improve naming of the scheduler and call it what it is: simple. Using
'dumb' for the default scheduler algorithm in Zephyr is a bad idea.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When CONFIG_KERNEL_COHERENCE is enabled, pend_locked() asserts
when wait_q is not in coherent memory. The k_pipes used in
the pipe_api tests are declared locally within the test. They
are located within the thread stacks and those wait_q inside
k_pipe struct are thus not considered in coherent memory.
To make them work, replace the local ones with a global
k_pipe object. Since each test initializes the pipe object
locally, the tests are not functionally changed.
Fixes#84235
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
native_posix has been removed. There is no need to check for it
anymore.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Updates the ipi_optimize test to use 4 CPUs for qemu_x86_64.
This provides enough CPUs for the test to verify the recently
added directed IPI support for x86_64.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
When disabling the __deprecated macros in tests/kernel/pipe/deprecated,
the macros was set to ''. For IAR tools this was expanded to '' which
caused a compilation error.
I have replaced them with /* deprecated */ which should work for all
toolchains.
Signed-off-by: Lars-Ove Karlsson <lars-ove.karlsson@iar.com>
This test was buggy. The first call to k_thread_abort() would
terminate the calling thread (because it handled a panic!) and so the
second case (an essential thread self-aborting) wasn't actually being
exercised and was silently "passing". Oops.
Fix by splitting the cases into two tests, as suggested by @fsammoura
But unmasking that shows that there are some arch buglets[1] to fix
before this case can pass for everyone. So skip on x86/riscv/sparc
for now.
[1] See the comment. It's not really a "bug" as we've never demanded
that arch layers do this. But it does work on many of them.
Signed-off-by: Andy Ross <andyross@google.com>
Improve robustness of test_all_stats_usage test. Test was relying on a
fact that system did not go to idle before this test is run. It means
that it was assuming that it will be the first test which might not be
true. Additionally, on some targets there might be some idle waits
during system boot. Test is adjusted to validate gathered statistics
with an assumption that there might have been idle period prior to the
test.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
No files use MS_TO_US except tests/kernel/interrupt/src/nested_irq.c.
While the macro is convenient, we should put it in a more central
location and use it everywhere if we want to use it rather than just in
interrupt_util.h. For now, remove it and replace the two usages to match
how code is written in the rest of Zephyr.
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
This revert the idea of 3fa7d78 from #78845.
The 3rd level IRQ APIs won't compile when
CONFIG_3RD_LEVEL_INTERRUPT_BITS=0.
Updated testcases accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
First, SoC is not supported, but when I tried to add it, build results
in RAM overflow of ~10K. Excluding the platform for now, so CI is happy.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Since it was added, `arch.interrupt.gen_isr_table_local.arm_mainline`
filters on `CONFIG_ARMV6_M_ARMV8_M_BASELINE`. I'm not entirely sure whether
this was intentional, but this seems odd to me given a) the naming of the
test b) that the `platform_allow` is `qemu_cortex_m3` and c) that the
`arch.interrupt.gen_isr_table.arm_mainline` test it inherits part of its
config from filters on `CONFIG_ARMV7_M_ARMV8_M_MAINLINE`.
The current filtering setup also means that a command like
`west twister -c -T tests/kernel/gen_isr_table/` currently filters out all
of the `*gen_isr_table_local*` tests which was a surprise to me when
testing locally (no tests broke for a change I made as they were
all filtered out).
Assuming this is undesireable, change the filter to check against
`CONFIG_ARMV7_M_ARMV8_M_MAINLINE` to make it possible to run the tests
on the expected platform without needing to work around the filter.
Signed-off-by: Jonathon Penix <jpenix@quicinc.com>
For some target and optimization level combinations (aarch64 and -O2, for
example), GCC will over align _isr_list_sname instances. The local isr
declaration parser doesn't expect the extra padding that may be introduced
and will produce unexpected errors about bad IRQs (`error: IRQ 1903323438
(offset=0) exceeds the maximum of 42`, for example). Prevent this issue by
forcing the expected alignment of _isr_list_sname.
Fixes#81254
Signed-off-by: Jonathon Penix <jpenix@quicinc.com>
Thread abort of essential threads had a buglet where the panic would
be signaled but, if caught by k_sys_fatal_error_handler(), the thread
would not actually be aborted. This test wasn't validating that the
thread was actually dead (in fac, it RELIED on the thread to signal a
semaphore after its "abort"!).
Make sure it's dead and that the panic is caught. Also add a case for
aborting _current which is a separate code path that needs coverage.
Signed-off-by: Andy Ross <andyross@google.com>
