Commit graph

4 commits

Author SHA1 Message Date
Sylvio Alves
b426e0925d soc: esp32c2: add ECO4 revision entry
Allows using proper rom functions when ECO4 module
is used.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-02-11 22:05:04 +01:00
Yong Cong Sin
e6dd68ec89 arch: riscv: introduce CONFIG_RISCV_GP_PURPOSE choice
Introduce `CONFIG_RISCV_GP_PURPOSE` choice to make sure that only
one of `CONFIG_RISCV_GP` or `CONFIG_RISCV_CURRENT_VIA_GP` can be
enabled, instead of relying of dependencies.

To do that, introduce a new
`CONFIG_RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING` that can be selected
by SoC when it implemented global pointer (GP) initialization for
relative addressing in its linker.

`CONFIG_RISCV_GP` will be the default choice when
`CONFIG_RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING=y`

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-11-28 12:51:09 +01:00
Marcio Ribeiro
baf62b7a98 soc: esp32: XIP removed from Espressif targets
The way ESP32 XIP works (with MMU and cache) does no fit the way Zephyr XIP
is implemented, causing issues related to included Zephyr linker files.
Flash code still resides in flash for execution, but MMU/Cache handles it
in such way that XIP might not (or should not) be used with current Zephyr
approach. To address this problem, XIP configuration option is being
removed from Espressif targets.

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2024-08-31 06:47:52 -04:00
Raffael Rostagno
fad55d18ad soc: esp32c2: Add support to ESP32C2 and ESP8684
Files for SoC support: ESP32C2 and ESP8684 (same core).
Basic device tree configuration.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-16 14:08:22 -04:00