There is exactly one function being defined with TEXT_START
macro so the x86-32 __start can appear at the beginning of
text section. Since no one else is using it, better remove
TEXT_START to simplify things.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The generic version of SECTION_VAR() is adding an extra space
during expansion before second argument (e.g.
SECTION_VAR(section, variable) => ".section. variable"
instead of ".section.variable") which would result in build
error. So remove the "##" in macro to fix this, and now it
will also behave the same as SECTION_FUNC().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This is similar to Z_GENERIC_SECTION() but the resulting
section name has a period as prefix. This eases the need
to create a section name macro for both assembly and C.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The cache API currently shipped in Zephyr is assuming that the cache
controller is always on-core thus managed at the arch level. This is not
always the case because many SoCs rely on external cache controllers as
a peripheral external to the core (for example PL310 cache controller
and the L2Cxxx family). In some cases you also want a single driver to
control a whole set of cache controllers.
Rework the cache code introducing support for external cache
controllers.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Remove this intrusive tracing feature in favor of the new object tracing
using the main tracing feature in zephyr. See #33603 for the new tracing
coverage for all objects.
This will allow for support in more tools and less reliance on GDB for
tracing objects.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add Poll API and Work Poll tracing, default hooks, and documentation.
Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Adds generic trace hook macros for inserting trace hook for
function entry, exit, blocking, and object initialization
with a variable number of arguments (objects, return values,
etc.). Utilizing macro concatenation these macros produce
trace hooks of a similar format to the old trace system
with SYS_TRACING_OBJ_FUNC(k_thread, switched_in) being
turned into sys_trace_k_thread_switched_in() by the
preprocessor. Although these macros still rely on the manual
definition of each unique trace hook in tracing.h, the benefit
of not directly calling those is that we can enable/disable
trace hooks based on object type (k_thread, k_sem, etc.)
through the preprocessor while providing the ability of adding
type specific runtime trace processing similar to
SYS_TRACING_OBJ_INIT.
Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Several functions and macros have been replaced with new ones that
conform to current naming conventions, or provide more functionality,
mostly through using new representations for delayable work. Mark
these functions deprecated.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Avoid confusion with device runtime idle pm states and just use device
pm states.
This simplify the code a little bit and prepare the ground for having
a better definition of device pm states. Right now this code needed to
hijack two transitional states to not break the current code logic but
the goal is avoid it and have everything in one single place.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Device pm runtime was using semaphore to protect critical section but
enable / disable functions were waiting on the semaphore. So, just
replace it with a spin lock.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The sync API was using k_poll_signal and in certain conditions is
possible multiple threads waiting on a signal leading to an undefined
behavior.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The context parameter used across device power management is
actually the power state. Just use it and avoid a lot of
unnecessary casts.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Stack is aligned by 8 for 64 bit ISA and 4 for 32 bit ISA.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Make variables where we store CPU registers values and
memory addresses bit agnostic.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Mark the places where we intentionally use st instead of STR for
code common for ARCv2 and ARCv3.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Reuse ARCv2 headers [where it is possible] for ARCv3.
In this commit we simply allow to use them for ARCv3, we'll
move it to proper folder and rename them [where it is required]
in the upcoming cleanup patch.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Split ARC sys-io.h implementation for two part:
* AUX reg accessors - ASM based which and valid for ARCv2
* MMIO accessors - writen in C and valid for both ARCv2 and ARCv3
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Extend asm-compat macroses so they can be used with ARC MWDT
toolchain for ARCv2
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Add asm-compat macroses to be able to co create assembler code
which works and can be build for both ARCv2 and ARCv3 ISAs
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Do basic preparations for building code for ARCv3 HS6x
* add ISA_ARCV3 and CPU_HS6X config options
* add off_t type support for __ARC64__
* use elf64-littlearc format for linking
* use arc64 mcpu for CPU_HS6X
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
To keep compatibility between the old GPIO API implementation and a new
one introduced in the Zephyr 2.2.0 release the gpio_pin_configure()
function was accepting interrupt flags. In the new API implementation
interrupt flags are only accepted by gpio_pin_interrupt_configure()
function.
This temporary support for INT flags in gpio_pin_configure should have
been removed in the Zephyr 2.4.0 release.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
When we start allowing unmapping of memory region, there is no
exact way to know if k_mem_map() is called with guard page option
specified or not. So just unconditionally enable guard pages on
both sides of the memory region to hopefully catch access
violations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This provides a counterpart to z_phys_map() which can be used
to temporary map memory region during boot process, and
subsequently discards the mapping.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This introduces bit arrays as a new data type. This is different
than sys_bitfield as it is working on raw arrays of 32-bit
data. The bit arrays encode additional data inside the struct
to avoid going beyond the declared number of bits, and also
provides locking.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
On RISC-V 64-bit, GCC complains about undefined reference
to 'ffs' via __builtin_ffs(). So implement a brute force
way to do it. Once the toolchain has __builtin_ffs(),
this can be reverted.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>