Commit graph

7574 commits

Author SHA1 Message Date
Daniel Leung
af49ec0277 linker: remove TEXT_START macro
There is exactly one function being defined with TEXT_START
macro so the x86-32 __start can appear at the beginning of
text section. Since no one else is using it, better remove
TEXT_START to simplify things.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-10 16:00:43 -05:00
Daniel Leung
8c1179e548 kernel: refactor stack declaration macros
These macros are identical except the specified linker region.
So refactor them.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-10 16:00:43 -05:00
Daniel Leung
e6dc91466c toolchain: gcc: fix extra space when using SECTION_VAR
The generic version of SECTION_VAR() is adding an extra space
during expansion before second argument (e.g.
SECTION_VAR(section, variable) => ".section. variable"
instead of ".section.variable") which would result in build
error. So remove the "##" in macro to fix this, and now it
will also behave the same as SECTION_FUNC().

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-10 16:00:43 -05:00
Daniel Leung
8297eafc60 toolchain: add Z_GENERIC_DOT_SECTION() macro
This is similar to Z_GENERIC_SECTION() but the resulting
section name has a period as prefix. This eases the need
to create a section name macro for both assembly and C.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-10 16:00:43 -05:00
Eug Krashtan
2b8c123a3b drivers: adc: Define max acquisition time
Required in STM32 tempereture sensor asquisition.

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
2021-05-08 10:18:09 -05:00
Eug Krashtan
3c36cd4242 drivers: sensor: Add sensor_value_from_double
Add helper function to convert double to struct sensor_value.

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
2021-05-08 10:18:09 -05:00
Carlo Caione
f000695243 cache: Rename sys_{dcache,icache}_* to sys_{data,instr}_cache_*
To have a common prefix.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-05-08 07:00:33 +02:00
Carlo Caione
e2333269ae cache: Introduce external cache controller system support
The cache API currently shipped in Zephyr is assuming that the cache
controller is always on-core thus managed at the arch level. This is not
always the case because many SoCs rely on external cache controllers as
a peripheral external to the core (for example PL310 cache controller
and the L2Cxxx family). In some cases you also want a single driver to
control a whole set of cache controllers.

Rework the cache code introducing support for external cache
controllers.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-05-08 07:00:33 +02:00
Anas Nashif
4d994af032 kernel: remove object tracing
Remove this intrusive tracing feature in favor of the new object tracing
using the main tracing feature in zephyr. See #33603 for the new tracing
coverage for all objects.

This will allow for support in more tools and less reliance on GDB for
tracing objects.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Anas Nashif
1af037f477 modules: enable percepio tracerecorder for tracing
Add support for percepio tracealyzer.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Anas Nashif
f477bac818 tracing: support new macros with systemview
Use new macros with systemview and rework hooks adding support for new
trace points.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
7a646b3f8e Tracing: Work Queue tracing
Add Work tracing, default tracing hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
cae9a905d4 Tracing: Poll API and Work Poll tracing
Add Poll API and Work Poll tracing, default hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
3a66d6c695 Tracing: Timer tracing
Add Timer tracing, default tracing hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
65b376eb87 Tracing: Memory Slab tracing
Add memory slab tracing, default trace hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
80cd9dac22 Tracing: Memory Heap tracing
Add Memory heap tracing, default trace hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
fa9e64b304 Tracing: Pipe tracing
Add Pipe tracing, default trace hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
d2e7de522d Tracing: Mailbox tracing
Add Mailbox tracing, default tracing hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
9ab447b3de Tracing: Message Queue tracing
Add Message Queue tracing, default hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
69e8869127 Tracing: Memory Stack tracing
Add memory stack tracing, defaul trace hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
d765445b3b Tracing: LIFO Tracing
Add LIFO tracing hooks, default hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
83ae27bb88 Tracing: FIFO Tracing
Add FIFO tracing hook, default hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
f984823e0d Tracing: Queue tracing
Add Queue tracing hooks, default hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
f17144349b Tracing: Thread tracing
Add thread tracing hooks, default hooks, and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
b93ff29e4b Tracing: Conditional variable tracing
Add conditional variable tracing hooks, default tracing hooks,
and documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
ed6148a841 Tracing: Mutex tracing hooks
Add mutex trace hooks, default mutex trace hooks, and trace hook
documentation.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
82addd6a64 Tracing: Semaphore tracing documentation
Add default semaphore trace hooks and documentation into
tracing.h.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Torbjörn Leksell
16bbb8ef34 Tracing: Trace hook support macros
Adds generic trace hook macros for inserting trace hook for
function entry, exit, blocking, and object initialization
with a variable number of arguments (objects, return values,
etc.). Utilizing macro concatenation these macros produce
trace hooks of a similar format to the old trace system
with SYS_TRACING_OBJ_FUNC(k_thread, switched_in) being
turned into sys_trace_k_thread_switched_in() by the
preprocessor. Although these macros still rely on the manual
definition of each unique trace hook in tracing.h, the benefit
of not directly calling those is that we can enable/disable
trace hooks based on object type (k_thread, k_sem, etc.)
through the preprocessor while providing the ability of adding
type specific runtime trace processing similar to
SYS_TRACING_OBJ_INIT.

Signed-off-by: Torbjörn Leksell <torbjorn.leksell@percepio.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-07 22:10:21 -04:00
Maksim Masalski
0b6539c345 doc: fix display of the ISR_DIRECT_DECLARE example usage
In the ISR docs page ISR_DIRECT_DECLARE example usage
was not displayed correctly.

Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
2021-05-07 20:52:02 -04:00
Peter Bigot
09a31ce18c kernel: deprecate old k_work API
Several functions and macros have been replaced with new ones that
conform to current naming conventions, or provide more functionality,
mostly through using new representations for delayable work.  Mark
these functions deprecated.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-05-07 18:12:06 -05:00
Flavio Ceolin
0c607adb63 pm: device: Align state names with system states
Change device pm states to the same pattern used by system power
management.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-07 18:35:12 -04:00
Flavio Ceolin
1bd781e7b5 power: device_pm: Remove device idle pm states
Avoid confusion with device runtime idle pm states and just use device
pm states.

This simplify the code a little bit and prepare the ground for having
a better definition of device pm states. Right now this code needed to
hijack two transitional states to not break the current code logic but
the goal is avoid it and have everything in one single place.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-07 18:35:12 -04:00
Flavio Ceolin
c7f5270a01 pm: device: fsm_state -> state
Rename state variable.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-07 16:55:31 -04:00
Flavio Ceolin
54324fd08e power: device_pm: Use spin lock instead of semaphore
Device pm runtime was using semaphore to protect critical section but
enable / disable functions were waiting on the semaphore. So, just
replace it with a spin lock.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-07 16:55:31 -04:00
Flavio Ceolin
8705c688e2 power: device_pm: Fix concurrence issues
The sync API was using k_poll_signal and in certain conditions is
possible multiple threads waiting on a signal leading to an undefined
behavior.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-07 16:55:31 -04:00
Flavio Ceolin
7eba310220 power: device: void *context -> uint32_t *state
The context parameter used across device power management is
actually the power state. Just use it and avoid a lot of
unnecessary casts.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-07 16:55:31 -04:00
Evgeniy Paltsev
a70187fb31 ARC: arch.h: setup ARCH_STACK_PTR_ALIGN correctly for 64 bit
Stack is aligned by 8 for 64 bit ISA and 4 for 32 bit ISA.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Evgeniy Paltsev
0d859796be ARC: make variables with regs and addresses bit agnostic
Make variables where we store CPU registers values and
memory addresses bit agnostic.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Evgeniy Paltsev
ab17a59ba5 ARC: mark accesses which are 32 bit despite of platform bittnes
Mark the places where we intentionally use st instead of STR for
code common for ARCv2 and ARCv3.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Evgeniy Paltsev
8cb122ea5d ARC: reuse headers for both ARCv3 and ARCv3 if possible
Reuse ARCv2 headers [where it is possible] for ARCv3.
In this commit we simply allow to use them for ARCv3, we'll
move it to proper folder and rename them [where it is required]
in the upcoming cleanup patch.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Evgeniy Paltsev
fb8dc2b83e ARC: split sys-io for common and ARCv2-only parts
Split ARC sys-io.h implementation for two part:
 * AUX reg accessors - ASM based which and valid for ARCv2
 * MMIO accessors - writen in C and valid for both ARCv2 and ARCv3

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Evgeniy Paltsev
1aef12d8fa ARC: add asm-compat macro for MWDT toolchain
Extend asm-compat macroses so they can be used with ARC MWDT
toolchain for ARCv2

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Vineet Gupta
3d56fff7a4 ARC: add asm-compat macros
Add asm-compat macroses to be able to co create assembler code
which works and can be build for both ARCv2 and ARCv3 ISAs

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Evgeniy Paltsev
6afe7c5fd2 ARC: prepare for building for ARCv3 HS6x
Do basic preparations for building code for ARCv3 HS6x
* add ISA_ARCV3 and CPU_HS6X config options
* add off_t type support for __ARC64__
* use elf64-littlearc format for linking
* use arc64 mcpu for CPU_HS6X

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Piotr Mienkowski
3632815e2e api: gpio: do not support INT flags in gpio_pin_configure
To keep compatibility between the old GPIO API implementation and a new
one introduced in the Zephyr 2.2.0 release the gpio_pin_configure()
function was accepting interrupt flags. In the new API implementation
interrupt flags are only accepted by gpio_pin_interrupt_configure()
function.

This temporary support for INT flags in gpio_pin_configure should have
been removed in the Zephyr 2.4.0 release.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-05-07 12:42:08 -05:00
Daniel Leung
c254c58184 kernel: mmu: add k_mem_unmap
This adds k_mem_unmap() so the memory mapped by k_mem_map()
can be freed.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-07 13:36:22 -04:00
Daniel Leung
fe48f5a920 kernel: mmu: always use before/after guard pages for k_mem_map()
When we start allowing unmapping of memory region, there is no
exact way to know if k_mem_map() is called with guard page option
specified or not. So just unconditionally enable guard pages on
both sides of the memory region to hopefully catch access
violations.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-07 13:36:22 -04:00
Daniel Leung
e6df25f68c kernel: mmu: implement z_phys_unmap()
This provides a counterpart to z_phys_map() which can be used
to temporary map memory region during boot process, and
subsequently discards the mapping.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-07 13:36:22 -04:00
Daniel Leung
ff407fb922 sys: introduce bit arrays
This introduces bit arrays as a new data type. This is different
than sys_bitfield as it is working on raw arrays of 32-bit
data. The bit arrays encode additional data inside the struct
to avoid going beyond the declared number of bits, and also
provides locking.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-07 13:36:22 -04:00
Daniel Leung
783b20712e arch: implement brute force find_lsb_set()
On RISC-V 64-bit, GCC complains about undefined reference
to 'ffs' via __builtin_ffs(). So implement a brute force
way to do it. Once the toolchain has __builtin_ffs(),
this can be reverted.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-05-07 13:36:22 -04:00