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cache: Rename sys_{dcache,icache}_* to sys_{data,instr}_cache_*

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To have a common prefix.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit is contained in:
Carlo Caione 2021-05-04 16:26:10 +02:00 • committed by Carles Cufí
commit f000695243
7 changed files with 63 additions and 63 deletions
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4
arch/arc/core/cache.c
View file

@ -63,7 +63,7 @@ void arch_dcache_enable(void)
static void arch_dcache_flush(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_dcache_line_size_get();
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;
@ -99,7 +99,7 @@ static void arch_dcache_flush(void *start_addr_ptr, size_t size)
static void arch_dcache_invd(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_dcache_line_size_get();
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;

2
arch/arm64/core/mmu.c
View file

@ -764,7 +764,7 @@ static void enable_mmu_el1(struct arm_mmu_ptables *ptables, unsigned int flags)
isb();
/* Invalidate all data caches before enable them */
sys_dcache_all(K_CACHE_INVD);
sys_cache_data_all(K_CACHE_INVD);
/* Enable the MMU and data cache */
val = read_sctlr_el1();

2
arch/x86/core/cache.c
View file

@ -31,7 +31,7 @@
*/
static void arch_dcache_flush(void *start_addr, size_t size)
{
size_t line_size = sys_dcache_line_size_get();
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start = (uintptr_t)start_addr;
uintptr_t end;

70
include/cache.h
View file

@ -33,78 +33,78 @@ extern "C" {
/* Driver interface mirrored in include/drivers/cache.h */
/* Enable d-cache */
extern void dcache_enable(void);
extern void cache_data_enable(void);
/* Disable d-cache */
extern void dcache_disable(void);
extern void cache_data_disable(void);
/* Enable i-cache */
extern void icache_enable(void);
extern void cache_instr_enable(void);
/* Disable i-cache */
extern void icache_disable(void);
extern void cache_instr_disable(void);
/* Write-back / Invalidate / Write-back + Invalidate all d-cache */
extern int dcache_all(int op);
extern int cache_data_all(int op);
/* Write-back / Invalidate / Write-back + Invalidate d-cache lines */
extern int dcache_range(void *addr, size_t size, int op);
extern int cache_data_range(void *addr, size_t size, int op);
/* Write-back / Invalidate / Write-back + Invalidate all i-cache */
extern int icache_all(int op);
extern int cache_instr_all(int op);
/* Write-back / Invalidate / Write-back + Invalidate i-cache lines */
extern int icache_range(void *addr, size_t size, int op);
extern int cache_instr_range(void *addr, size_t size, int op);
#else
/* Hooks into arch code */
#define dcache_enable arch_dcache_enable
#define dcache_disable arch_dcache_disable
#define icache_enable arch_icache_enable
#define icache_disable arch_icache_disable
#define dcache_all(op) arch_dcache_all(op)
#define dcache_range(addr, size, op) arch_dcache_range(addr, size, op)
#define icache_all(op) arch_icache_all(op)
#define icache_range(addr, size, op) arch_icache_range(addr, size, op)
#define dcache_line_size_get arch_dcache_line_size_get
#define icache_line_size_get arch_icache_line_size_get
#define cache_data_enable arch_dcache_enable
#define cache_data_disable arch_dcache_disable
#define cache_instr_enable arch_icache_enable
#define cache_instr_disable arch_icache_disable
#define cache_data_all(op) arch_dcache_all(op)
#define cache_data_range(addr, size, op) arch_dcache_range(addr, size, op)
#define cache_instr_all(op) arch_icache_all(op)
#define cache_instr_range(addr, size, op) arch_icache_range(addr, size, op)
#define cache_data_line_size_get arch_dcache_line_size_get
#define cache_instr_line_size_get arch_icache_line_size_get
#endif
__syscall int sys_dcache_all(int op);
static inline int z_impl_sys_dcache_all(int op)
__syscall int sys_cache_data_all(int op);
static inline int z_impl_sys_cache_data_all(int op)
{
#if defined(CONFIG_CACHE_MANAGEMENT)
return dcache_all(op);
return cache_data_all(op);
#endif
return -ENOTSUP;
}
__syscall int sys_dcache_range(void *addr, size_t size, int op);
static inline int z_impl_sys_dcache_range(void *addr, size_t size, int op)
__syscall int sys_cache_data_range(void *addr, size_t size, int op);
static inline int z_impl_sys_cache_data_range(void *addr, size_t size, int op)
{
#if defined(CONFIG_CACHE_MANAGEMENT)
return dcache_range(addr, size, op);
return cache_data_range(addr, size, op);
#endif
return -ENOTSUP;
}
__syscall int sys_icache_all(int op);
static inline int z_impl_sys_icache_all(int op)
__syscall int sys_cache_instr_all(int op);
static inline int z_impl_sys_cache_instr_all(int op)
{
#if defined(CONFIG_CACHE_MANAGEMENT)
return icache_all(op);
return cache_instr_all(op);
#endif
return -ENOTSUP;
}
__syscall int sys_icache_range(void *addr, size_t size, int op);
static inline int z_impl_sys_icache_range(void *addr, size_t size, int op)
__syscall int sys_cache_instr_range(void *addr, size_t size, int op);
static inline int z_impl_sys_cache_instr_range(void *addr, size_t size, int op)
{
#if defined(CONFIG_CACHE_MANAGEMENT)
return icache_range(addr, size, op);
return cache_instr_range(addr, size, op);
#endif
return -ENOTSUP;
}
@ -112,7 +112,7 @@ static inline int z_impl_sys_icache_range(void *addr, size_t size, int op)
#ifdef CONFIG_LIBMETAL
static inline void sys_cache_flush(void *addr, size_t size)
{
sys_dcache_range(addr, size, K_CACHE_WB);
sys_cache_data_range(addr, size, K_CACHE_WB);
}
#endif
@ -126,10 +126,10 @@ static inline void sys_cache_flush(void *addr, size_t size)
*
* @return size of the d-cache line or 0 if the d-cache is not enabled.
*/
static inline size_t sys_dcache_line_size_get(void)
static inline size_t sys_cache_data_line_size_get(void)
{
#ifdef CONFIG_DCACHE_LINE_SIZE_DETECT
return dcache_line_size_get();
return cache_data_line_size_get();
#elif (CONFIG_DCACHE_LINE_SIZE != 0)
return CONFIG_DCACHE_LINE_SIZE;
#else
@ -145,10 +145,10 @@ static inline size_t sys_dcache_line_size_get(void)
*
* @return size of the i-cache line or 0 if the i-cache is not enabled.
*/
static inline size_t sys_icache_line_size_get(void)
static inline size_t sys_cache_instr_line_size_get(void)
{
#ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
return icache_line_size_get();
return cache_instr_line_size_get();
#elif (CONFIG_ICACHE_LINE_SIZE != 0)
return CONFIG_ICACHE_LINE_SIZE;
#else

20
include/drivers/cache.h
View file

@ -17,7 +17,7 @@
*
* @return N/A
*/
void dcache_enable(void);
void cache_data_enable(void);
/**
*
@ -27,7 +27,7 @@ void dcache_enable(void);
*
* @return N/A
*/
void dcache_disable(void);
void cache_data_disable(void);
/**
*
@ -37,7 +37,7 @@ void dcache_disable(void);
*
* @return N/A
*/
void icache_enable(void);
void cache_instr_enable(void);
/**
*
@ -47,7 +47,7 @@ void icache_enable(void);
*
* @return N/A
*/
void icache_disable(void);
void cache_instr_disable(void);
/**
*
@ -60,7 +60,7 @@ void icache_disable(void);
* @retval 0 On success
* @retval -ENOTSUP If the operation is not supported
*/
int dcache_all(int op);
int cache_data_all(int op);
/**
*
@ -80,7 +80,7 @@ int dcache_all(int op);
* @retval 0 On success
* @retval -ENOTSUP If the operation is not supported
*/
int dcache_range(void *addr, size_t size, int op);
int cache_data_range(void *addr, size_t size, int op);
/**
*
@ -93,7 +93,7 @@ int dcache_range(void *addr, size_t size, int op);
* @retval 0 On success
* @retval -ENOTSUP If the operation is not supported
*/
int icache_all(int op);
int cache_instr_all(int op);
/**
*
@ -113,7 +113,7 @@ int icache_all(int op);
* @retval 0 On success
* @retval -ENOTSUP If the operation is not supported
*/
int icache_range(void *addr, size_t size, int op);
int cache_instr_range(void *addr, size_t size, int op);
#ifdef CONFIG_DCACHE_LINE_SIZE_DETECT
/**
@ -124,7 +124,7 @@ int icache_range(void *addr, size_t size, int op);
*
* @return size of the i-cache line or 0 if the i-cache is not enabled.
*/
size_t dcache_line_size_get(void);
size_t cache_data_line_size_get(void);
#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
@ -137,7 +137,7 @@ size_t dcache_line_size_get(void);
*
* @return size of the i-cache line or 0 if the i-cache is not enabled.
*/
size_t icache_line_size_get(void);
size_t cache_instr_line_size_get(void);
#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */

4
include/sys/arch_interface.h
View file

@ -890,7 +890,7 @@ int arch_icache_range(void *addr, size_t size, int op);
*
* @brief Get d-cache line size
*
* @see sys_dcache_line_size_get
* @see sys_cache_data_line_size_get
*/
size_t arch_dcache_line_size_get(void);
#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
@ -900,7 +900,7 @@ size_t arch_dcache_line_size_get(void);
*
* @brief Get i-cache line size
*
* @see sys_icache_line_size_get
* @see sys_cache_instr_line_size_get
*/
size_t arch_icache_line_size_get(void);
#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */

24
kernel/cache_handlers.c
View file

@ -7,30 +7,30 @@
#include <cache.h>
#include <syscall_handler.h>
static inline int z_vrfy_sys_dcache_all(int op)
static inline int z_vrfy_sys_cache_data_all(int op)
{
return z_impl_sys_dcache_all(op);
return z_impl_sys_cache_data_all(op);
}
#include <syscalls/sys_dcache_all_mrsh.c>
#include <syscalls/sys_cache_data_all_mrsh.c>
static inline int z_vrfy_sys_dcache_range(void *addr, size_t size, int op)
static inline int z_vrfy_sys_cache_data_range(void *addr, size_t size, int op)
{
Z_OOPS(Z_SYSCALL_MEMORY_WRITE(addr, size));
return z_impl_sys_dcache_range(addr, size, op);
return z_impl_sys_cache_data_range(addr, size, op);
}
#include <syscalls/sys_dcache_range_mrsh.c>
#include <syscalls/sys_cache_data_range_mrsh.c>
static inline int z_vrfy_sys_icache_all(int op)
static inline int z_vrfy_sys_cache_instr_all(int op)
{
return z_impl_sys_icache_all(op);
return z_impl_sys_cache_instr_all(op);
}
#include <syscalls/sys_icache_all_mrsh.c>
#include <syscalls/sys_cache_instr_all_mrsh.c>
static inline int z_vrfy_sys_icache_range(void *addr, size_t size, int op)
static inline int z_vrfy_sys_cache_instr_range(void *addr, size_t size, int op)
{
Z_OOPS(Z_SYSCALL_MEMORY_WRITE(addr, size));
return z_impl_sys_icache_range(addr, size, op);
return z_impl_sys_cache_instr_range(addr, size, op);
}
#include <syscalls/sys_icache_range_mrsh.c>
#include <syscalls/sys_cache_instr_range_mrsh.c>