Commit graph

360 commits

Author SHA1 Message Date
Piotr Pryga
97774e0d84 soc: arm: nrf52: Enable support for Direction Finding HW for nRF52820
Enable support for Direction Finding hardware for nRF52820 SOC.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-06-14 15:18:55 +02:00
Johan Stridkvist
b3389d4a5b soc: nrf53: Tune capacitor for LFXO for nRF53 and update accuracy
Switch from using internal 6pf to internal 7pf load capacitor for LFXO.
Use a default clock accuracy of 50PPM as this matches lab results.

50PPM should be sufficient for common operating temperatures of
25degC +- 15.

Signed-off-by: Johan Stridkvist <johan.stridkvist@nordicsemi.no>
2021-06-12 08:52:00 -05:00
Andrzej Głąbek
60d9988401 soc: nrf53: Add configuration options for HFXO/LFXO load capacitance
Add Kconfig options that allow configuration of optional internal
load capacitors for the high-frequency (HFXO) and low-frequency
(LFXO) crystal oscillators in nRF5340.
Default settings used for the new options are those that have been
in effect so far, i.e. external load capacitors for HFXO and 6 pF
internal capacitance for LFXO.

This commit also adds missing SOC_ENABLE_LFXO option dependency on
!TRUSTED_EXECUTION_NONSECURE.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-06-09 13:07:12 +02:00
Ioannis Glaropoulos
d105a2b76c arm: shrink names for null-pointer exception detection Kconfigs
Reduce the length of the Kconfig defines related to
null-pointed dereference detection in Cortex-M.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-26 12:30:05 -05:00
Lang Xie
7b7ed2baac soc: arm: nordic_nrf: nrf53: Fix flash page erase max time for nrf53
Increase FLASH_PAGE_ERASE_MAX_TIME_US of cpunet to be the same as the
value of cpuapp; FLASH_PAGE_ERASE_MAX_TIME_US is the execution window
duration when doing the flash operation synchronously along the radio
operations (SOC_FLASH_NRF_PARTIAL_ERASE not enabled); the previous
FLASH_PAGE_ERASE_MAX_TIME_US value of cpunet is lower than required.

Signed-off-by: Lang Xie <lang.xie@nordicsemi.no>
2021-05-26 08:30:55 -05:00
Andrzej Głąbek
797aa8b85a soc: nrf9160: Remove incorrect indication of SWO availability
Serial Wire Output functionality is not implemented in nRF9160.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-05-11 13:00:20 -05:00
Martí Bolívar
c8e8d1d109 soc: nrf52811: add missing instance 3 check
spi1 and i2c0 share peripheral ID number 3.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-07 09:27:21 +02:00
Martí Bolívar
824f7224d5 soc: nrf52811: fix enabled instance 0 check
Similar fix to that for the 52805.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-07 09:27:21 +02:00
Martí Bolívar
8765a6b041 soc: nrf52805: fix enabled instance 0 check
UART0, TWI0, and SPI0 have different peripheral IDs (2, 3, and 4
respectively) on this SoC and therefore should not be mutually
exclusive to use.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-07 09:27:21 +02:00
Gerard Marull-Paretas
f61649b7ba soc: replace power/power.h with pm/pm.h
Replace old header with the new one.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Krzysztof Chruscinski
518193f444 soc: arm: nordic: Do not use PM when no multithreading
Enable by default power managment only when multithreading is
enabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-04-29 14:50:35 +02:00
Ioannis Glaropoulos
0b464dcb9c soc: nordic_nrf: move NFCT_PINS_AS_GPIOS to common nRF definitions
Kconfig symbol NFCT_PINS_AS_GPIOS may be defined for all
Nordic nRF SoCs that have the NFCT hardware, so we move
the option definition in nRF common Kconfig file. Also,
we correct the help text to reflect that nRF52 series DKs
and nRF5340 DK have different pins for NFC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-04-26 17:21:37 +02:00
Krzysztof Chruscinski
cc7a324493 soc: arm: nordic: Indicate SWO presence in nrf52, nrf53 and nrf91
Add HAS_SWO to nordic SoC series.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-15 10:23:10 +01:00
Erwan Gouriou
79ea590bef soc: nrf: Enable default DWT null pointer exception detection
Default null pointer exception detection to the DWT solution
instead of MPU based solution.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-08 19:19:14 -05:00
Martí Bolívar
f7aeb2ae4b soc: nrf: add more DT GPIO helper macros
Add some helper macros that will be convenient to use from device
drivers for accessing and error checking pin mux information in the
devicetree:

- NRF_DT_PSEL(): get a PSEL value out of the DT from either a
  'foo-pin' or a 'foo-gpios' style property.

- NRF_DT_PSEL_CHECK_NOT_BOTH(), NRF_DT_PSEL_CHECK_EXACTLY_ONE():
  helpers for checking that a given devicetree is OK according to
  different criteria for setting PSEL properties (NAND or XOR on
  whether the properties exist, respectively).

See comments in the patch for more details.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-03-01 16:59:56 +01:00
Ioannis Glaropoulos
286757e3df soc: arm: nrf5340: remove handling for Erratum 19
Erratum 19 applies to earlier revisions of nRF5340 DK,
which are no longer supported in the tree, so we can
remove the code that handles it.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-19 15:12:28 +03:00
Ioannis Glaropoulos
ce134a7970 soc: arm: nrf5340: add QDEC capability in nRF5340 SoC definition
Add Kconfig options to signify that the nRF5340
HW has support for QDEC instances. Select the
options in the nRF5340 Application core definition.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-17 22:34:20 +03:00
Martí Bolívar
60ce0e41fd soc: nrf: fix NRF_DT_CHECK_GPIO_CTLR_IS_SOC
This was merged by mistake without being tested and is not working
properly. We need to avoid doing a BUILD_ASSERT() when the relevant
property is missing, because we can't use DT_GPIO_CTLR() on an
undefined property. Handle this with COND_CODE_1().

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-02-14 16:15:16 -05:00
Peter Bigot
e9b5be36db soc: nordic: disable system power management on nRF53 network core
The network core doesn't have access to the regulators necessary to
support system power management.  That has to be done on the
application core.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-02-01 15:05:03 -05:00
Peter Bigot
5d2acb30eb Revert "soc: nordic: Disable PM for SOC_NRF5340_CPUNET_QKAA"
This reverts commit f38ba314ea.

nrf5340dk_nrf5340_cpunet doesn't support power management, but that
should be handled another way.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-02-01 15:05:03 -05:00
Flavio Ceolin
f38ba314ea soc: nordic: Disable PM for SOC_NRF5340_CPUNET_QKAA
This targets was previously enabling PM but the code was doing nothing
because the logic was under an unsatisfied ifdef condition.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
321ce7fb77 power: Use substate-id in pm subsystem
Change subsystem to use struct pm_state with substate-id instead of
using only the power state category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
d21808b0b1 power: Remove residency and states from Kconfig
Residency time and power states are defined using device tree now.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
579f7049c7 power: Move pm subsystem to new power states
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Martí Bolívar
dbad2627c8 soc: nrf: add DT GPIO helper macros
Add some helper macros that will be convenient to use from device
drivers for accessing and error checking pin mux information in the
devicetree:

- NRF_DT_GPIOS_TO_PSEL(): converts a devicetree GPIO phandle
  <&gpioX pin flags> to the "PSEL style" registers found in
  nRF SoC family IPs. The conversion is done at
  build time and relies on devicetree properties.

- NRF_DT_CHECK_GPIO_CTLR_IS_SOC(): make sure a GPIO controller
  in a phandle-array property is one of the SoC GPIO controllers
  by checking its compatible is nordic,nrf-gpio.

See comments in the patch for more details.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-01-16 07:59:27 -06:00
Martí Bolívar
c8b89184f8 soc: nrf: clean up soc.h headers
Make a common header for common includes.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-01-16 07:59:27 -06:00
Andrzej Głąbek
978a031166 soc: nordic_nrf: Add validation of base addresses of ECB nodes from DT
Add check that validates that the base addresses specified in DT nodes
representing the ECB peripheral match the addresses of that peripheral
defined in MDK.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-01-13 12:57:13 +01:00
Flavio Ceolin
8fe3866e19 power: rename _pm_power_state_ -> pm_power_state
Leftover from old renaming commits. This function is not private and
should not start with underscore.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-04 09:02:23 -05:00
Peter Bigot
264d81257f power: fix Kconfig defaults
Some SoCs try to select power management in a way that can bypass the
dependency on system clock.  Make the selection conditional on the
dependency.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-12-27 18:18:52 +01:00
Joakim Andersson
a7fd4eab5c drivers: counters: Fix TIMER0 and RTC0 with Bluetooth controller
Fix TIMER0 and RTC0 being selectable when using out-of-tree Bluetooth
controller.
Generalize the Kconfig to have the features that use the HW peripheral
select them as reserved to make the dependencies more manageable.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-12-13 19:25:49 -05:00
Anas Nashif
72cab9a2d0 power: sys_set_power_state -> pm_power_state_set
remove sys_ prefix and rename API to be more consistent with guidelines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Anas Nashif
e0f3833bf7 power: remove SYS_ and sys_ prefixes
Remove SYS_ and sys_ from all PM related functions and defines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Anas Nashif
dd931f93a2 power: standarize PM Kconfigs and cleanup
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE

and use PM_ as the prefix for all PM related Kconfigs

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Piotr Pryga
0285903aee Bluetooth: controller: Add Direction Finding specific KConfig
Add separated Kconfig file for Bluetooth 5.1 Direction Finding.
Enable controller support for:
 - transmission of CTE
 - 2us antenna switching
 - 1us antenna switching
if build for nRF52833 SOC.
Add HAS_HW_NRF_RADIO_BLE_DF to nrf52833 SOC configuration.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2020-11-26 13:14:17 +01:00
Marek Pieta
3b4ead139f Bluetooth: controller: Fix TX power dependencies
Change adds missing TX power dependencies. nRF52833 and nRF52820 SoCs
also support higher TX power values.

Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
2020-11-17 11:52:06 +02:00
Jedrzej Ciupis
15fdd7175b drivers: ieee802154: Add support for IEEE 802.15.4 for nRF5340
This commit introduces support for IEEE 802.15.4 on nRF5340.

Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
2020-11-16 15:24:03 +01:00
Andrzej Głąbek
74930b9256 soc: nrf53: Add enabling of LFXO pins (XL1 and XL2)
Add a Kconfig option (enabled by default) the enables the low-frequency
oscillator (LFXO) functionality on the XL1 and XL2 pins in the nRF53
SoC initialization routine. This cannot be done in the clock control
driver, as it was done so far, because that won't work in a setup where
the application core image does not use the system clock at all.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-11-12 14:23:33 +01:00
Andrzej Głąbek
7a579025df soc: nrf53: Use nrfx HALs instead of direct register accesses
Replace direct register accesses in the SoC initialization routine
with proper calls to nrfx HAL functions.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-11-12 14:23:33 +01:00
Daniel Leung
9be37553ee timing: do not repeatedly do init()/start()/stop()
We should not be initializing/starting/stoping timing functions
multiple times. So this changes how the timing functions are
structured to allow only one initialization, only start when
stopped, and only stop when started.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-11-11 23:55:49 -05:00
Andrzej Głąbek
6207300dc3 boards: nrf5340dk_nrf5340: Add dts node for MX25R64 flash on QSPI
The nRF5340 (P)DK is equipped with the MX25R64 flash memory. Add a dts
node for that chip in the board definition as well as the missing QSPI
node in the nRF5340 SoC definition.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-11-10 21:01:37 +02:00
Øyvind Rønningstad
22eb8f496a nrf53: soc.c: Replace bespoke nrf53_has_erratum19() with MDK variant
Use nrf53_errata_19() from nrf_erratas.h, which is more robust

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-10-20 12:28:54 +02:00
Joakim Andersson
4cc6098af8 Bluetooth: controller: Select controller features from SoC capabilities
Select the controller feature support for data length and LE 2M PHY
based on the SoC hardware capabilities instead of relying on SoC
family.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-09-18 18:11:35 +02:00
Ioannis Glaropoulos
394d2912a1 arch: arm: cortex-m: implement timing.c based on DWT
For Cortex-M platforms with DWT we implement
the timing API (timing.c).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-05 13:28:38 -05:00
Ioannis Glaropoulos
61d1d2ea06 soc: arm: nrf: conditionally employ nRF-specific timing framework
Employ the nRF-specific timing calculations framework
(based on TIMER peripheral) only if the DWT is not present
on the SoC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-05 13:28:38 -05:00
Ioannis Glaropoulos
a681291ef4 soc: arm: nordic nrf: use bitmode-16 for timing measurements in nrf51
nRF51 TIMER2 periperhal does not have the 32-bit
bitmode, so we need to fallback to the bitmode 16.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-05 13:28:38 -05:00
Anas Nashif
a180b33c55 timing: add support for nordic SoCs with RTC timer
Add abstraction for nordic SoCs using Nordic RTC as the source for
timestamps and cycles.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Øyvind Rønningstad
77e75eab72 soc: arm: Kconfig: Add more nrf flash protection block sizes
Add
- NRF_MPU_FLASH_REGION_SIZE
- NRF_BPROT_FLASH_REGION_SIZE
- NRF_ACL_FLASH_REGION_SIZE

NRF_SPU_FLASH_REGION_SIZE is already available.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-09-04 13:38:38 +02:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Andrzej Głąbek
c519184211 soc: nordic_nrf: Add definition of nRF52805 SoC
Add definition of the nRF52805 SoC together with the corresponding
dts files.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-08-31 15:40:19 +02:00
Andrzej Głąbek
d2027b3b98 soc: nordic: nrf51: Add missing peripheral Kconfig options
To indicate that the CLOCK and POWER peripherals are present in those
SoCs, thus the corresponding nrfx drivers can be used.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-08-31 12:40:47 +02:00