soc: arm: nrf5340: remove handling for Erratum 19
Erratum 19 applies to earlier revisions of nRF5340 DK, which are no longer supported in the tree, so we can remove the code that handles it. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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@ -45,7 +45,6 @@ if CPU_HAS_NRF_IDAU
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config NRF_SPU_FLASH_REGION_SIZE
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hex
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default 0x8000 if SOC_NRF9160
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default 0x8000 if SOC_NRF5340_CPUAPP && NRF5340_CPUAPP_ERRATUM19
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default 0x4000 if SOC_NRF5340_CPUAPP
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help
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FLASH region size for the NRF_SPU peripheral
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@ -11,19 +11,6 @@ config SOC
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config NUM_IRQS
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default 69
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config NRF5340_CPUAPP_ERRATUM19
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bool "Include workarounds for Erratum 19"
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depends on !TRUSTED_EXECUTION_NONSECURE
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help
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This anomaly applies to IC Rev. Engineering A, build codes QKAA-AB0.
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This config MUST be enabled if there is a chance the code will be run
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on nRF5340 Engineering A. Enabling this config is safe on other
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nRF5340 variants, but might increase flash size.
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The workaround involves adding run-time checks when using the SPU,
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and aligning regions on 32 KiB instead of 16 KiB if they are to be
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locked with the SPU.
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More info: https://infocenter.nordicsemi.com/topic/errata_nRF5340_EngA/ERR/nRF5340/EngineeringA/latest/anomaly_340_19.html?cp=3_0_1_0_1_15
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config IEEE802154_NRF5
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default IEEE802154
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@ -102,24 +102,4 @@ void z_platform_init(void)
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SystemInit();
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}
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#if defined(CONFIG_SOC_NRF5340_CPUAPP) && \
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!defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) && \
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!defined(CONFIG_NRF5340_CPUAPP_ERRATUM19)
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static int check_erratum19(const struct device *arg)
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{
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ARG_UNUSED(arg);
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if (nrf53_errata_19()) {
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LOG_ERR("This device is affected by nRF53 Erratum 19,");
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LOG_ERR("but workarounds have not been enabled.");
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LOG_ERR("See CONFIG_NRF5340_CPUAPP_ERRATUM19.");
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k_panic();
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}
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return 0;
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}
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SYS_INIT(check_erratum19, POST_KERNEL, CONFIG_APPLICATION_INIT_PRIORITY);
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#endif
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SYS_INIT(nordicsemi_nrf53_init, PRE_KERNEL_1, 0);
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