- Fix the system clock frequency: should be 111.1 MHz instead
of 100 MHz.
- Set ticks per second to 1000 for higher system clock precision.
- Set QEMU icount shift value to 3 so that one instruction gets
executed every 2^3 = 8 ns.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
When QEMU is running in icount mode, the behaviour regarding
the CPU being in sleep mode is configurable, with the default
value being set to 'off'. In this case, instruction counting
continues even when the CPU is sleeping or no target time is
set in the system timer. If the sleep parameter is set to
'on', instruction counting stops if the CPU is sleeping, and
the instruction count will fast-forward directly to the next
target time once it is being set.
In the Xilinx derivative of QEMU (which simulates ZynqMP and
Zynq-7000 SoCs), the default configuration causes QEMU to no
longer accept control commands via the console or remotely
whenever Zephyr enters and remains in idle mode.
Therefore, this commit makes the value of the sleep para-
meter of the icount functionality configurable, with the
default value remaining 'off'. The value can be changed at
board level alongside with the specification of the icount
shift value.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
The qemu_cortex_a9 target simulates the Xilinx Zynq-7000
in a single core configuration with 512 MB of RAM. Supported
peripherals are the Zynq's two UARTs, of which one is activated
for console use, and the two Ethernet controllers, of which
GEM0 can be linked to the local zeth interface.
This target uses Xilinx' fork of QEMU, which is already being
used by the qemu_cortex_r5 target. Although being labelled
'arm64', this version of QEMU is also capable of emulating the
Zynq-7000 based on a binary device tree file. While regular
QEMU provides a Zynq-based machine, this implementation is
buggy and/or incomplete.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
