Make the LSE driving capability configurable for the STM32 series.
Fixes#44737.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
STM32 supports now custom PWM flags, include them by default as done for
the standard flags.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce ADC properties which indicated if the ADC instances have
dedicated channels for the internal temperature sensor or voltage
reference.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Some STM32 series need to configure health test register
for proper RNG behavior.
In addition, some also require to write a Magic number
before writing the configuration.
Note: on stm32h7 not all product lines support this configuration.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
This change also prepares the introduction of timer based counter
(which requires prescaler at timer level)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The maximum supported speed according to the SX126x datasheet (I have
not found that information in the STM32WL datasheet or reference
manual). Increase the Sub-GHz SPI frequency from 1 Mhz to to 12 MHz,
which corresponds to a baud rate prescaler of 4 with a 48 MHz clock. It
also matches what is done the the STM32CubeWL package.
This reduces the time the MCU is kept running, thus reducing the global
power consumption.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The priority of the LPTim interrupt on each stm32 soc
is put at the same level as the SysTick. This priority
level is given by the system Handler priority reg
(SHPR3) when the PM is not configured.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The max-erase-time property was introduced for the STM32 flash driver,
but it was inserted as an optional property in the generic
soc-nv-flash binding which is used by other SoCs.
Make it a required property in a new st,stm32-nv-flash binding
instead, since it is at present a vendor specific property.
Update the DTS files accordingly. Keep the existing "soc-nv-flash"
value in the compatible list in each case, so that DT_HAS_COMPAT(...
soc_nv_flash) tests on these nodes will still succeed, but put it
after a newly added "st,stm32-nv-flash" compatible, so that the
SoC-specific binding will be used as it is discovered first by the DT
tooling.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Add a device node for the subghz radio in stm32wl.dtsi. The radio is
present in all chips of the series, so having the node there with the
common properties simplifies the board dts files.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This adds support for controlling the SUBGHZSPI NSS line in STM32WL
devices. This is a special dedicated SPI port only connected to the
radio device internally, chip select happens through a bit in the PWR
module. Adding a special dt-property to identify the port, it all gets
built out on non-WL devices.
Deduplicate the existing dts bindings in the process, and add the new
one for the special spi with the new property.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This commit adds the dt node for rng to the stm32wl series
and sets it as chosen zephyr,entropy source.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds max-erase-time element which holds the
maximum erase time of a sector or page or half-page for
all the series of stm32.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Add the lptim1 device node definition and enable the corresponding
exti interrupt in sys_clock_driver_init().
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
In some stm32 series systick was disabled in order to
allow alternate use of lptim timer as kernel low power ticker.
Doing this, dts based definition of CORTEX_M_SYSTICK Kconfig symbol
is disabled and CORTEX_M_SYSTICK was redefined with 'default y'
in stm32 soc files which makes things more complex to handle to
alternate with LPTIM activation.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
