Some options like stack canaries use more stack space,
and on x86 this is not quite enough for ztest's main
thread stack to be 512 bytes.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Populate thread->stack_obj earlier in the thread initialization
process such that it is set when z_new_thread() is called.
There was nothing specific about its position, or the rest of
the code in that CONFIG_USERSPACE block, so just move it all up..
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add the serial wire JTAG configuration of the stm32f1x family.
Before gpio is initialized, you can choose to turn off the debug pin to
make the used pins available.
Signed-off-by: Findlay Feng <i@fengch.me>
It's been annoying that there was no convenient way to get back to the
documentation home page. There is a link in the breadcrumb trail at the
top of the page, but folks didn't notice that. This PR adds a
"Documentation Home" link at the top of the left-nav menu.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The sector size is 0 will pass "fs->sector_size % info.size" then start
a loop in nvs_startup() and never return. So retrun an error if the
sector size is 0.
Signed-off-by: Harry Jiang <explora26@gmail.com>
Modify mqtt_publisher sample to use mqtt_client_set_proxy().
Removed CONFIG_MQTT_LIB_SOCKS based setup.
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
Current SOCKS5 based connections in mqtt are only
TCP (nonsecure) based. To support TLS based SOCKS5
connections, new methods needs to be introduced.
Instead, removed CONFIG_MQTT_LIB_SOCKS based implementation.
And now mqtt provides an api to set proxy
(mqtt_client_set_proxy()) details. That's enough,
socket layer will take care of making connections through
proxy server.
Fixes: #17037
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
Current SOCKS5 implementation is above socket level and every
higher layer protocol or application level needs to have
SOCKS5 related changes. This solution is based on socket
setsockopt(). Application caller has to set proxy details
through setsockopt() and socket:connect() will take care
creating connection.
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
The SO_SOCKS5 socket option can be used by the application to
set the SOCKS5 proxy details. These details will be used when
connecting to peer.
Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
The init addr should contain the on-air address used to establish the
connection. The dst address contains either the current RPA of the
unknown peer, or the identity address after identity information has
been exchanged.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Error codes are listed in header files and in the core spec as hex
values. Always print them in hex in debug for easier error code
checking.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The string "xx:xx:xx:xx:xx:xx (random-id)" is 30 characters including
zero termination.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The SDK version is of the form X.Y.Z. Change the cmake scripts to be
based on X.Y of the version. This allows us to easily support newer
toolchains without having to explicitly add cmake files for the version
as well as removes duplication between those files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Fix an issue where the generated identity was not permanently stored.
This resulted in being unable to reconnect after bonding when using
privacy, since a new local IRK was generated on reboot.
When settings is enabled the application is responsible for loading
identities and possible creating its own identities.
When settings_load is called and no identities has been created or found
in persistent storage a new identity will be created.
Since bt init has not been finalized bt_id_create will not make a call
to bt_settings_save_id. So we need to make sure that this identity will
be stored.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
STM32 clock control subsystem allows to configure a different
frequency value for core clock (SYSCLK) and AHB clock (HCLK).
Though, it is HCLK which is used to feed Cortex Systick timer
which is used in zephyr as reference system clock.
If HCLK frequency is configured to a different value from SYSCLK
frequency, whole system is exposed to desynchro between zephyr clock
subsytem and STM32 HW configuration.
To prevent this, and until zephyr clock subsystem is changed to be
aware of this potential configuration, enforce AHB prescaler value
to 1 (which is current default value in use for all STM32 based
boards).
On STM32H7, enforce D1CPRE which fills the same role as ABH precaler.
On STM32MP1, the equivalent setting is done on A7 core, so it is
not exposed to the same issue as long as SYS_CLOCK_HW_CYCLES_PER_SEC
is set with the 'mlhclk_ck' clock frequency value. Update
matching boards documentation.
Fixes#17188
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add two bindings
test-bindings/multidir.yaml
test-bindings-2/multidir.yaml
and a new test-multidir.dts with two nodes that use them.
Verify that the two bindings were found by checking the
Device.binding_path attribute for the two device nodes.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
gen_defines.py and edtlib.py were recently added in
commit 62d5741476 ("dts: Add new DTS/binding parser").
The old extract_dts_includes.py script allowed for multiple
dts bindings dirs. Let's add that functionality to the new
scripts as well.
Signed-off-by: Michael Scott <mike@foundries.io>
There are two aspects to this: CPU registers are twice as big, and the
load and store instructions must use the 'd' suffix instead of the 'w'
one. To abstract register differences, we simply use a ulong_t instead
of u32_t given that RISC-V is either ILP32 or LP64. And the relevant
lw/sw instructions are replaced by LR/SR (load/store register) that get
defined as either lw/sw or ld/sd. Finally a few constants to deal with
register offsets are also provided.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.
Redirects for the web documentation are also included.
Then zephyrbot complained about this:
"
New files added that are not covered in CODEOWNERS:
dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi
Please add one or more entries in the CODEOWNERS file to cover
those files
"
So I assigned them to those who created them. Feel free to readjust
as necessary.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
These defines are specific to the Cortex-M. Move them to their own
header file to prepare for Cortex-R support.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
The ARM specific _impl_k_thread_abort function only applies to Cortex-M
so move it to the cortex_m specific directory.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
Even one liner if () statement should have braces.
Fixing parameter indentation as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Depending on how compiler is built, it prints a different include
directory with `--print-file-name=include`. What we want, instead, is
directories with `stddef.h` and `include-fixed/limits.h`.
This commit explicitly specify the header files we want to use, then
take the directory from the returned path.
Signed-off-by: Yasushi SHOJI <y-shoji@ispace-inc.com>
This abstracts the interface for generation of the strip command
line, by naming the desired actions instead of directly setting the
command parameters, which then opens up for other binary tool sets
which may require different arguments to achieve the desired result.
The intent here is to abstract Zephyr's dependence on toolchains,
thus allowing for easier porting to other, perhaps commercial,
toolchains and/or usecases.
No functional change expected.
Signed-off-by: Danny Oerndrup <daor@demant.com>
This abstracts the interface for generation of the readelf command
line, by naming the desired actions instead of directly setting the
command parameters, which then opens up for other binary tool sets
which may require different arguments to achieve the desired result.
The intent here is to abstract Zephyr's dependence on toolchains,
thus allowing for easier porting to other, perhaps commercial,
toolchains and/or usecases.
No functional change expected.
Signed-off-by: Danny Oerndrup <daor@demant.com>
This abstracts the interface for generation of the objdump command
line, by naming the desired actions instead of directly setting the
command parameters, which then opens up for other binary tool sets
which may require different arguments to achieve the desired result.
The intent here is to abstract Zephyr's dependence on toolchains,
thus allowing for easier porting to other, perhaps commercial,
toolchains and/or usecases.
No functional change expected.
Signed-off-by: Danny Oerndrup <daor@demant.com>
This abstracts the interface for generation of the objcopy command
line, by naming the desired actions instead of directly setting the
command parameters, which then opens up for other binary tool sets
which may require different arguments to achieve the desired result.
The intent here is to abstract Zephyr's dependence on toolchains,
thus allowing for easier porting to other, perhaps commercial,
toolchains and/or usecases.
No functional change expected.
Signed-off-by: Danny Oerndrup <daor@demant.com>
Commit ee4c23cc1f ("CMSIS v2: Work around time unit confusion")
enforced CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000 on this test, but the
m2gl025_miv platform has some issues with it. Let's exclude it for now.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Commit 33c64c2578 ("tests/cmsis_rtos_v1: Correct timing assumptions")
introduced a stricter criteria where time spent has to match the clock
within 1% discrepancy. It is zassert_true(diff < max && diff > min)
meaning _less than_ 1%.
The test uses a 1-second delay. When SYS_CLOCK_TICKS_PER_SEC=100 that
means a single tick discrepancy would overflow the test.
Let's be inclusive and allow up to 1% instead. That allows for this
test to pass on m2gl025_miv when using 100 ticks per sec.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add a new sifive,plic-1.0.0 binding that inherits from the riscv,plic0
binding. The new binding adds a required riscv,ndev property, which
gives the number of external interrupts supported.
Use the new binding for microsemi-miv.dtsi (with a value of 31 for
riscv,ndev, from http://www.actel.com/ipdocs/MiV_RV32IMAF_L1_AHB_HB.pdf)
and riscv32-fe310.dtsi (which already assigns riscv,ndev).
Also remove a spurious riscv,ndev assignment from
riscv32-litex-vexriscv.dtsi.
Also make edtlib and the old scripts/dts/ scripts replace '.' in
compatible strings with '_' when generating identifiers.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Several problems with memset usage in the LwM2M subsystem were
identified:
- Every single object that can have multiple instances is using
memset to initialize static resource data during init. This data
will already be set to 0 because it is static, so the memset
statements are unneeded.
- Instead of using memset during object init which is only called
one time during kernel startup, let's add a memset to the
object create function to ensure the resource data is cleared out.
It could have been used prior and then released via a DELETE op.
- the IPSO Timer object was setting a lot of data structure members
to 0 in the create function. Let's do 1 memset on the entire
structure and then only the non-zero values afterward.
Signed-off-by: Michael Scott <mike@foundries.io>
When presenting errors in lwm2m_engine_set() let's include the related
LwM2M path for easier debugging.
Signed-off-by: Michael Scott <mike@foundries.io>
Let's add support for recently added LwM2M objects:
- Connectitiy Monitoring
- Location
- IPSO Accelerometer
- IPSO Buzzer
- IPSO On/Off Switch
- IPSO Push Button
Currently, this is limited to compile enabled and manual creation
of objects via LwM2M server. Objects will respond to read/write
operations, but not have real HW backing.
Signed-off-by: Michael Scott <mike@foundries.io>
