Commit graph

31 commits

Author SHA1 Message Date
Anas Nashif
699880a430 arch: arm: cortex_m: rename expection header
Rename exception header and use the same name as all architecture ports.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:22:40 -05:00
Huifeng Zhang
df41deac1c arch: arm: Remove aarch32 directory
It doesn't make sense to keep the aarch32 directory in the
'arch/arm/core' directory as the aarch64 has been moved out.

This commit introduces the following major changes.

  1. Move all directories and files in 'arch/arm/core/aarch32' to
    'arch/arm/core' and remove the 'arch/arm/core/aarch32' directory.
  2. Move all directories and files in 'arch/include/aarch32' to
    'arch/include' and remove the 'arch/include/aarch32' directory.
  3. Remove the nested including in the 'arch/include/kernel_arch_func.h'
    and 'arch/include/offsets_short_arch.h' header files.
  4. Change the path string which is influenced by the changement 1
    and 2.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2023-09-13 10:08:05 +01:00
Gerard Marull-Paretas
fcaa259e22 soc: arm: remove all unnecessary NMI_INIT() calls
NMI_INIT() is now a no-op, so remove it from all SoC code. Also remove
the irq lock/unlock pattern as it was likely a cause of copy&paste when
NMI_INIT() was called.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-07-05 09:15:36 +02:00
Gerard Marull-Paretas
a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Daniel DeGrasse
3b59b495b7 soc: arm: nxp_lpc: convert NXP LPC SOCs to use CMSIS SystemInit
Convert NXP LPC SOCs to use CMSIS SystemInit, and remove redundant code
where it exists. This will enable initialization flows to be more
standardized across all platforms.

Since LPC54xxx and LPC55xxx series enables SRAM banks in SystemInit,
provide Kconfigs to bypass this setting and keep additional SRAM
banks unclocked.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-02-20 09:47:28 +01:00
Daniel DeGrasse
e274fbe3f9 soc: lpc54114: update multi core support for LMA address offset
Update lpc54114 support to use LMA address offset instead of linking
secondary core image into primary core memory. This will allow support
with sysbuild to be enabled. Additionally, use partitions to select where
the secondary core image will be located in flash

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-11-15 14:46:02 +01:00
Gerard Marull-Paretas
0e69129fb3 soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
Yegor Yefremov
b4dfdb5afb soc: arm: nxp_lpc: fix typos
Typos were found with codespell utility.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2022-03-10 17:19:49 -05:00
Daniel Leung
aa20e081d2 arm: remove @return doc for void functions
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-12 16:02:16 -05:00
Mahesh Mahadevan
1d44e281a6 soc: Include PINT include file conditionally
Include fsl_pint.h header file only when the
CONFIG_GPIO_MCUX_LPC is enabled

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-12-09 09:18:10 -06:00
Andrei Gansari
5ed37c61a9 soc: lpc54xxx: align to lpc55xxx multicore defs
Aligns lpc54xxx Kconfigs and other definitions to lpc55xxx.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-10 15:38:54 -05:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Kumar Gala
c2135f8721 devicetree: DT_NODE_HAS_COMPAT_STATUS_OKAY -> DT_NODE_HAS_COMPAT_STATUS
Swap this out and make the status a parameter.
Leave a couple of cases of DT_NODE_HAS_COMPAT().

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-08 19:37:18 -05:00
Martí Bolívar
17b8667197 dts: clean up some redundant DT checks
These are redundantly checking a node's status twice.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-08 19:37:18 -05:00
Martí Bolívar
7e0eed9235 devicetree: allow access to all nodes
Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.

Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.

To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:

- emit macros for all existing nodes in gen_defines.py, regardless
  of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-08 19:37:18 -05:00
Andrei Gansari
3cc0aa7c62 soc: lpc devices spi clock speed increase
High Speed Flexcomm device that handles high speed SPI transfer are
mapped to the same High Frequency clock that the ARM core uses.
This allows for higher frequency SPI traffic.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-05-07 12:47:34 -05:00
Kumar Gala
fdd85d5ad7 dts: Rename DT_HAS_NODE macro to DT_HAS_NODE_STATUS_OKAY
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear.  As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-06 05:25:41 -05:00
Kumar Gala
979904b6af soc: arm: nxp_lpc: Convert from Kconfig to DT_NODELABEL
As we phase out per instance Kconfig symbols convert to utilize
DT_NODELABEL for SPI and I2C instances instead.

Also updated comments to change from FLEXCOMM8 to HSLSPI.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-05 08:57:45 -05:00
Kumar Gala
ee255ae548 soc: arm: replace DT_ARM_CORTEX_*_CLOCK_FREQUENCY with new dt macros
Replace DT_ARM_CORTEX_*_0_CLOCK_FREQUENCY with a PATH based reference
to cpu@0 (DT_PATH(cpus, cpu_0)) and than getting the clock_frequency
property:

    DT_ARM_CORTEX_*_CLOCK_FREQUENCY ->
	DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-27 19:38:34 -05:00
Maureen Helm
c5ef6dc73f boards: lpcxpresso54114: Enable i2c instance 4
Enables i2c instance 4 on the lpcxpresso54114 board. Configures pinmuxes
and clocks, and updates board documentation accordingly.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-04-09 08:52:13 -05:00
Carlo Caione
aec9a8c4be arch: arm: Move ARM code to AArch32 sub-directory
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.

There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Maureen Helm
5472961ca0 boards: lpcxpresso54114: Enable spi instance 5
Enables spi instance 5 on the lpcxpresso54114 board. Configures pinmuxes
and clocks, and updates board documentation accordingly.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-12-10 08:48:56 -06:00
Andrei Gansari
de514bc98a soc: enable PINT device at LPC SoC boot
PINT device is enabled when SoC is booting up. Applies to LPC54xxx and
LPC55xxx families.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-11-13 12:05:48 -06:00
Andrew Boie
8c98a97581 arm: arch code naming cleanup
This patch re-namespaces global variables and functions
that are used only within the arch/arm/ code to be
prefixed with z_arm_.

Some instances of CamelCase have been corrected.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-04 10:46:23 +02:00
Piotr Zięcik
1161fdf239 soc: lpc54xxx: Get CPU clock frequency from DTS
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Anas Nashif
d1b2718687 cleanup: include/: move uart.h to drivers/uart.h
move uart.h to drivers/uart.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Ioannis Glaropoulos
fb713aa062 soc: arm: move z_clearfaults() in kernel_arch_init()
In kernel_arch_init() we initialize the ARM core (interrupt
setup, fault init, etc.) so we can also move z_clearfaults()
in the same function and skip invoking it in the SoC init
functions.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-05-17 09:48:11 -07:00
Patrik Flykt
fd42bf7443 soc: Rename reserved function names
Rename reserved function names in the soc/ subdirectory.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Maureen Helm
011a88c744 ext: mcux: Update to MCUXpresso SDK 2.5.0
Updates the MCUXpresso SDK to version 2.5.0 for applicable SoCs.
Wireless (KW*) and legacy (KL25) SoCs were not included in this
MCUXpresso SDK release and are therefore not updated here.

New in this release is SoC-level and board-level support for external
xip flash in the i.MX RT family.

For RT1050, we are now using the MCUXpresso SDK for the EVKB version of
the board, which correponds to an upgrade from A0 to A1 silicon.
However, we don't yet have Kconfigs in place to support A1 silicon part
numbers, and therefore add a simple cmake hack to convert A0 part
numbers to A1 part numbers.

The SDK flash driver interface also changed slightly in this release,
and thus the zephyr flash shim driver is updated accordingly.

Origin: MCUXpresso SDK
License: BSD 3-Clause
URL: mcux.nxp.com
Purpose: Provide device header files and bare metal peripheral drivers
for Kinetis, LPC, and i.MX SoCs.
Maintained-by: External

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-01-03 17:25:28 -05:00
Anas Nashif
70d819b405 arm: soc: move arm SoCs to top-dir
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00
Renamed from arch/arm/soc/nxp_lpc/lpc54xxx/soc.c (Browse further)