Files renaming done to better isolate zephyr related
functions from stm32 hal related functions
Signed-off-by: Alessandro Manganaro <alessandro.manganaro@st.com>
Make the SMPS_MODE define visible from drivers by moving it to soc.h
This define is for example used by the ADC driver to determine if sampling
should be synchronized with the SMPS clock.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Enables the XSPIM2 rail when using GPIO bank N
Enables the XSPIM1 rail when using GPIO bank O or P
Enables the USBvoltage detector when using the GPIO M
Signed-off-by: Francois Ramu <francois.ramu@st.com>
DBGMCU clock handling was not optimal.
If it exists, enable it before dealing with debug configuration in one
block, then deactivate it after in another block.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Similarly to debug in stop mode, enable debug in sleep mode on H7 series,
as initially described by `STM32_ENABLE_DEBUG_SLEEP_STOP` option.
Not extending it further to other series as I won't be able to test.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
# Conflicts:
# soc/st/stm32/common/soc_config.c
HAL_Enable/DisableDBGStopMode() was one of the last usage of HAL
definitions from Legacy HAL APIs.
Use LL instead to harmonize code across series and remove this dependency.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The STM32WB06 and STM32WB07 SoCs do not support SMPS output current limit.
This makes the LL_PWR_SetSMPSPrechargeLimitCurrent function and all the
LL_PWR_SMPS_PRECH_LIMIT_CUR_xxx defines not visible when one of these SoCs
is selected, resulting in a build failure.
Fix this by only handling SMPS current limit when the feature is available.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
check if two or three I2C instances with same irq are enabled
at same time then enable shared_interrupt handler.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Rather setting the driver default in soc, make it directly at symbol
level rather than soc and clean up redundant `select` occurrences.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
CLOCK_CONTROL subsystem is expected to be enabled systematically on all
STM32 devices.
Make it a series default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add support for the stm32h755 which is a close relative of
the stm32h745 with additional cryptography and hashing
peripherals.
Signed-off-by: Mike Banducci <michael.banducci@sandc.com>
For stm32 platforms where the sysclock is less or equal to
32MHz, the Ticks per second is reduced to 8000 (instead of
10000).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The total number of IRQs for this chip is 110.
Refer to the reference manual table 46 for IRQs.
Signed-off-by: Rahul Arasikere <arasikere.rahul@gmail.com>
This commit fixes a bug with the declaration of the Kconfig option
MEMC_STM32.
The option is defined in two files:
- `drivers/memc/Kconfig.stm32`, wich depends on
- `MEMC`
- `DT_HAS_ST_STM32_FMC_ENABLED`
-`soc/st/stm32/Kconfig.defconfig`, wich depends on
- `MEMC`
- `SOC_FAMILY_STM32`
So, if you have `CONFIG_MEMC=y` in your Kconfig options and you are on a
STM32 SoC, `CONFIG_MEMC_STM32` will be enabled, even if there is no
STM32 FMC enabled.
This Kconfig option causes the driver for the STM32 FMC to be compiled,
regardless of the presence of an enabled node for the FMC.
However, the driver fails to compile if there is no FMC node in the
devicetree. So, if you compile a project with `CONFIG_MEMC=y` on a board
with an STM32 SoC and no enabled FMC, the build will fail.
This commit deletes the Kconfig declaration in the `Kconfig.defconfig`,
as it isn't useful and is the one provoking the bug.
It also add in the `Kconfig.stm32` the compatible `st,stm32h7-fmc`, wich
use the same driver and so need to be enabled by the same Kconfig
option.
Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
SYSTEM_WORKQUEUE_STACK_SIZE increase is required to fix not
only BLE Ext Adv (70935), but also other BLE use cases according
STM32WBA HCI driver
Signed-off-by: Alessandro Manganaro <alessandro.manganaro@st.com>
Some stm32 series, do not have a LL_DBGMCU_SetTracePinAssignment
function to enable trace IO port, this is the case with the
stm32h7 serie.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
LPTIM is not available in STOP3 mode, so RTC needs to be used instead.
This code usese similar approach as STM32WBAx for suspend to ram.
The STOP3 is disabled by default in device tree.
Signed-off-by: Adam Berlinger <adam.berlinger@st.com>
Convert the hci_stm32wba.c driver to the new HCI API. Unlike in most cases,
the devicetree node is already enabled on the SoC level (rather than board
level). This is in order to mirror how the Kconfig option was originally
enabled, i.e. on the SoC level.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
The drivers should be independent after the move to the new HCI driver
API. Having them as a choice also has unexpected consequences with some
drivers being unexpectedly enabled.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
When BCM4 bit is set to zero, the hardware semaphore clock is never
enabled on startup. The hardware semaphores might still randomly work,
but very unreliably, and the locking procedure will need several retries
despite no competition on the hardware semaphores. This leads to wasted
clock cycles on the M4 and sometimes even random kernel panics.
This can be solved by always enabling the hardware semaphore clock in
the init procedure of the M4, regardless of whether it is used within
the initialization or not. On the M7, it is already always enabled.
Signed-off-by: Celina Sophie Kalus <hello@celinakalus.de>
Add the new STM32HRSX serie with stm32H7R3, stm32H7R7,
stm32H7S3, stm32H7S7 devices from STMicroelectronics
Same MPU regions as stm32h7 device.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Complete wake-up pins configuration before powering off
the system when the CONFIG_STM32_WKUP_PINS flag is enabled.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Implement GPIO pins configuration as sources for STM32 PWR wake-up pins
behind the scenes exclusively from devicetree information for all series
using the public stm32_pwr_wkup_pin_cfg_gpio() function.
Introduce macros for parsing & storing DT wake-up pins config in C structs.
Introduce user-configurable STM32_WKUP_PINS Kconfig flag.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
This commit introduces support for an alternate linking method in the
LLEXT subsystem, called "SLID" (short for Symbol Link Identifier),
enabled by the CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID Kconfig option.
SLID-based linking uses a unique identifier (integer) to identify
exported symbols, instead of using the symbol name as done currently.
This approach provides several benefits:
* linking is faster because the comparison operation to determine
whether we found the correct symbol in the export table is now an
integer compare, instead of a string compare
* binary size is reduced as symbol names can be dropped from the binary
* confidentiality is improved as a side-effect, as symbol names are no
longer present in the binary
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
STM32 MCU shall set voltage regulator level with respect to set clock
frequency to reach optimal power consumption.
Voltage regulator is set prior to clock setting based on configuration
from dts/overlay file. Config_regulator_voltage is set as weak in
clock_stm32_ll_common - config_regulator_voltage can be
extended to other STM32 families without need to rewrite heavily
family clock driver, default one can be still used.
Signed-off-by: Lubos Koudelka <lubos.koudelka@st.com>
