Commit graph

15 commits

Author SHA1 Message Date
Marcin Szkudlinski
84c09433b5 mtl: soc: TLB driver provides required size of L3 storage buffer
TLB driver knows the required number of bytes for HPSRAM
storage during power off state.

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-18 13:00:04 -05:00
Marcin Szkudlinski
3ee8bf7053 mtl: soc: add TLB driver context save to platform PowerManagement
Connect the TLB context save to MTL suspend power flow

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-18 13:00:04 -05:00
Marcin Szkudlinski
540f6d1dc5 mtl: drivers: tlb driver cleanup
a small cleanup in the code, preaparation for memory context save

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2022-11-18 13:00:04 -05:00
Jakub Dabek
b052143077 memory manager: Add runtime memory discovery
Add runtime physical memory discovery. This allows platforms with
different physical memory sizes to use the same driver for memory
management.

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2022-11-07 06:44:05 -05:00
Anas Nashif
6c3277eada intel_adsp: ace: rename namespace: MTL -> ACE
MTL is just one platform and this code is going to be used in multiple
platforms currently under development, so reduce the confusion and move
to a common namespace.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif
0869e62539 intel_adsp: cleanup ace_v1x-regs.h more and prep for removal
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Flavio Ceolin
45465708f0 soc: intel_adsp: Add ACE soc series
ACE15_MTPM is one SOC from the ACE series. Organize
it following cavs pattern.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-09-09 16:03:59 -04:00
Ederson de Souza
67a6837efd drivers/mm: Remove redundant ifdef for MTL ADSP TBL implementation
An `ifdef CONFIG_SOC_SERIES_INTEL_ACE1X` currently always evaluates to
true, as `drivers/mm/mm_drv_intel_adsp_mtl_tlb.c` is only built when
`CONFIG_MM_DRV_INTEL_ADSP_MTL_TLB=y`, which depends on
`CONFIG_SOC_SERIES_INTEL_ACE1X`. So remove the ifdef.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-09-08 18:03:33 -04:00
Ederson de Souza
03a947850d drivers/mm: Get some bit configurations from DTS instead of SoC version
Migrate information to DTS and get it from there on the code. Note that
for CAVS 15, the information is not migrated as there's no DTS entry for
it. It can be brought back (in the DTS) if TLB support is enabled for
it.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-09-08 18:03:33 -04:00
Kumar Gala
fab8d25fd3 drivers: mm: Add dts binding specific for ADSP Meteor Lake TLB
Add a specific compatiable and binding for intel,adsp-mtl-tlb.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-31 11:17:37 -05:00
Anas Nashif
af3d5331a1 intel-adsp: migrate cavs-mem.h to adsp_memory.h
Move header and make it soc specific.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-21 17:55:41 -04:00
Jaroslaw Stelter
fe5ed68356 soc: ace_v1x: check physical memory bounds on page unmap.
This patch fix issue with unmapping of virtual addresses mapped
to non-existing physical memory. MTL TLB table is initialised with
1:1 mapping, however virtual space is much wider than available
physical space. We should not try to free and manage of power for
non-existing physical pages.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-07-21 05:32:03 -04:00
Jaroslaw Stelter
afb156a1eb soc: ace_v1x: unmap entire unused virtual space
This patch corrects the initial unmapping of unused l2 memory
to unmap until the end of virtual address space instead
of unmapping until the end of l2 physical memory.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-07-13 09:46:48 -05:00
Jaroslaw Stelter
8b598539f2 soc: ace_v1x: correct the move_region behavior
This patch introduces sys_mm_drv_move_region implementation
which stops usage of the sys_mm_drv_simple_move_region.
The sys_mm_drv_simple_move_region is unsuitable becuase
it iterates through physical pages in linear fashion.
The new implementation queries the tlb for each virtual
page of the requested region to find the physical page
to be remapped.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2022-07-13 09:46:48 -05:00
Anas Nashif
3ccafb1af3 intel_adsp: meteorlake: add memory driver
Add TLB driver specific for Meteorlake.

Add missing kconfig resource and fix include path
add hpsram power up and ref counter

Use memblock to track physical page usage in mtl tlb driver. The
applications that will be using the tlb memory driver should not
track the physical page mapping to virtual address space:
 - adds an option to use the phys argument value of 0 to tell the
   driver to autonomously assign physical pages upon map request
 - makes the tlb driver use memblock to track mapped physical pages

Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 15:11:07 -04:00