Do not use lazy value to prioritize ticker with ticks slot
window that yield to other tickers. Primary channel PDUs
use ticks slow window to nudge themself after an
overlapping ticker within the ticks slot window, but such
ticker may be skipped to next interval. At the next
interval if they again overlap with other tickers then
lazy value shall not be used to prioritize but rather
continue to yield again. This is required to avoid BIG
events from being skipped.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The timestamp is not part of the SDU, and should
thus not be used to get the maximum SDU size.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Use shield-specific sdhc devicetree nodelabels in order not to clash with
sdhc nodelabels from the board devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Adds the dma transfer for the octoSPI on NOR octo Flash
of the stm32h7b3i and stm32h735g disco kits.
The channel for the MDMA is 0-15.
The MDMA request is 0x16 for the OCTOSPI1 fifo threshold
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds the dma transfer for the octoSPI on NOR octo Flash
of the stm32l562e_dk disco kit.
The channel for the DMAMUX is 0-15 (0-7 for DMA1, 8-15 for DMA2)
The DMAMUX request is 41 for the OCTOSPI.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introducing the dma transfer (also through dmamux)
to transfer data to/from the NOR octo-flash
With a DMAMUX, the DMA channel is given by the DTS.
Note that STM32U5X does not support DMA here.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the DMA in the DTS binding for OCTOSPI interface
for the stm32 devices from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Use XOSHIRO random number generator if target has entropy generator.
Some entropy generators may have limitations (e.g. only thread context)
which would conflict with ztress usage.
Added Kconfig.defconfig for testsuite.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added a workaround to call random generator once during the
initialization. It is done to handle XOSHIRO generator limitation
which performs initialization in the first sys_rand32_get call.
And for some entropy generators it cannot be done from an interrupt
context and it happens if k_timer context is used which expires first.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The commit c3620c8a8e changed the
`list_boards` script such that it no longer searches the boards from
the `ZEPHYR_BASE` path by default.
This commit updates the `test_plan` script to invoke the `list_boards`
script with the `ZEPHYR_BASE` as a search path.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit is fixing placing the vectors section through
zephyr_linker_sources(ROM_START ...) (as done in the ARM
architecture port) so its order can be adjusted by SORT_KEY.
Fixes#49903
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
ARC processors are highly configurable, so ARC toolchain supports
big amount of mcpu options for all that HW configurations.
As difference in many configurations among the same processor
family usually doesn't affect Zephyr code we don't want
to create Kconfig option for each possible CPU configuration
(just to map Kconfig option to correspondent mcpu value
in 'cmake/gcc-m-cpu.cmake').
Instead we prefer being able to set proper mcpu value
individually for any ARC SoC and using 'cmake/gcc-m-cpu.cmake'
just for reasonable defaults.
To apply SoC-related changes for build-options on early stages of building
'tune_build_ops.cmake' should be created in appropriate SoC directory.
Example:
./soc/arc/snps_qemu/tune_build_ops.cmake
File content:
set(GCC_ARC_TUNED_CPU hs4xd)
Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
Fix BIG Create implementation from silently failing on
values of RTN and SDU_interval that lead to BIG events that
cannot be acheived when using sequential or interleaved
subevents by the Controller Implementation.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
After add zephyr,flash-controller property, most gd32 boards support
flash_shell sample.
gd32vf103c_starter and gd32vf103v_eval only have 32KB SRAM, so we
should reduce CONFIG_HEAP_MEM_POOL_SIZE to 8KB.
gd32f350r_eval only have 16KB driver, exclude from flash_shell sample.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
This supports three types GD32 FMC flash memory. GD32 FMC v1,
GD32 FMC v2 and GD32 FMC v3.
GD32 FMC v1 for small flash memory, flash size can be up to 512KB.
GD32 FMC v2 for large flash memory, flash size can be up to 3072KB.
GD32 FMC v3 not use page but sector as minimum block, flash size can
be up to 3072KB.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
There are three types GD32 FMC.
GD32 FMC v1: its flash memory has 1 bank, page size is equal in the
bank, flash size is smaller than 512KB.
GD32 FMC v2: its flash memory has 2 banks. Page size equal within the
same bank but different between banks. Flash size can be up to 3072KB.
FMC v2 has two registers to control bank0 and bank1 separately.
GD32 FMC v3: its flash memory has 2 banks, use sector size as the
minimum operating unit, the sector size is not equal.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
Add a Kconfig for Advertising Data Chaining in Extended and
Periodic Advertising, permitting AD data lengths of upto
1650 bytes. The implementation is experimental and needs
further testing.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix BT_CTLR_ADV_DATA_LEN_MAX and other Kconfig dependencies,
and clean up the use of PDU_AC_LL_SIZE_MAX which is used to
allocate scratch packet to be atleast able to accommodate
the minimum 31 bytes AD data such that it is sufficient to
transmit and/or receive scan response PDUs when either
broadcaster or observer alone is supported.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The Xtensa arch has historically had state/user register accessor
macros with bare three-byte symbol names. I think this might have
been in the original Cadence-contributed arch integration, but I'm not
sure. In any case they also exist in the same names in vendor
HAL/toolchain code and are causing collisions. We never should have
had these symbols exposed in our header.
Put them under an XTENSA_ prefix to decollide.
Signed-off-by: Andy Ross <andyross@google.com>
Additional testing showed that when using printk the logger would start
sticking and spitting out nulls which is wrong. This made it appear as if
the firmware had locked up. The issue seems to have been caused by the
initial ipc message to read all the dma buffers on the host.
Removing that, the issue seems to have been solved.
This also improves the test case to ensure printk with LOG_PRINTK=y
works as expected. It also adds a last log message between some
timeouts of the flush timer length to ensure the padding and timer
flush are working properly.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The enet1g peripheral was missing in device tree for nxp rt11xx.
With this commit, the peripheral can be operated like the enet peripheral
with the eth_mcux (kinetis-ethernet) driver at 10/100 Mbit (no gigabit).
Signed-off-by: Nils Larsen <nils.larsen@posteo.de>
According to i.MX RT1060 Reference Manual:
While the OR flag is set, no additional data is stored in the data
buffer even if sufficient room exists. To clear OR, write logic 1 to
the OR flag.
Clear OR (Overrun) flag whenever it is set, so that data continues to be
received after potential data overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
The FRDM-K64F board has a SD/MMC slot. This patch modifies the DTS
files so that this feature works out of the box. This includes
configuring the SPI peripheral connected to the slot on the board.
This change follows the SD/MMC support for other boards, e.g.
Olimexino-STM32. It was tested on a FRDM-K64F board with the
fat_fs sample.
Signed-off-by: Marek Materzok <tilk@tilk.eu>
According to RM, there are 2 pins that need a 3 bit mask for daisy chain,
changed it accordingly.
(E.g. IOMUXC_UART4_IPP_UART_RXD_MUX_SELECT_INPUT for imx6sx)
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
Fix NXP MPU configuration for k6x flash region. The previous flash MPU
setting was based around the assumption that the user was executing from
the flash region at 0x0000_0000–0x07FF_FFFF, which may not be case if the
user selects to execute from SRAM, such as running from sram_l
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use dts overlay to declare the pwm-led only when needed.
This is only used for demo purpose of PWM0 on RCAR gen3
boards (H3ULCB only at the moment).
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
Declare pw0 channel0 that can be used on H3ULCB (test pin CP8).
Add support status to H3ULCB board documentation.
PWM0 is disabled by default as its usage could consume uneeded
power.
Only enable it into the test API with overlay.
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
R-Car Gen3 platforms have up to 7 channels. Add the node to
the rcar_gen3_cr7 SoC series. In contrary to Linux, declare
only one PWM controller with 7 channels. So only one node is
written into dtsi file.
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
