Factorize setting of frequency for busses.
Additionally, factorize SysCoreClock update.
The operations are now done twice in case of PLL since they are part
of LL utils PLL configuration function, but they are removed in next
commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Take advantage of previous work to configure PLL and remove
usage of LL_PLL1_ConfigSystemClock_FOO utils functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that fixed clocks are enabled in a single function, a
bunch of functions could now be removed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move fixed clocks initialization to a single function.
Benefit is they could now be enabled independently of the
main clock configuration based on dts status and then be
used by peripherals even is not part of the main clock tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Flash latency setting could be factorized in a single location,
rather than split in each clock setting function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move prescaler settings to the clock_control_init function.
At this step they will be set up twice in PLL case, this will
be fixed in a next step.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Set bus binding values using registers offset values.
As a consequence update driver to take this into account
in clock_on and clock_off functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Workaround for errata 192 is unnecessary as it is applied within
nrfx_clock_calibration_start().
Fixes#43930
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
Fix register bit field when clock source is MSI
on the stm32L0x or stm32L1x mcus
Use RCC_CR_MSIRGSEL bit field instead of not soc stm32wbx serie
That bit of the RCC CR is common to several stm32 mcus
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The temperature sensor used in the clock_control driver requires
multithreading, but this is not compatible with mcuboot builds with
multithreading disabled.
Fixes#41597.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:
sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Shims for nrfx drivers should only connect the related IRQ handlers,
they should not enable the IRQs, as this could lead to a situation
where the interrupt handler is called before the driver had a chance
to properly initialize the peripheral and install the provided event
handler. nrfx drivers will enable the interrupts appropriately on
their own by calling the NRFX_IRQ_ENABLE macro which is implemented
in nrfx_glue.h as a call to irq_enable().
This commit fixes the above issue spotted in the following shims:
- dmic_nrfx_pdm
- clock_control_nrf
- i2s_nrfx
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Instead of reading registers query the info on sysclock configuration
from existing configuration symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rework clock start up functions in order to allow configuration
and enabling of individual clocks.
This way, each clock defined with a "okay" status will be enabled
even if not part of the sysclock clock tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add STM32_FOO_ENABLED and STM32_FOO_FREQ to STM32 fixed clocks:
HSI, HSE, MSI(S), CSI, LSI, LSE..
Replace STM32_LSE_CLOCK by STM32_LSE_FREQ and when possible
replace by new STM32_LSE_ENABLED when making sense.
Fix STM32_PLL3_FOO_ENABLE to STM32_PLL3_FOO_ENABLED
Additionally, add STM32_PLL_FOO_ENABLED definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
PLL3 setting should also be protected CFG_HW_RCC_SEMID.
Move semaphore unlock after we're done with PLL3.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32H7B3 supports max SYSCLK and AHB clock frequencies of 280 MHz,
and max APB frequency of 140 MHz
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
An optional reference to the temperature sensor can be obtained at
compile time, update implementation.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit sets the power down bit of the module SDP, UART3, UART4,
and I3C by default. The module's driver should take the responsibility
to clear it to turn on the power. It helps reduce the power consumption
when an application doesn't use these modules.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This corrects the following:
1. The priority of type cast is lower than member access. So don't need
the redundant parentheses.
2. The macro should be added to the parentheses.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Build shows warning due to incompatible
CPU vendor name. This fixes it and applies
necessary changes in files.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
1. Update to add support for Flexcomm8-13.
2. Fix the clock control driver, the enclosing #define
was incorrect.
3. Identify HS_SPI port using the appropriate Register
define
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Recent changes in this function made the code now compatible
with the use of LL API to perform this configuration.
Use it to simplify the driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
