Added start, stop and update to the shell.
Refactored the event_cb of the rd_client_info struct into the ctx,
as it was needed in the shell script.
Signed-off-by: Ola Tangen Kulseng <ola.kulseng@nordicsemi.no>
Stop relying on <soc.h> to access HAL APIs. Use generic, per-API headers
instead. Note that <soc.h> has been left as is for now, since ARM MPU
relies on a fragile chain of includes/type definitions.
This change should improve compilation efficiency, as we no longer pull
APIs that are not needed. A similar approach is followed by STM32
drivers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Return the hardware hartid value directly.
Redefine arch_curr_cpu() in terms of arch_proc_id() to remove
the hartid reading duplication. The code assumed a linear hartid
space already so add a comment to that effect.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Update edac shell comments reflecting devmem move from edac to a
special shell module.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
When CONFIG_GEN_IRQ_VECTOR_TABLE and CONFIG_GEN_SW_ISR_TABLE are enabled
the generate IRQ table is trying to reference the _isr_wrapper function.
Add an extern to that to avoid a failure when compiling and remove the
previous arch-specific declarations.
arch/common/isr_tables.c:48:38: error: '_isr_wrapper' undeclared here
(not in a function)
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Update the readme for mpu_test sample to contain
correct sample outputs for mpu read, write and run operations.
Signed-off-by: Aastha Grover <aastha.grover@intel.com>
For some reasons RISCV is the only arch where the vector table entry is
called __irq_wrapper instead of _isr_wrapper. This is not only a
cosmetic change but Zephyr expects the common ISR handler to be called
_isr_wrapper (for example when generating the IRQ vector table).
Change it.
find ./ -type f -exec sed -i 's/__irq_wrapper/_isr_wrapper/g' {} \;
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
If system memcpy() is used, assert.h must be included. Fixes
a build warning on undeclared use of memcpy.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Add the definition of address which is used by ROM to jump to FW.
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The img_mgmt_impl_erase_if_needed was only called when
CONFIG_IMG_ERASE_PROGRESSIVELY is y, and it does nothing anyway;
because the function always returns 0, and does nothing,
neither the function no result processing, from a call to the
function, is needed.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit documents OS reset command extension that allows to
force reset, when OS responds with busy "rc" code to reset
attempts.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The function is no longer needed with fix provided by commit
aa5d20aaef (storage/flash_map: Return -ENODEV from flash_area_open).
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Image management state, struct img_mgmt_state, has been defining
sector_id and sector_end variables, supposed to be used by
progressive erase feature, that have no use in code.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The img_mgmt_upload has been overriding return codes of several
utility function calls with MGMT_ERR_EUNKNOWN, even though
these utility functions would be returning MGMT_ERR_* type codes
already, overshadowing real reason of failure.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit changes types of image, size and offset elements of
img_mgmt_upload_req structure from unsigned long long to size_t.
This commit also fixes comments and conditional statements, where
these identifiers have been compared against -1, although they have
been clearly defined as unsigned.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit adds unit tests for zcbor_bulk utility function,
which has been provided to internally support zcbor in decoding
maps with command parameters.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
uuid wasn't initialized in the publication setting command.
It caused wrong the configuration clietn behavior.
Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
This patch removes a superfluous write to the INTMAP1 register
that happens because the byte count was previously wrong.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
This commit adds a check for the validity of the "sub_system" param in
clock_control_on.
While for clock_control_off there was a check if the clock_subsytem
parameter is in range of STM32_PERIPH_BUS_MIN and STM32_PERIPH_BUS_MAX
this check was missing for clock_control_on.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
All STM32G0 SoCs have two sets of APB registers(APB1 and APB2).
Therefore set STM32_PERIPH_BUS_MAX to 0x40 (STM32_CLOCK_BUS_APB2)
for this series.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add a new interfaces for getting processor ID. On some of the
architectures, implement by means of arch_curr_cpu().
On xtensa, we get this via the PRID register.
Doxygen string by Andy Ross.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enable testcases under tests/drivers/gpio/gpio_basic_api
To run in twister, "-X gpio_loopback" parameter is needed.
Signed-off-by: Yinfang Wang <yinfang.wang@intel.com>
Recent code change asserts on ECRED psm being consistent in
l2cap_ecred_conn_req. However, the values are compared between
endianness converted value and non-converted value, which fails on BE
archs.
Signed-off-by: Morten Priess <mtpr@oticon.com>
Entering deep sleep mode stops the source clock of the ADC module and
could corrupt the ongoing ADC conversion. This commit lets ADC driver
acquire the PM lock during the ADC operation (either single conversion
or repetitive scan) and release it when the ADC conversion stops.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This function retrieves TX sync information
(timestamp, offset, and sequence number)
from controller using HCI command HCI_LE_Read_ISO_TX_Sync.
Signed-off-by: Audun Korneliussen <audun.korneliussen@nordicsemi.no>
the return is missing at the end of function which causes compilation
warning and block the build on github.
"warning: control reaches end of non-void function [-Wreturn-type]
92 | }| ^"
Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
Move to use DEVICE_DT_GET_ONE instead of device_get_binding as
we work on phasing out use of DTS 'label' property.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Move to use DEVICE_DT_GET_ONE instead of device_get_binding as
we work on phasing out use of DTS 'label' property.
Signed-off-by: Kumar Gala <galak@kernel.org>
wait_write_queue() get passed a device and an offset to compute the
sector number and verify it is valid. However both operations are
already done by the caller, so let's pass directly the
flash_stm32_sector_t value instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The STM32H7 flash driver read-back a register after writing it to ensure
it is flushed. This is very fragile and might break if a new compiler
version slightly reorder the instructions. Instead use a __DSB()
barrier like done on other STM32 SoC, which ensures that the registers
and the data writes are flushed at the compiler level, but also at the
Cortex-M7 level.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
As the erase time for a sector differs by a few order of magnitude for the
various SoCs of the STM32H7 family, use the just added max-erase-time
property from the device tree instead of the hard-coded 4 seconds value.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The erase time for a sector differs by a few order of magnitude for the
various SoCs of the STM32H7 family. Declare it in the device tree using
the existing max-erase-time property. For that it is necessary to add
"st,stm32-nv-flash" to the compatible node.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Some flash properties are currently in the individual SoC definitions,
while they are common to the whole STM32H743/753 SoC line. Move them one
level higher.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
h753
