Commit graph

102264 commits

Author SHA1 Message Date
Marek Matej
3784beb6cc soc: esp32s2: ESP WiFi heap
Provide symbols for the creation of dynamic memory pool.
Fix the loader ROM buffers start address.
Fix static allocation size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2024-09-21 11:29:53 +02:00
Marek Matej
94731488e7 soc: esp32: ESP WiFi heap
Provide symbols for the creation of dynamic memory pool.
Fix static allocation size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2024-09-21 11:29:53 +02:00
Marek Matej
15d0189d3e soc: espressif: Introduce runtime heap mempool
Add the `CONFIG_ESP_RUNTIME_HEAP` kconfig.
This allows the memory pool to be created starting
at `z_mapped_end` ending at `_heap_sentry`.

Added choice symbol ESP_WIFI_HEAP_* to select which
heap to use in the ESP WiFi adapter module.

Add file heap.c with code to initialize the runtime heap.
Size of the pool is checked during the runtime.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2024-09-21 11:29:53 +02:00
Marek Matej
e05d3ba661 manifest: update hal_espressif
Get latest necessary changes to support the following changes.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2024-09-21 11:29:53 +02:00
Daniel Leung
2c551554e2 riscv: support dumping privilege stack during coredump
Adds some bits to enable dumping privilege stack during
coredump.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-09-21 11:29:39 +02:00
Daniel Leung
4c5e33b2c2 soc: cdns/dc233c: advertise coredump with privilege stack
This lets the SoC to select the correct kconfigs to show that
it supports coredump, and with the ability to dump privilege
stack.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-09-21 11:29:39 +02:00
Daniel Leung
efb2a354a0 xtensa: coredump: support dumping privilege stack
Adds the bits to support dumping privilege stack during
coredump.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-09-21 11:29:39 +02:00
Daniel Leung
a3f4251ed5 x86: coredump: support dumping privilege stack
Adds the bits to support dumping privilege stack during
coredump.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-09-21 11:29:39 +02:00
Daniel Leung
71bea33894 tests: debug/coredump: crash from user thread if userspace
Modify the test to spawn a user thread if it is running
with userspace enabled. This allows testing coredump when
the crashing thread is a user thread.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-09-21 11:29:39 +02:00
Daniel Leung
4f52860fe0 debug: coredump: dump privileged stack
This adds the bits to call into architecture code to dump
the privileged stack for user threads.

The weak implementation is simply there as a stub until
all architectures have implemented the associated function.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-09-21 11:29:39 +02:00
Daniel Leung
f5163d8940 arch: add interface to dump privileged stack in coredump
This adds a interface to allow coredump to dump privileged
stack which is defined in architecture specific way.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-09-21 11:29:39 +02:00
Emil Gydesen
e1e4f2a2af Bluetooth: Host: Set scan option type to uint8_t
Changed the scan option type from uint32_t to
uint8_t.

There are 2 reasons for this:
1) This reduces the size of the struct bt_le_scan_param.
   Since we are now storing two copies of scan parameters
   statically in the host, this is not insignficant.
2) This fixes a "hole" in the struct. There are no longer
   3 empty octets between the `type` and the `options`, which
   caused valgrind warnings when using `memcpy` and `memcmp`
   of the struct.

Currently we only need 8 bits for the options available.
If additional options are added later, the field need
to be increased. For the above reasons some additional
refactoring my be required to avoid significant size
increases and the valgrind issue.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2024-09-21 11:29:21 +02:00
Anas Nashif
f08c91a7e4 soc: stm32g4x/stm32l0x: fix soc hook calls
Missed 2 places related to power management.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-21 11:29:06 +02:00
Anas Nashif
3eded9d10d soc: intel_ish: remove duplicate hook
Remove duplicate hook and fold power code into the same early soc hook.

Fixes #78776

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-21 11:29:06 +02:00
David Brown
c3438903d2 github: workflows: Add cargo support to twister
Add cargo's bin to the path, and print out the versioning of the tool to
make it easy to ensure the right version has been installed.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-20 15:25:05 -05:00
Emilio Benavente
63308c5f13 tests: drivers: dma: Enabled DMA Tests for MIMXRT1010_EVK
The Buffer data was being stored in cacheable memory for
the MIMXRT1010_EVK, the caching is not handle in these
test and cause mimxrt1010 to fail, this commit moves the
memory region to DTCM and in some cases lowers the size
of the DATA Buffer since it won't fit in DTCM for MIMXRT1010_EVK

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-09-20 15:23:58 -05:00
Chekhov Ma
c93a5de3ae drivers: mcux_igpio: improve pin-gaps handling
Improve handling of "pin-gaps" using "GPIO_DT_RESERVED_RANGES_NGPIOS"
series macro.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2024-09-20 15:18:49 -05:00
Chekhov Ma
a296705d37 drivers: mcux_rgpio: improve pin-gaps handling
Improve handling of "pin-gaps" using "GPIO_DT_RESERVED_RANGES_NGPIOS"
series macro.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2024-09-20 15:18:49 -05:00
Felipe Neves
2aa7cb5a7c samples: drivers: video: add arduino nicla vision
As supported board to the video capture sample.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2024-09-20 15:18:13 -05:00
Felipe Neves
591b7d380b drivers: video: gc2145: add resolution support
Add VGA and QVGA resolution support to enable
usage of gc2145 sensor by smaller ram capable devices.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2024-09-20 15:18:13 -05:00
Felipe Neves
cdca844d3a boards: arduino_nicla_vision: add camera subsystem
initial support on device tree

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2024-09-20 15:18:13 -05:00
Krzysztof Chruściński
af391b8b3f logging: frontend: stmesp_demux: Improve robustness
Demultiplexer was not ready to handle case when log message was
incomplete which was followed by other log messages. Such scenario
could occur if there was a fault that happen during logging of
a message. In that case incomplete message was followed by valid
messages (fault report) and this fault report was not handled
because processing was blocked waiting for completion of a
message which preceeded fault report.

Since it is expected that some messages may be incomplete a
garbage collection mechanism is added. When start of a message is
received timestamp is logged and list of incomplete messages
is checked for 'old' messages which persist in incomplete state
for long. When message timeouts it is closed and marked as
invalid. It unblocks processing of following messages.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-09-20 15:16:46 -05:00
Krzysztof Chruściński
da8ba3efa4 logging: frontend_stmesp: Avoid unaligned word access
write_data function which was writing to STMESP data registers was
starting by writing words and tail was written using byte access.
However, RISCV core does not support unaligned access and on Cortex-M33
even if supported it is faster to do aligned access. Reworked
write_data to start first by writing data using byte or half word
access until data pointer is word aligned, then word access is used
and finally tail is written using byte or half word access.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-09-20 15:16:16 -05:00
Krzysztof Chruściński
d7a62bdeb6 logging: frontends: stmesp: Run clang-format
Apply clang-format formatting.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-09-20 15:16:16 -05:00
Tom Chang
0b04b772cb boards: npcx_evb: update espi vw index for DnX
This CL updates the virtual wire index to support DnX_WARN signal for
npcx4m8f_evb.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2024-09-20 15:14:57 -05:00
Tom Chang
9795dc2758 drivers: espi: npcx: add support to customize vw index
This CL adds support to revise vw index accroding to the
vw-index-extend-set.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2024-09-20 15:14:57 -05:00
Tom Chang
20b1b6ac83 dts: espi: npcx: add property for customize vw index
This CL adds the vw-index-extend-set for customize vw index.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2024-09-20 15:14:57 -05:00
Tom Chang
0e4ac766fb drivers: espi: npcx: add support for DnX VW
This CL adds support to handle DnX virtual wire signal.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2024-09-20 15:14:57 -05:00
Tom Chang
450bd68c1a dts: espi: npcx: add definition for DnX VW
This CL adds DnX_ACK and DnX_WARN definitions to the virtual wire table.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2024-09-20 15:14:57 -05:00
Tom Chang
0ded5623f2 soc: npcx: update register definition for espi vw
This CL adds the field for the index of virtual wire and the enable bit.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2024-09-20 15:14:57 -05:00
Declan Snyder
4405420b33 soc: mcxw71: Enable FMU flash controller
Enable flash controller driver for main FMU on MCXW71

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-09-20 15:14:11 -05:00
Declan Snyder
448485a967 drivers: soc_mcux_flash: Add flash_k4 support
Add support for flash_k4 api from the mcux SDK.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-09-20 15:14:11 -05:00
Declan Snyder
846601f260 boards: nxp: Add FRDM-MCXW71
Add FRDM-MCXW71 initial board.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-09-20 15:14:11 -05:00
Declan Snyder
cbee39ef71 soc: nxp: Add MCXW71
Add MCXW71 SOC, which inherits some qualitiies
of kinetis heritage platforms.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-09-20 15:14:11 -05:00
Declan Snyder
95e22089cb dts: nxp: Add MCXW71 DTS
Add SOC DTS for MCXW71.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-09-20 15:14:11 -05:00
Declan Snyder
2db9ea94de drivers: kinetis-pinctrl: Account for SCG K4
Add support for SCG K4 clock control in kinetis pinctrl.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-09-20 15:14:11 -05:00
Declan Snyder
a8b1ac26d8 drivers: clock_control: Add MCUX SCG K4 driver
Add driver for newer SCG clock control peripheral.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-09-20 15:14:11 -05:00
Reto Schneider
eb98483769 boards: ct: ctcc: Fix unit and first address mismatch
This fixes the following warning:

> unit address and first address in 'reg' (0x88000) don't match for
> /soc/flash-controller@4001e000/flash@0/partitions/partition@87000

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
2024-09-20 11:58:40 -05:00
Reto Schneider
caec80e571 boards: arduino: nano_33_iot: Fix unit and first address mismatch
This fixes the following warning:

> unit address and first address in 'reg' (0x6a) don't match for
> /soc/sercom@42001800/atecc608a@15

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
2024-09-20 11:57:44 -05:00
Reto Schneider
63a7d74120 boards: seagate: legend: Fix unit and first address mismatch
This fixes the following warning:

> unit address and first address in 'reg' (0x1000) don't match for
> /soc/spi@40003800/spi_nor@0/partitions/partition@10000

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
2024-09-20 11:57:04 -05:00
Stefan Gloor
2571ae8b19 drivers: mipi_dbi: add support for parallel 8080/6800 modes using GPIO
Introduce GPIO-based driver for MIPI DBI class that allows MIPI DBI
type A and B displays to be used on general platforms.

Since each data pin GPIO can be selected individually, the bus pins are
set in a loop, which has a significant negative impact on performance.
When using 8-bit mode and all the data GPIO pins are on the same port,
a look-up table is generated to set the whole port at once as a
performance optimization. This creates a ROM overhead of about 1 kiB.

Tested 8-bit 8080 mode with ILI9486 display on nRF52840-DK board.

Signed-off-by: Stefan Gloor <code@stefan-gloor.ch>
2024-09-20 11:56:22 -05:00
Stefan Gloor
1d8c3c013b doc: update MIPI DBI API compatibility
The MIPI DBI API supports MIPI DBI controllers type A, B, and C
(except with 16 write clocks). Update the documentation accordingly.

Signed-off-by: Stefan Gloor <code@stefan-gloor.ch>
2024-09-20 11:56:22 -05:00
Stefan Gloor
ac8816068d drivers: display: ili9xxx: read mipi-mode, only use SPI mode as fallback
Instead of always using the SPI MIPI DBI mode (type C), look up the
mipi-mode from the device tree and only set the mode to
MIPI_DBI_MODE_SPI_4WIRE as a fallback in case the property is not given.

Signed-off-by: Stefan Gloor <code@stefan-gloor.ch>
2024-09-20 11:56:22 -05:00
TOKITA Hiroshi
8915bad1ab tests: drivers: build_all: sensor: Adding Grove NTC Temperature Sensor
Add "seeed,grove-temperature" to testing targets.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-09-20 11:53:43 -05:00
TOKITA Hiroshi
082ce03389 tests: drivers: build_all: sensor: Adding Grove Photo-Resistor Light Sensor
Add "seeed,grove-light" to testing targets.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-09-20 11:53:43 -05:00
Brandon Allen
3176ec55bb soc: esp32s3: bump esp32s3 bootloader iram and dram sizes.
Currently the RAM allocated for the bootloader is not
enough to use MCUBoot with crypto signatures.
This commit bumps the #defines accordingly to fix
compile errors with ecdsa_p256 and RSA.

Signed-off-by: Brandon Allen <brandon.allen@exacttechnology.com>
2024-09-20 11:53:11 -05:00
Declan Snyder
f8a4a2ff5c doc: dts: Link Linux binding guidelines.
The Linux binding DO's and DONT's about designing DT bindings
pretty much all apply to Zephyr as well, and a lot of these issues
come up in reviews in Zephyr, which is the reason that Linux has
this page in the first place, to list common binding review topics.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-09-20 11:52:34 -05:00
Anas Nashif
b73c5578e3 soc: ti: move init code from SYS_INIT to hooks
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-20 13:15:31 +02:00
Anas Nashif
6624ebd156 soc: telink: move init code from SYS_INIT to hooks
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-20 13:15:31 +02:00
Anas Nashif
c6a03606c2 soc: st: move init code from SYS_INIT to hooks
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-20 13:15:31 +02:00