Commit graph

1 commit

Author SHA1 Message Date
Daniel Leung
6d49e7c692 timer: add CAVS DSP wall clock timer for Intel SoC
The DSP wall clock timer on some Intel SoC is a timer driven
directly by external oscillator and is external to the CPU
core(s). It is not as fast as the internal core clock, but
provides a common and synchronized counter for all CPU cores
(which is useful for SMP).

This uses the RISCV timer as base as it is using 64-bit
counter.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00