Add Kconfig option for enabling high speed USB support for the native posix
USB controller driver.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
When validating the parameters for broadcast reception start some
return statements were missing, they have been added, as well as
proper initialisation of a variable
Signed-off-by: Andries Kruithof <andries.kruithof@nordicsemi.no>
During HWMv2 migration, non-ported SoCs were placed in a 'soc_legacy'
folder and sourced from there instead of 'soc' folder.
Remove the no-longer needed soc_legacy folder.
CMake oot SoCs in old hardware model are sourced from
'<soc-root>/soc/<arch>/<soc-path>' which has always been the case, also
before HWMv2.
Remove the 'osource "soc/soc_legacy/...' generation in Kconfig, because
the source is relative to Zephyr base.
All SoCs in Zephyr repository has been ported to the new hardware model
and therefore there is no need for this line.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
If we are merging subgroup and BIS codec configuration data
for a codec other than LC3, then we just append them, but
did not properly update the length.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
A naive implementation would look like
```c
void bt_init()
{
bt_le_conn_cb_register();
bt_enable();
}
```
When the app later adds the possibility to enable and disable
Bluetooth, it may happen that the application developer calls
`bt_init()` instead of `bt_enable()`. This results in invalid
behavior. This kind of bug is currently a bit harder to debug
as the callback register APIs do not reject registering a
callback twice.
Improving the API documentation is the first step towards making
this a bit more user friendly.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
get the address of a memory mapped
jedec,spi-nor flash by name and as a fallback
use the second register.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Add tests for
DT_REG_HAS_NAME,
DT_REG_ADDR_BY_NAME_OR,
DT_REG_SIZE_BY_NAME_OR,
DT_INST_REG_HAS_NAME,
DT_INST_REG_SIZE_BY_NAME_OR and
DT_INST_REG_ADDR_BY_NAME_OR.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
In the 32-bit bitfield pinctrl, the bits from b31 to b24 are representing
the PIN function. The correct mask value then must be 0xFFu.
Signed-off-by: Adrien MARTIN <adrienmar@kickmaker.net>
Add a prompt to ROMSTART_RELOCATION_ROM configs to allow
projects config file selection.
This simplifies the usage in samples/app for board porting.
Signed-off-by: Jérémy LOCHE - MAKEEN Energy <jlh@makeenenergy.com>
This commit enables ISH boards to use APIC timer with TSC time source as
their system timer by replacing CONFIG_HPET with CONFIG_APIC_TIMER_TSC.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
The ram-console snippet disabled UART console and enabled the
RAM console with the option link the RAM console buffer to a
dedicate section in a new added memory-region.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Currently, the ram_console buffer is defined as a global var, its
address is determined during the building and may be changed when
code update. This is not a problem if the ram_console is just used
in debug purpose.
While in the heterogeneous SoCs, there can be multiple MPU Cores
and several MCU cores, it can run multiple OS/bare-metal instances
on these cores, but the UART ports may be not enough, so the
ram_console can be leveraged. To make it easy to use, it's better
make the console buffer fixed and predefined.
This patch adds a option to link the console buffer to a given
section, through the "zephyr,memory-region" device tree node, then
the address can be known from the device tree node and easy to
check from other cores running Linux/U-Boot.
To use this option, the chosen property 'zephyr,ram-console' must
be added, the following is a example:
chosen {
zephyr,ram-console = &ram_console;
};
ram_console: memory@93d00000 {
compatible = "zephyr,memory-region";
reg = <0x93d00000 DT_SIZE_K(4)>;
zephyr,memory-region = "RAM_CONSOLE";
};
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
In arm64 linker script, create a memory region and section for each
device tree node with compatible string "zephyr,memory-region".
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The 3-byte value suits the assigned number much better,
and also allows for less memory copies when getting and
setting the values.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Remove the "stream" part of the value and functions to
better fit with the name in the assigned numbers document.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
This PR adds support for new Synopsys nSIM RMX100 platform.
New platform based on RISC-V ISA instead of classic ARC.
Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
Change source tree organization for Synopsys nSIM platform.
Classical ARC architectures arc_v2 arc_v3 moved to arc_classic
SoC and boards family.
nSIM SoCs were separated regarding series: EM, HS, SEM, VPX2.
This PR sould be seeing as the preparation for
addition new nSIM platform based on the RISC-V architecture.
Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
The stm32 xspi node is another possible multi-spi for connecting
with gpDMA channels for Rx and Tx, same request.
Channels 4 and 5 are preferred for AHB periph to/from ext. Mem.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the commands to read and write to/from the xSPI with gpDMA
On the stm32h5 device, the one request for xspi instance
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Configure the xspi clocks domain by the clock domain
as defined by the DTS
Up to 3 possible clock confg : xspix, xspi_ker, xspi_mgr
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch add device tree node for ism330dhcx
3D accelerometer and 3D gyroscope sensor.
Signed-off-by: Javad Rahimipetroudi <javad.rahimipetroudi@mind.be>
Update Sphinx documentation to explain how Silicon Labs boards
are named in Zephyr, now that all boards are consistently
named.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Rename all Silicon Labs starter kits to always use the official kit name
as board target name. Previous kit names used various naming schemes,
including putting part of the SoC name in the board name. With HWMv2,
SoC names (if needed) should go in the SoC board qualifier.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Rename all Silicon Labs radio boards to always use the official kit name of
the kit containing only the radio board as board target name. Disentangle
boards using Series 1 and Series 2 SoCs that have almost nothing in common
in terms of devicetree content, but still occupied the same directory.
As part of the initial HWMv2 port, all radio boards were merged into a
single target efr32_radio, using the SoC as a board qualifier to target
specific boards. This was unfortunate, as the SoC name is not sufficient
to identify a specific board -- the same SoC may be used on multiple
different boards. This commit reinstates every radio board as an individual
board target.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Rename all Silicon Labs dev kits to always use the official kit name
as board target name. Previous kit names used various naming schemes,
including putting part of the SoC name in the board name. With HWMv2,
SoC names (if needed) should go in the SoC board qualifier.
Use HWMv2 revisions for the two variants of SLTB010A.
Split the xG27 Dev Kit from the EFR32BG22 Thunderboard. This attempt
at deduplication is confusing due to the very different kit names
and use of different ICs (BG22 vs BG27), and was not continued with
the xG24 Dev Kit, meaning that it wasn't consistent.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Introduce three subcategories for Silabs boards: dev_kits, radio_boards
and starter_kits. The dev_kits category contains small form-factor
standalone boards branded as "Dev Kit" or "Thunderboard". The
radio_boards category contains radio boards to be used with a wireless
mainboard, and the starter_kits category contains larger form-factor
standalone boards branded as "Starter Kit".
Structure the Sphinx documentation the same way as the directory tree.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
This commit adds support for configuring SPI frequency per transaction.
The "clock-frequency" devicetree property is used as the default
frequency unless the peripheral being communicated with has a lower
"max-spi-frequency" (passed to the driver as spi_config::frequency).
An error is returned if the requested frequency is higher than the
hardware can support. This limit is half the peripheral clock (PCLK on
Series 2, HFPERCLK on Series 0/1) for SPI in controller mode.
Previously, the driver hard-coded 1 MHz operation. For backwards
compatibility, default to 1 MHz if the "clock-frequency" property is not
set in devicetree.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
This commit adds support for devices such as EFR32xG24 in the SPI
driver, as these devices only have a single USART peripheral.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
View buffers are now also a limited resource. Acquire them before
attempting to pull data. `CONFIG_BT_CONN_FRAG_COUNT` should be tuned on
a per-application basis to avoid this.
A possible optimization, that was present before, is to not create a
frag when the original buffer fits the controller's HCI size.
I prefer deferring this optimization to a future patchset.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
We can get rid of the view pool for SDU segments :)
We have to make the code slightly more complex :'(
The basic idea is always giving the original SDU buffer to `conn.c` for it
to pull ACL fragments from.
In order to do this, we need to add the PDU headers just-in-time.
`bt_l2cap_send_pdu()` does not add them before putting the PDU on the queue
anymore. They are added by `l2cap_data_pull()` right before the data leaves
`l2cap.c` for `conn.c`.
We also have to inform `conn.c` "out of band" of the real L2CAP PDU size so
it doesn't fragment across segment boundaries. This oob is the new `length`
parameter to the `.pull()` method.
This is the added complexity mentioned above.
Since SDU segmentation concerns only LE-L2CAP, ISO and Classic L2CAP don't
need this extra logic.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
We don't need the TX thread anymore.
Generalizing the pull-based architecture (ie. `tx_processor`) to HCI
commands makes it possible to run the whole TX path from the the system
workqueue, or any workqueue really.
There is an edge-case, where we call `bt_hci_cmd_send_sync()` from the
syswq, stalling the system. The proposed mitigation is to attempt to drain
the command queue from within `bt_hci_cmd_send_sync()`.
My spidey sense tingles however, and it would be better to just remove the
capability of calling this fn from the syswq. But doing this requires
refactoring a bunch of synchronous procedures in the stack (e.g. stack
init, connection establishment, address setting etc), dragging in more
work. I will do it, but in a later patch.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
