This commit clears current settings of the PWM perihperal
that are stored inside device structure.
This makes sure that PWM period and prescaler is configured
as expected after driver was suspended.
Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
NPCX WIMU CR_SIN is used to wake up soc from NPCX sleep power state.
The wake-up IRQ enabled when UART init. It causes the wake-up IRQ to
generate many extra interrupt events, which causes the system too busy
to handle other events. This PR moves the UART wake-up IRQ enabling
from UART init to npcx_power_enter_system_sleep() to avoid the
interrupt storm.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Set the defalut value of SYS_CLOCK_HW_CYCLES_PER_SEC Kconfig option
from the Device Tree. The `clock-frequency` property of the DT cpu@0
node is a single source of truth defining the CPU frequency. This is
the value used e.g. by all Atmel drivers.
For Atmel SAM family CPU clock is currently the only supported system
clock source. Ensure that kernel understanding of the hardware clock
frequency is the correct one.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add flash driver for it8xxx2. The driver can implement
flash read, write and erase that will be mapped to the
ram section for executing.
TEST="flash write 0x80000 0x10 0x20 0x30 0x40 ..."
"flash read 0x80000 0x100"
"flash erase 0x80000 0x1000"
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
According to the rule MISRAC-2012 21.4.b the standard header
file <setjmp.h> shall not be used. Suppress it, because it raises
violation in a testcode, not in a runtime code.
Tag suppresses reporting of violation for the current file,
starting from the line where the suppression is located.
Found as a coding guideline violation (MISRA R21.4.b) by static
coding scanning tool.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
Demonstrate use of bt_gatt_find_by_uuid in peripheral sample. This
avoids the magical array index.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Expose a helper function to the application that searches the local
database for the given attribute from its UUID.
Provide arguments to limit the search that matches the service
declaration to make it easy to limit the search to a specific service.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Allow to pass attribute as NULL pointer when using notify or indicate by
UUID. This will use the entire handle value range to search for an
attribute with a matching UUID.
Document optional parameters, and clarify attr and uuid usage in the
variable declaration in the struct for clarification.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Since we now have separate Kconfig symbols for the different
MPS2 AN521 board variants, we need to update the BOARD switch
for the TF-M target on MPS2 AN521.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
A major update to the MPS2 AN521 build instructions, covering
building with TF-M for CPU0 and building for CPU1.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Introduce the fpu tag to tests that explicitly enable
the FPU and FPU_SHARING Kconfig options. The tag could
be used to run all FPU-related tests in the tree.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enable testing Arm architecture and Kernel unit tests on
the mps2_an521_remote platform, with CONFIG_FPU and
CONFIG_FPU_SHARING enabled. This is done by enabling the
arm and fpu tags on the mps2_an521_nonsecure board target.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When we are building applications with openAMP on CPU1, we do not
need to trigger a build an empty binary for CPU0, as this will be
take care of by the dual core sample anyways.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add a project to build an empty binary for AN521 CPU0,
which will only serve to wake up CPU1, and let samples,
and tests to execute as standalone applications in CPU1.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We add an option to build a CPU0 image, when we are building
applications for AN521 CPU1 core. This image will be an empty
binary that will basically boot the device and wake up CPU1.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Select Kconfig option SOC_MPS2_AN521_CPU0 in board
definitions of MPS2 AN521 targets which build on
CPU0 of the MPS2 AN521. This is the case for the
mps2_an521 and mps2_an521_nonsecure targets.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
MPS2 AN521 is a dual (Cortex-M33) core where the two cores
have different capabilities. E.g CPU0 implements TrustZone-M,
while CPU1 implements the FPU. Therefore we introcude separate
Kconfig symbols for the two SoC variants, and use these to
select the different Cortex-M capabilities. We also update
the definitions of __MPU/FPU/SAU/DSP variant in soc.h to make
them get the value from the Kconfig settings, directly.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
With respect to the mapping between the CPU variant
and the FPU we add an entry for Cortex-M v8-M CPU
variants without DSP. This should cover the case
of a Mainline Cortex-M which implements the Floating
Point extension but not the DSP extension.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The current CMakeLists.txt contains a function that is called from
the same file.
This patch removes the abstraction, allowing to remove many
lines of parameter handling.
Additionally, with this patch, the Cmake argument handling is now
done via a list, which removes many more named variables.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
Adding support for beagleV Starlight board based on Starfive JH7100
SoC. It's a base support, no drivers other than uart has been tested.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
Increase the ticker operations count in ULL high context
when Extended Advertising Connection Establishment on Coded
PHY is supported.
This fixes assertion in Controller when initiating a
connection on Coded PHY, wherein two scan instance ticker,
one window stop ticker, and a new connection instance
ticker operations needs to be enqueued.
Relates to commit a6b8eba7c5 ("Bluetooth: controller:
Implement disabling the other PHY initiator").
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
According to the Zephyr Coding Guideline all switch statements
shall be well-formed.
Add a comment to the empty default case.
Add a LOG_ERR to the default case.
Found as a coding guideline violation (MISRA R16.1) by static
coding scanning tool.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
The atmel pwm driver doesn't have a easy way to test and show
functionality to users. This re-assign led-0 function from
gpio-leds to pwm-leds. The current led-0 entry at gpio-leds
was keep with status disabled, as refence. It allows test pwm
driver for SAM Cortex-M7 MCUs. The led-1 assume Zephyr sample
default led0 alias.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit fixes diag repeat command port by fixing issue with
incorrectly handled repeat timer.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
This commit enables soc-flash support in disco_l475_iot1
only for flash test. Using overlays, it adds soc-flash storage
partition and deletes qspi-flash storage parition for
flash test. Both flash test and spi_flash application
has been tested on disco_l475_iot1 platform.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
This commit changes from upper case to lower case in
"reg = <0x000D8000 DT_SIZE_M(7)"
"reg = <0x00000000 0x000D8000>"
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Add a new Kconfig option, BT_ISO_UNICAST, to make it possible
either configure unicast only, broadcast only or both.
This results in some code being moved, but not modified, and
should not effect anything.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
This commit enables soc-flash support in stm32f746g_disco only for
flash test. Using overlays, it adds soc-flash storage partition and
deletes qspi-flash storage partition for flash test. Both flash test and
spi_flash application has been tested on stm32f746g_disco platform.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Python is used by the west meta-tool as well as by many scripts invoked
by the build system. It is easy to run into package incompatibilities
when installing dependencies at a system or user level. This situation
can happen, for example, if working on multiple Zephyr versions at the
same time. For this reason, the getting started guide has been updated
to offer instructions for both, using Python virtual environments and
installing globally. Python virtual environments has been added as
another choice for the reasons just mentioned.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Function used for filtering "dt_compat_enabled_with_label" was not
working as expected as it was not taking into account that we're
looking for a children/parent combination:
Provided "compat" with enabled status should be the one of the parent
of the node matching given label.
Function is then reworked to take this into account.
And to make it's usage clear:
- function name is changed to be clearer on the intention
- args order is reversed to be more logical wrt the intention
Users of the function are also updated to take the change into
account.
Fixes#36093
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the device tree data for the 4 Ethernet controllers integrated into
the ZynqMP SoC, GEM0 to GEM3.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Add support for the Xilinx GEM Ethernet controller, which is integrated
in both the Xilinx Zynq and ZynqMP (UltraScale) SoC families. The driver
supports the management of a PHY attached to the respective GEM's MDIO
interface.
This driver was developed with ultimately the Zynq-7000 series in mind,
but at the time being, it is limited to use in conjunction with the
ZynqMP RPU (Cortex-R5) cores. The differences are minor when it comes
to the adjustment of the TX clock frequency derived from the current
link speed reported by the PHY, but for use in conjunction with the
Zynq-7000, some larger adjustments will have to be made when it comes
to the placement of the DMA memory area, as this involves the confi-
guration of the MMU in Cortex-A CPUs.
The driver was developed under the qemu_cortex_r5 target. The Marvell
88E1111 PHY simulated by QEMU is supported by the driver.
Limitations currently exist when it comes to timestamping or VLAN
support and other minor things. Those haven't been implemented yet,
although they are supported by the hardware. In order to be fully
supported by the ZynqMP APU, 64-bit DMA address descriptor format
support will be added.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
This CL introduces six properties, clock-frequency, core-prescaler,
apb1/2/3/4-prescaler in pcc (Power and Clock Controller) node to
configure clock settings. It also removed the original Kconfig options
used for the same purpose.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In npcx series, we use ITIM64 as system kernel timer. Its source clock
frequency must equal to CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC. This CL
added check during initialization to prevent ambiguous condition.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Rename OSC_CLK as OFMCLK to meet npcx datasheet. The Oscillator
Frequency Multiplier Clock (OFMCLK), which is derived from
High-Frequency Clock Generator (HFCG), is the source clock of cortex-m4
core and most of NPCX hardware modules.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
There is a small window between when socket is created and
before it is bound to a local address, where the local address
pointer might be NULL.
Fixes#36276
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add a paragraph to mention git bisect as a way to pre-analyze
regressions.
Aim is to reference this section from github issues when regressions
are reported and encourage users to do this first round of
pre-analyzis
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
it need to be a && between two condition, to satisfy
the comment: only 12 / 13 bit resolution is supported,
if FSL_FEATURE_LPADC_HAS_CMDL_MODE is not defined. not
using ||.
Signed-off-by: Crist Xu <crist.xu@nxp.com>
We should gurantee that we do not use SRAM during Zephyr early
boot, until SystemInit has returned. This commit aims to ensure
that SystemInit will be branched to, without first pushing args
to stack, even when no optimizations are selected. We chose to
define z_platform_init in assembly directly (instead of using
inline assembly) as it appears to be a cleaner design.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Use a common implementation for z_platform_init
in nRF SoC family. The implementations are
identical, so no need to maintain separate
identical versions of them. The commit does not
introduce behavioral changes.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Since we are writing a register it makes more sense for the type
to be unsigned. This hopefully address a compile warning we get
with clang:
error: implicit conversion from 'int' to 'int16_t' (aka 'short')
changes value from 32768 to -32768 [-Werror,-Wconstant-conversion]
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
