Commit graph

6 commits

Author SHA1 Message Date
Francois Ramu
1b8d2d3dad soc: arm: stm32 mcus should execute stm32_power_init in PRE_KERNEL_1
Change the stm32_power_init to be executed PRE_KERNEL_1
for all the devices with the low power mode (power.c)
When GPIO and UART are not yet up and running.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-01-18 13:17:39 -05:00
Aurelien Jarno
18c9dfdd8f soc: arm: stm32lx: fix using MSI as wake-up clock source
Following the migration of the clock source configuration in DTS (commit
2691541ad2), HSI is always used as wake-up source on STM32LX. It is
reconfigured as MSI just after, but it slightly increase the wake-up
time and power consumption.

It happens as the file defining STM32_SYSCLK_SRC_MSI is not included.
Fix that.

Fixes #38807

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2021-09-24 14:09:15 -04:00
Flavio Ceolin
d45a0e1919 pm: Fix weak linkage symbols
Define SoC hooks as weak symbols so this way applications can
overwritten them defining strong symbols.

The problem is that currently SoCs are defining these interfaces as
strong symbol inhibiting the possibility of applications bring their
own implementation.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-07-26 04:31:54 -04:00
Gerard Marull-Paretas
f61649b7ba soc: replace power/power.h with pm/pm.h
Replace old header with the new one.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Erwan Gouriou
2691541ad2 drivers/clock_controller: stm32: Prepare for dts based configuration
To allow transition to device tree based clock configuration on
stm32 targets, rework clock_control driver to use intermediate
STM32_ macros initially defined as the equivalent Kconfig macros
for now.
Propagate the change in all code using these macros.

The reason to introduce these new macros instead of configuring
Kconfig flags using dt kconfigfunctions is that we'll need
to be able to inform users that Kconfig flags are deprecated
once the whole family conversion is done, to encourage
out of tree users to adopt this new configuration scheme.

Note: For now STM32H7 series and code is excluded.
This is the same for some series specific code such as
PLL mul/div for L0/L1 and XTRE prescaler on F1 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-27 11:53:37 +02:00
Francois Ramu
d830f2ee3d soc: arm: stm32l5 serie with low power management
The low power modes are available on the stm32l5 soc
with the mcu STOP0/1/2 modes, depending on the CONFIG_PM

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-26 18:06:01 -04:00