Commit graph

3 commits

Author SHA1 Message Date
Aymeric Aillet
f2061a073a soc: arm: reneas: Add r8a779f0 support
r8a779f0 SoC is part of the Renesas R-Car Gen4 SoC series.

This SoC has a dual core lockstep Cortex-R52 CPU.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2023-11-25 08:50:47 -05:00
Aymeric Aillet
6033db5360 drivers: pinctrl: rcar: Add r8a779f0 support
Enable PFC controller for r8a779f0 SoC.
Declare pin list for r8a779f0 SoC.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2023-11-25 08:50:47 -05:00
Aymeric Aillet
1738543c5d drivers: pinctrl: Add R-Car Gen4 support
Renesas R-Car Gen4 is different from Gen3 regarding pinmux.

While Gen3 had only one base address to manage all pins,
Gen4 has one set of pinmux registers per GPIO banks.

We could expose one pinmux register per GPIO controllers,
but that would break potential compatibility with Linux
Device tree.

Instead create a reg_base array to parse all reg base from
device tree and identify proper base address based on the pin
definition.

This imply to add a pfc_base parameter to most of the pfc_rcar
function.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2023-11-25 08:50:47 -05:00