Commit graph

163 commits

Author SHA1 Message Date
Kumar Gala
5b9e0b615c clock_control: remove Kconfig.defconfig setting of clk control drivers
Now that clock control drivers are enabled based on devicetree we
need to remove any cases of them getting enabled by Kconfig.defconfig*
files as this can lead to errors.

Typically the Kconfig.defconfig* will blindly enable a sensor and not
respect the devicetree state of the clock control.  Additionally we
can get problems with prj.conf/defconfig getting incorrectly overridden.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-29 14:12:12 +02:00
Kumar Gala
65e1c6fb1e pwm: remove Kconfig.defconfig setting of PWM drivers
Now that PWM drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the PWM.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-27 18:43:54 +02:00
Kumar Gala
960f2f1a37 spi: remove Kconfig.defconfig setting of SPI drivers
Now that SPI drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the SPI.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-27 09:49:00 +02:00
Kumar Gala
9a501e0922 serial: remove Kconfig.defconfig setting of serial drivers
Now that serial drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the serial.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-26 09:29:24 -05:00
Kumar Gala
600d749cf3 gpio: remove Kconfig.defconfig setting of GPIO drivers
Now that gpio drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the GPIO.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-26 08:49:38 +02:00
Johann Fischer
3c971307dc arch/kernel/soc/samples: use unsigned int for irq_lock()
irq_lock() returns an unsigned integer key.
Generated by spatch using semantic patch
scripts/coccinelle/irq_lock.cocci

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2022-07-14 14:37:13 -05:00
Daniel DeGrasse
fed6d6b754 soc: lpc11u6x: enable pin control
Enable pin control for lpc11u6x soc by selecting CONFIG_PINCTRL=y.
At this time no drivers are ported.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse
dc4d168952 soc: lpc11u6x: add pin control header
add pin control header to enable pin control support for lpc11u6x

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse
ea9df42b25 soc: lpc11u6x: add pin control definitions to LPC11u6x soc file
add pin control definitions to LPC11u6x soc file, to handle the lack of
a HAL for this SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Gerard Marull-Paretas
4b91c2d79f asm: update files with <zephyr/...> include prefix
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas
d342e4c4c1 linker: update files with <zephyr/...> include prefix
Linker files were not migrated with the new <zephyr/...> prefix.  Note
that the conversion has been scripted, refer to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas
0e69129fb3 soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:59 +02:00
Daniel DeGrasse
19cc2f6ec2 drivers: pinctrl: update pin control driver for lpc54xxx
update pin control driver with bindings and header for lpc54xxx

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-02 09:41:42 -05:00
Daniel DeGrasse
c6b05afc92 soc: lpc: make pin control definition LPC55xx specific
pin control definitions present for LPC55xx are not generic to all LPC
IOCON controllers. Make pin control header file LPC55xx specific.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-19 15:53:50 -05:00
Daniel DeGrasse
9226cf338e soc: add lpc pinctrl definition header
Add pinctrl definition header, to parse pinctrl groups in board level
DTS into pinctrl_soc_pin_t values.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Gerard Marull-Paretas
c925b5991a include: remove unnecessary autoconf.h includes
The autoconf.h header is not required because the definitions present in
the file are exposed using the compiler `-imacros` flag.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-05 11:18:20 +02:00
Yegor Yefremov
b4dfdb5afb soc: arm: nxp_lpc: fix typos
Typos were found with codespell utility.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2022-03-10 17:19:49 -05:00
Navin Sankar Velliangiri
90a11851ec soc: arm: nxp: add LPC55S06 support
Add initial support for the NXP LPC55S06.

Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
2022-03-09 09:46:17 -06:00
Gerard Marull-Paretas
95fb0ded6b kconfig: remove Enable from boolean prompts
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:

sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Daniel Leung
aa20e081d2 arm: remove @return doc for void functions
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-01-12 16:02:16 -05:00
Gerard Marull-Paretas
e5e73a70e9 soc: remove unnecessary inclusions of devicetree.h
Many ARM SoCs included <devicetree.h> likely due to:

1. nvic.h not being self-contained
2. As a result of copy-paste

Some RISC-V SoCs had the same problem, in this case likely due to
copy-paste from ARM. The <devicetree.h> header has been removed using
the following command:

sed -i ':a;N;$!ba;s/#include <devicetree\.h>\n//g' soc/**/soc.h

soc.h files that make a legitimate usage of the API have not been
changed.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-01-11 11:52:27 +01:00
Henrik Brix Andersen
25433f1414 soc: arm: nxp: lpc55xxx: add MCAN support
Add support for the NXP LPC MCAN CAN-FD controller.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-01-10 12:00:20 +01:00
Mahesh Mahadevan
1d44e281a6 soc: Include PINT include file conditionally
Include fsl_pint.h header file only when the
CONFIG_GPIO_MCUX_LPC is enabled

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-12-09 09:18:10 -06:00
Mahesh Mahadevan
34ffd5a7d4 boards: lpcxpresso55s69: Add PWM support
Add PWM support

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-11-01 11:14:29 -04:00
Maureen Helm
8302e5e21c soc: arm: Configure serial driver init priority for NXP SoCs
Configures the default serial driver initialization priority for NXP
SoCs to ensure that serial drivers initialize after clock control
drivers.

Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-17 10:58:09 -04:00
Mahesh Mahadevan
381c7c7dfb boards: lpcxpresso55s69: Add I2S support
Add I2S support for LPCXpresso55S69 board

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-09-01 14:39:03 -04:00
Toby Firth
893bfc0fc1 drivers: counter: added ctimer driver for lpcexpresso55s69
Added shim driver for the CTIMERs for the lpcexpresso55s69 board.

Fixes: #22705

Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2021-08-24 17:13:22 -04:00
Mahesh Mahadevan
95ee8f0f64 soc: LPC55S69: Add USB support
1. Update soc.c file to add USB clock setup
2. Add a linker script file to move USB transfer
   buffer and controller buffers to USB RAM
3. Update Kconfig's to add USB support
4. Add zephyr_udc0 nodelabel

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-08-19 17:19:11 -04:00
David Leach
f567e02926 boards: arm: lpc55s28: Remove Trustzone-M flags
The LPC55S28 does not have the Trustzone-M support.

Fixes #36768
Fixes #37266
Fixes #37267

Signed-off-by: David Leach <david.leach@nxp.com>
2021-08-17 10:26:35 +02:00
Ioannis Glaropoulos
d3e1cb2b01 soc: arm: lpc: move platform init implementation in the main tree
Move the implementation of z_platform_init from the NXP Hal
into the main Zephyr tree. This function is Zephyr-specific,
is part of the Zephyr module glue code, and does not need to
reside in the module repository. We also rename the function
to z_arm_platform_init. The commit does not introduce any
behavioral changes.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Maureen Helm
d83bbc2f25 boards: arm: Enable arduino serial port on lpcxpresso55s69
Configures flexcomm2 to operate in USART mode and enables the associated
peripheral clock and pinmuxes. This instance is attached to the Arduino
serial header pins and can be used for Bluetooth serial HCI with a
frdm_kw41z or other BLE controller shield.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-06-12 08:55:31 -05:00
Maureen Helm
5531525f17 soc: arm: Fix condition to set lpc55xxx flash wait states
Commit f5c6afeccb attempted to avoid
accessing lpc55xxx flash registers in nonsecure mode by conditionalizing
part of the SoC clock initialization routine on whether the flash driver
was enabled. This caused secure applications without the flash driver
enabled (e.g., hello_world on lpcxpresso55s69_cpu0) to not boot or show
any console output. Fix this by changing the condition to depend on
whether we are building a nonsecure image.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-06-01 15:41:31 -05:00
Kevin Townsend
f5c6afeccb boards: arm: lpcxpresso55s69: Disable flash access for NS
When using the LPC55S69 with TF-M, the ROM-based flash
controller is restricted to the secure processing environment
to prevent NS access to flash memory. Any access to the
flash controller will cause a secure fault, and the NS
application will halt execution.

This commit disables access to the IAP flash peripheral
when using the lpcxpresso55s69_ns target, enabling TF-M
to restrict IAP access to the secure side.

Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
2021-05-25 09:05:14 -05:00
Andrei Gansari
6d86a6a139 soc: lpc54xxx: add memory controller definitions
Adds device tree and kconfig definitons to use legacy LPC IAP flash
driver.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-23 08:01:00 -05:00
Andrei Gansari
5ed37c61a9 soc: lpc54xxx: align to lpc55xxx multicore defs
Aligns lpc54xxx Kconfigs and other definitions to lpc55xxx.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-10 15:38:54 -05:00
Andrei Gansari
e8a35231a2 soc: lpc55xxx: enable GPIO, disable SERIAL
Enables GPIO on LPC55xxx SoC and explictily mentions SERIAL is off.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-10 15:38:54 -05:00
Andrei Gansari
c85c5290d8 soc: lpc55xxx: enable second core and mailbox
Cnfigures the LPC55xxx SoC with dual-core (first core boots the second)
and enables the on-SoC mailbox to handle inter-core communication.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2021-01-10 15:38:54 -05:00
Christian Taedcke
ddf13a3256 soc: arm: nxp: Add LPC55S28 support
Add initial support for NXP LPC55S28.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2021-01-05 15:38:04 -06:00
Mahesh Mahadevan
76cc0ddc3e soc: LPC55S69: Add DMA support
Add DMA configuration for LPC55S69

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-21 06:26:40 -05:00
Mahesh Mahadevan
f025700d8f soc: LPC54xxx, LPC55xxx: Update to use clock control
Use the clock control driver to get flexcomm clock
frequency

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-15 11:17:24 -05:00
Toby Firth
dc37f988e0 drivers: adc: added support adc driver for lpcexpresso55s69
Added shim driver for the LPADC for lpcexpresso55s69 board.

Fixes #22703.

Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2020-10-12 14:59:40 -05:00
Simon Guinot
fbcaa84a6c soc: lpc11u6x: fix pinmux initialization priority
The commit aac9e2c5e3
("device: Revise how initialization status is being handled") highlights
an initialization priority issue between the clock and pinmux device.
Since this commit Zephyr is not booting anymore on LPC11U6x MCUs. The
clock driver gets a NULL pointer when calling device_get_binding() to
retrieve the pinmux device. It is because the pinmux device is not
initialized yet due to a lesser priority.

This patch fixes this issue by ensuring that Zephyr initializes the
pinmux device before the clock device.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-09-14 12:47:32 -05:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Jiří Keresteš
3a87517c5e drivers: watchdog: mcux_wwdt: add driver for NXP LPC 55xxx WWDT
Adds shim driver for LPC 55xxx Windowed Watchdog Timer (WWDT).

Also updates the "Supported features" table in LPCXpresso55S69
board documentation page.

Fixes #22704.

Signed-off-by: Jiří Keresteš <jiri@kerestes.cz>
2020-08-04 15:13:25 -05:00
Maxime Bittan
9ca6b704a7 drivers: i2c: Add support for LPC11U6X I2C controllers
This commit adds a driver for the LPC11U6X I2C controllers

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-07-29 20:12:24 +02:00
Simon Guinot
84e0d8c78d soc: nxp_lpc: lpc11u6x: add IAP interface
This patch adds the iap.h header file which provides an entry function
for the IAP (In-Application Programming) interface. Note that the IAP
commands are located in the boot ROM code. Mostly they provide access
to the on-chip flash and EEPROM devices.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-07-29 20:12:24 +02:00
Maxime Bittan
4edf475d1c drivers: serial: Add support for LPC11U6X UART controllers
This commit adds support for UART0-4 controllers present on
LPC11U6X MCUs.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-07-29 20:12:24 +02:00
Maxime Bittan
ed4511ea8c drivers: clock_control: lpc11u6x: Add support for clock controller
This commit adds basic support for the clock controller used in
lpc11u6x MCUs.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-07-29 20:12:24 +02:00
Simon Guinot
fb92dd1bc7 drivers: pinmux: add driver for NXP LPC11U6X MCUs
This patch adds a pinmux driver allowing to configure the IOCON (I/O
control) registers found on the LPC11U6x MCUs.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-07-29 20:12:24 +02:00
Maxime Bittan
9931eca5f9 soc: arm: Add basic support for LPC11U6X series
This commit adds basic support for the NXP lpc11u6x soc series.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-07-29 20:12:24 +02:00