When LPN sends a segmented message to itself, it unnecesseraly polls
Friend. Since Friend doesn't receive this message, the segmented message
transmission will eventually fail (send end callback will return error),
while the message will actually be passed to the access layer.
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Add command to set DVS mode, to aid in testing regulators that expose
this functionality. Since DVS modes are device specific, take an integer
as the mode identifier and pass it to the driver directly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This help to decipher PCIe capabilities supported by each listed device.
Shown only on a selected device and not on the general list.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Following the previous commit that introduce the settings API for the
Bluetooth subsystem, some unit tests needed to be updated to use it.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
This commit wrap the `settings_set_one` and `settings_delete` functions
in `bt_settings_store_one` and `bt_settings_delete`. By doing that the
Bluetooth settings can be managed in a single place.
This commit also introduce a new API to manage Bluetooth storage with
`bt_settings_store_*` and `bt_settings_delete_*` functions. Each
Bluetooth settings key have their own store and delete functions. Doing
that so custom behavior for key can be done if necessary.
This change is motivated by a need of keeping track of different
persistently stored settings inside the Bluetooth subsystem. This will
allow a better management of the settings that the Bluetooth subsystem
is responsible of.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Since not all syscalls are generated to be included in
the final binaries due to changes in build steps and CMake
files, update the document to clarify what needs to be
done to include specific syscalls in final binaries.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The syscall generation phase parses all header files to look
for potential syscalls, and emits all the relevant files to
enable syscalls. However, this results in all the syscall
marshalling functions being included in the final binary.
This is due to these functions being referred to inside
the dispatch list, resulting in ineffective garbage
collection during linking. Previous commits allows each
drivers and subsystems to specify which header files
containing syscalls are relevant. So this commit changes
the syscall generation to only include the syscalls needed
for the build in the syscall dispatch list and removing
various bits related to that. This allows the linker to
garbage collect unused syscall related function, and thus
reducing final binary size.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a new cmake function zephyr_syscall_header() which
will be used in the future to limit the scope of syscalls
in the built binary. Currently this is just an empty stub
so that add zephyr_syscall_header() to kernel, subsys, etc.
without breaking the build.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_ENTROPY_HAS_DRIVER. Since kconfigs
are guarded by CONFIG_ENTROPY_GENERATOR anyway, drivers are not
built unless CONFIG_ENTROPY_GENERATOR is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_SERIAL_HAS_DRIVER. Since kconfigs
are guarded by CONFIG_SERIAL anyway, drivers are not built
unless CONFIG_SERIAL is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_FLASH_HAS_DRIVER_ENABLED. Since
kconfigs are guarded by CONFIG_FLASH anyway, drivers are not
built unless CONFIG_FLASH is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
MEC172x modular card has no onboard I2C IO expander.
Remove obsolote dts SPI properties and choose LDMA driver.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
If a user tries to enable TWT too early in the connection, then we might
enter TWT sleep even before DHCP is completed, this can result in packet
loss as when we wakeup we cannot receive traffic and completing DHCP
itself can take multiple intervals. Though static ip address can be
assigned too. Reject TWT till Wi-Fi interface has
a valid IP address.
Signed-off-by: Ajay Parida <ajay.parida@nordicsemi.no>
Remove pin configurations for board LEDs/switches. It doesn't make sense
to do this at board level when the samples take care of doing the same
using the standard GPIO API.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The I2C driver clock was initialized in board specific code, move it to
the driver as it is part of its responsabilities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new pinctrl driver for TI CC32XX SoC. The driver has not been
tested, just implemented following datasheet specs and checked that it
compiles. Consider this as a best-effort driver to remove custom pinmux
code in board files.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use the natural sort of list when generating a hardware map. The
list is sorted with a serial port as a key. When more than 10 ports
are active and some of devices use more than one port, the ports
of one device may be listed in wrong sequence, which may cause
futher problems with selecting the right port for listening to
the device.
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
Use a regulator-fixed node to describe the 3.3V power rail. Make sure it
is always enabled by setting CONFIG_REGULATOR=y at board level.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Set flash location for CM4 to ocram, so CONFIG_FLASH_BASE_ADDRESS is
set correctly.
Fixes#59213
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Disable RT boot header for CM4 core. This will ensure the boot header is
not present when building an application targeting RAM on the CM4.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The debug pins are now configured in the Bluetooth debug module as part
of the DEBUG_INIT() macro.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The debug pins were configured in a board specific file, however, the
subsys/bluetooth/controller/ll_sw/openisa/hal/RV32M1/debug.h file
already contains board-specific pins, meaning there's no need to split
the information in 2 places. Move the GPIO configuration calls to the
DEBUG_INIT() macro in the controller debug header.
Note that in the future, Devicetree should be used to provide a
hardware-agnostic debug module.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The adc-shell uses a hardcoded list of defines to check whether it should
throw a compile-time error. The ADS1119 and ADS1112 driver both support
the APIs needed by the shell, so this commit enables support for them in
the hardcoded support list.
Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
This PR adds a custom driver for the ADS1112 ADCs. Unlike ADS1113/4/5
family served by the ADS1x1x driver, the ADS1112 does not use an address
pointer to address config registers. Instead, there is only one writable
register and all i2c writes will set it. The registers resemble the
ADS1119 device, but config bitmap is different, include a distinct data
rate table, gain table, and input multiplexing table. There is also not a
status register to be monitored with the ADS1112, as it uses config bit 7
for the same purpose instead of a separate register.
The driver was tested on hardware using the ADC shell interface. Manual
probing validated the voltages for the MUX_SINGLE configs at datarate 15
in CM_SINGLE. Higher gains were not tested and CM_CONTINUOUS is not
supported in this initial implementation.
The new driver has also been added to the existing ADC test using adc_emul
for completeness.
Origin: original
License: Apache 2.0
Purpose: Adding support for ADS1112 ADCs
Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
Move dt files related to SoC family and series to npcx folder. It only
leaves SoC dt file in `dts/arm/nuvoton folder` in case of confusion with
the other Nuvoton SoCs.
The dt files path will be:
dts/arm/nuvoton
|--npcx
| |--npcx7
| | |--npcx7-miwus-wui-map.dtsi
| | |--npcx7-alts-map.dtsi
| | |--.....
| +--npcx9
| | |--npcx9-miwus-wui-map.dtsi
| | |--npcx9-alts-map.dtsi
| | +--.....
| |--npcx-miwus-wui-map.dtsi
| |--npcx-alts-map.dtsi
| |--npcx.dtsi
| |--npcx7.dtsi
| |--npcx9.dtsi
|--npcx7m6fb.dtsi
|--npcx7m6fc.dtsi
|--npcx9m8f.dtsi
+--npcx9m3f.dtsi
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Some RISCV platforms shipping a CLIC have a peculiar interrupt ID
ordering / mapping.
According to the "Core-Local Interrupt Controller (CLIC) RISC-V
Privileged Architecture Extensions" Version 0.9-draft at paragraph 16.1
one of these ordering recommendations is "CLIC-mode interrupt-map for
systems retaining interrupt ID compatible with CLINT mode" that is
described how:
The CLINT-mode interrupts retain their interrupt ID in CLIC mode.
[...]
The existing CLINT software interrupt bits are primarily intended for
inter-hart interrupt signaling, and so are retained for that purpose.
[...]
CLIC interrupt inputs are allocated IDs beginning at interrupt ID
17. Any fast local interrupts that would have been connected at
interrupt ID 16 and above should now be mapped into corresponding
inputs of the CLIC.
That is a very convoluted way to say that interrupts 0 to 15 are
reserved for internal use and CLIC only controls interrupts reserved for
platform use (16 up to n + 16, where n is the maximum number of
interrupts supported).
Let's now take now into consideration this situation in the DT:
clic: interrupt-controller {
...
};
device0: some-device {
interrupt-parent = <&clic>;
interrupts = <0x1>;
...
};
and in the driver for device0:
IRQ_CONNECT(DT_IRQN(node), ...);
From the hardware prospective:
(1a) device0 is using the first IRQ line of the CLIC
(2a) the interrupt ID / exception code of the `MSTATUS` register
associated to this IRQ is 17, because the IDs 0 to 15 are reserved
From the software / Zephyr prospective:
(1b) Zephyr is installing the IRQ vector into the SW ISR table (and into
the IRQ vector table for DIRECT ISRs in case of CLIC vectored mode)
at index 0x1.
(2b) Zephyr is using the interrupt ID of the `MSTATUS` register to index
into the SW ISR table (or IRQ vector table)
It's now clear how (2a) and (2b) are in contrast with each other.
To fix this problem we have to take into account the offset introduced
by the reserved interrupts. To do so we introduce
CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET as hidden option for the
platforms to set.
This Kconfig option is used to shift the interrupt numbers when
installing the IRQ vector into the SW ISR table and/or IRQ vector table.
So for example in the previous case and using
CONFIG_RISCV_RESERVED_IRQ_ISR_TABLES_OFFSET == 16, the IRQ vector
associated to the device0 would be correctly installed at index 17 (16 +
1), matching what is reported by the `MSTATUS` register.
CONFIG_NUM_IRQS must be increased accordingly.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
