Remove water mark configuration and handle its interrupt
instead, since it is only present in ESP32S3.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
since h750 and h743 have the same irq wkup priority,
we can add wkup interrupt in h743.dsti and simply
include the file in h750.dtsi.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Increase wifi connect input parameters max count to 13. Previous count
7 is not enough if other security type is supported.
When enabling softAP, the parameter cnx_params in cmd_wifi_ap_enable()
is with static key word. Then the parameter will always save
configurations of last time. Remove static keyword to eliminate effects
of configs from last tim and do memset before setting up softAP.
Signed-off-by: Hui Bai <hui.bai@nxp.com>
Link mode shows unknown when legacy (A or bg only) device connects to
APUT. Set the link mode to WIFI_2 when the host freq over 4000 and set
link mode to WIFI_3 when the host freq over 2000.
Signed-off-by: Hui Bai <hui.bai@nxp.com>
Increase max count of CONFIG_WIFI_SHELL_MAX_AP_STA from 5 to 8. The
SoftAP of NXP wifi chip can support up to 8 stations.
Signed-off-by: Hui Bai <hui.bai@nxp.com>
Added new flag CONFIG_WIFI_NM_HOSTAPD_AP for hostapd support. Once this
flag is enabled, softAP will be setup by hostapd. Both wpa_supplicant
and hostapd uses same task and eloop.
Included necessary hostapd files when compiling wifi samples if
CONFIG_WIFI_NM_HOSTAPD_AP is enabled. Added hostapd support for all
softAP command of L2 wifi shell commands.
Signed-off-by: Hui Bai <hui.bai@nxp.com>
When omitting the clk_src definition in a child node of a pclkblock,
it uses the source of the parent node.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Allows MSTP register addresses to be changed in the device tree
to support different configuration SoCs.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add support for HSE as the RTC clock source.
The initial implementation has the following limitations:
- Only whole MHz HSE frequency is supported, e.g. 24.5 MHz will generate a
compile error.
- Frequencies equal or above 64 MHz are not supported and will generate a
compile error.
The implementation has been tested on nucleo_h563zi with:
- 8 MHz (via hse-bypass)
- 25 MHz (via external crystal)
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
pwm: pwm_api: update testcase.yaml and add new overlay configuration
to support flexio pwm driver.
spi: spi_loopback: update testcase.yaml and add new overlay
configuration to support flexio spi driver.
Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
After testing the flexio spi_loopback on the ke1xz platform,
it is found that the master transfer and receive are not
synchronized. So add loop code to wait for the master transfer
to complete for frdm_ke17z and frdm_ke17z512 platforms.
Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
This adds the bits to test the displaying the usage of
privileged stacks for user threads. Note that this only
adds the printk part as this is to test the code path to
fetch usage data rather than the display part.
Also add qemu_xtensa/dc233c/mmu to platform allow list so
the privileged stack code can be tested on that platform.
This replaces mps2/an385 with qemu_x86 as an integration
platform due to the privileged stack test. Since ARM does
not currently support getting privileged stack info, test
would result in twister error due to kconfig warnings.
The board cannot be excluded since it's an integration
platform. So for now, use qemu_x86 as an integration for
32-bit testing. Once ARM has proper support, we can go
back to having mps2/an385 as an integration platform.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This disables QEMU icount for all the simulated platforms
in the allowed list. With icount enabled, the printout from
the thread analyzer would be continuous and non-stop instead
of the default once every 60 seconds. Besides, the console
harness only needs one, and these is no need to waste CPU
cycles and memory for processing the extra ones.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This implements arch_thread_priv_stack_space_get() so this can
be used to figure out how much privileged stack space is used.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the bits to initialize the privileged stack when
a thread is transitioning to user mode. This prevents
information leaking if the stack is reused, and also aids
in calculating stack space usage during system calls.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This implements arch_thread_priv_stack_space_get() so this can
be used to figure out how much privileged stack space is used.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the bits to initialize the privileged stack for
each thread during thread initialization. This prevents
information leaking if the thread stack is reused, and
also aids in calculating stack space usage during system
calls.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This implements arch_thread_priv_stack_space_get() so this can
be used to figure out how much privileged stack space is used.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the bits to initialize the privileged stack for
each thread during thread initialization. This prevents
information leaking if the thread stack is reused, and
also aids in calculating stack space usage during system
calls.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Only set the privileged stack pointer for thread stacks, but
nullify the pointer for kernel-only stacks, as these stacks
do not have the reserved space. The psp pointer may point to
arbitrary memory in this case if stack is not big enough.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the bits to display privileged stack usage for
architectures that support obtaining this information.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The per-thread output after the first stack usage line is not
aligned which makes it harder to decipher the content.
So align them for easier reading.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a new arch_thread_priv_stack_space_get() interface for
each architecture to report privileged stack space usage. Each
architecture will need to implement this function as each arch
has their own way of defining privileged stacks.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
IPPROTO_IPV6 option was set on TCP socket (besides doing it already in
tcp.c) instead of UDP. Fix that.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use correct output for the changed-files action so that bsim tests are
also run on deleted files, no just added/copied/modified/renamed
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Use correct output for the changed-files action so that docs
is built in CI when relevant files are *deleted* too, not just
added/renamed/modified
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Adds the default MCUboot operating mode when building using sysbuild.
Fix mcuboot sysbuild for frdm_mcxn947.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Currently, if the user wants to allocate heap on external RAM
he needs to enable CONFIG_ESP_SPIRAM and set a threshold defined
with CONFIG_ESP_HEAP_MIN_EXTRAM_THRESHOLD.
This approach requires that we re-implement `k_malloc` and allocate
the memory on the proper region based on the block size.
By using the shared multi heap feature the proccess of allocating
memory from external memory becomes more fluent and simple.
The attribute SMH_REG_ATTR_EXTERNAL was added to reference the
external memory.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Update `shell_backend_uart` to take into account the new line print by
`z_cursor_next_line_move`.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
When the shell start, it will print two lines. The reason for that
behavior is not documented. Remove that to make the code simpler and
shorter one line at a time.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
The fact that the function was returning `true` for empty line was an
unexpected behavior according to the name of the function itself and how
it was used elsewhere.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Follow ARM architecture recommendations:
* Use Data Synchronization Barrier (DSB) instruction before WFI,
to ensure that pending memory transactions complete before
changing state.
* To guarantee pend interrupts are recognized before subsequent
operation, use ISB after CPSIE (__irq_enable)
This prevents sporadicy delayed ISRs due to continous MEC172x
entering/exiting deep sleep.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
