Commit graph

63849 commits

Author SHA1 Message Date
Georgij Cernysiov
1520820bff drivers: pwm: stm32: fix PWM channel disabling
Move period and pulse computation to right before
the channel enable code.

That fixes the inability to disable the channel by
providing the period of 0.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-05 14:36:56 -05:00
Peter Maxwell Warasila
d875cfc110 dts: arm: st: u5: add fdcan to stm32u5 series
Add support for the fdcan peripheral to the stm32u5 series device tree
include. This can be applied here since (at present) all of the stm32u5
series MCUs have an FDCAN peripheral.

Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
2022-05-05 14:35:37 -05:00
Peter Maxwell Warasila
c91a70e130 driver: can: stm32fd: add stm32u5 clock selection
The STM32u% series of processors has a unique set of clock sources for
the FDCAN peripheral. This brings the selection in line with the
existing can_stm32fd clock selection Kconfigs.

This change was tested on a proprietary board using the STM32U5 series
which exposes the CAN pins of the SOC using a transciever on a live CAN
bus as well as on the nucleo_g474re board from ST in loopback mode.

HSE and PLL1Q tests run and all passed.

PLL2P is not currently supported by the clock drivers for STM32U5, and
as such is currently untested. When this support is added, the driver
should be able to use this clock without issue.

When changes from #42097 are merged this fix should be deprecated in
favor of using the methods outlined there.

Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
2022-05-05 14:35:37 -05:00
Gerard Marull-Paretas
40c59da65c doc: hardware: pinctrl: inform about /omit-if-no-ref/
Update the documentation to inform about /omit-if-no-ref/ when using the
node-based approach.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-05 14:33:06 -05:00
Gerard Marull-Paretas
b1ae0b6bd1 boards: arm: nucleo_g0b1re: update pinctrl node file
The file with pinctrl nodes has been updated to
st/g0/stm32g0b1r(b-c-e)tx-pinctrl.dtsi for this board.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-05 14:33:06 -05:00
Gerard Marull-Paretas
6c547229dc manifest: update hal_stm32 revision
Pull latest pinctrl changes:

- Updated to CubeMX 6.5.0 database
- All nodes are prefixed with /omit-if-no-ref/

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-05 14:33:06 -05:00
Gerard Marull-Paretas
6be97b00fd dts: arm: microchip: mec127x: add /omit-if-no-ref/ to pinctrl nodes
All DT nodes end up being part of the generated 'devicetree_unfixed.h'
header, wether they are referenced or not. The number of entries in that
file can grow quickly when using pre-generated pinctrl nodes.
Considering <devicetree.h> (file uncluding devicetree_unfixed.h) is used
in lots of places nowaday, not using /omit-if-no-ref/ can lead to
increased build times.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-05 14:33:06 -05:00
Krzysztof Chruscinski
4b4c5bfcee lib: os: cbprintf: Fix variable assignment
When in_len is 0 then length is calculated from the package and
assignment was missing.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-05-05 14:29:26 -05:00
Gerard Marull-Paretas
8c2a732067 types: mode to include/zephyr
With the new <zephyr/> include prefix, the "types" header ended up being
located in <zephyr/zephyr/types.h>, ie weird. Code that hasn't migrated
to <zephyr/zephyr/types.h> (no occurences in tree) will be automatically
prepared for the removal of the legacy include path. Most applications
will not be impacted as both include and include/zephyr are now in the
include path, and they'll be already prepared for the future.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-05 14:26:05 -05:00
Gerard Marull-Paretas
bad523d1aa arch: x86: zefi: support multiple include paths
When legacy mode is enabled, Zephyr includes both include/ and
include/zephyr. Allow the zefi.py script to accept multiple include
paths to cover this scenario.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-05 14:26:05 -05:00
Evgeniy Paltsev
1cfd4fdc24 ARC: boards: hsdk_2cores: allow mwdt toolchain usage
Allow mwdt toolchain usage for 2 cores HSDK configuration
as we have it for 4 cores configuration.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-05 14:23:57 -05:00
Henrik Brix Andersen
0acb154863 soc: riscv: openisa: rv32m1: remove default pinmux configuration
Remove the default pinmux Kconfig configuration from the OpenISA RV32M1
SoC.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
191bf2ab0a boards: riscv: rv32m1_vega: convert from pinmux to pinctrl
Convert the OpenISA RV32M1 VEGAboard from pinmux to pinctrl.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
64c9fadc7c drivers: pwm: rv32m1: tpm: add pinctrl support
Add pinctrl support to the OpenISA RV32M1 TPM PWM driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
c83a0d5d1f drivers: spi: rv32m1: lpspi: add pinctrl support
Add pinctrl support to the OpenISA RV32M1 LPSPI SPI driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
7b33d4af6c drivers: i2c: rv32m1: lpi2c: add pinctrl support
Add pinctrl support to the OpenISA RV32M1 LPI2C I2C driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
738e9f57f9 drivers: serial: rv32m1: lpuart: add pinctrl support
Add pinctrl support to the OpenISA RV32M1 LPUART serial driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
9ba953d13a drivers: gpio: rv32m1: configure pin mux as GPIO
Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
a1181dbd16 dts: riscv: rv32m1: add dummy pinctrl node
The OpenISA RV32M1 pinctrl groups need a dummy pinctrl node to populate
with pinctrl options at the board level.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
1dc3b237fa drivers: pinctrl: add OpenISA RV32M1 pinctrl driver
Add OpenISA RV32M1 pinctrl driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
db643ea610 dts: bindings: pinctrl: add pinctrl binding for OpenISA RV32M1
Add pinctrl devicetree bindings for the OpenISA RV32M1.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Henrik Brix Andersen
2e9d7dd70d soc: riscv: openisa: rv32m1: add pinctrl header file
Add OpenISA RV32M1 pinctrl header file to define SoC specific pinctrl_soc_t
structure. This is used to store pin configurations for the pinctrl driver.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-05-05 13:34:39 -05:00
Anas Nashif
d8b45e38c1 MAINTAINERS: add DAI area
Add new area with juimonen as the maintainer.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-05-05 11:00:30 -04:00
Arsen Eloglian
0a2df833f9 dts: add binding for intel ssp
Add ssp (sspbase) node for Intel ssp.

Signed-off-by: Arsen Eloglian <ArsenX.Eloglian@intel.com>
2022-05-05 08:47:03 -05:00
Bradley Bolen
dfc4c3f8a6 soc: arm: xilinx_zynqmp: Enable the VFP
This SoC supports vfpv3-d16 with single and double precision and 16
64-bit registers.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2022-05-05 12:03:27 +09:00
Bradley Bolen
88ba97fea4 arch: arm: aarch32: cortex_a_r: Add shared FPU support
This adds lazy floating point context switching.  On svc/irq entrance,
the VFP is disabled and a pointer to the exception stack frame is saved
away.  If the esf pointer is still valid on exception exit, then no
other context used the VFP so the context is still valid and nothing
needs to be restored.  If the esf pointer is NULL on exception exit,
then some other context used the VFP and the floating point context is
restored from the esf.

The undefined instruction handler is responsible for saving away the
floating point context if needed.  If the handler is in the first
irq/svc context and the current thread uses the VFP, then the float
context needs to be saved.  Also, if the handler is in a nested context
and the previous context was using the FVP, save the float context.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2022-05-05 12:03:27 +09:00
Stephanos Ioannidis
80bd814131 arch: arm: cortex_r: Initialise VFP D32 registers for DCLS
This commit updates the Cortex-R reset routine to initialise
(synchronise) the VFP D16-D31 registers when Dual-redundant Core
Lock-step (DCLS) is enabled.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 12:03:27 +09:00
Bradley Bolen
7f44e28619 arch: arm: aarch32: Create z_arm_floating_point_init() for Cortex-R
This will enable the VFP unit on boot to handle the case where
FPU_SHARING is not enabled.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2022-05-05 12:03:27 +09:00
Bradley Bolen
7c1e399179 arch: arm: aarch32: Create a fpu stack frame
Grouping the FPU registers together will make adding FPU support for
Cortex-A/R easier later.  It provides the ability to get the sizeof and
offsetof FPU registers easier.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2022-05-05 12:03:27 +09:00
Bradley Bolen
3f7162fc07 arch: arm: aarch32: Rearrange exception stack frame
Cortex-A/R use a descending stack frame and the hardware does not help
with the stacking.  This led to some less than desirable workarounds in
the exception code where the basic stack frame was saved twice.
Rearranging the order of the exception stack frame removes that problem
and provides a clearer path to saving CPU context in a fully descending
manner.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2022-05-05 12:03:27 +09:00
Stephanos Ioannidis
18398948db cmake: gcc: target_arm: Force FP hard ABI for DCLS
When Dual-redundant Core Lock-step (DCLS) topology is used, the VFP
registers across the two redundant cores must be manually initialised
and synchronised, and this requires the `-mfloat-abi=hard` option to
be specified.

This commit forces the use of FP "hard" ABI on the VFP-equipped cores
that are configured in DCLS topology.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 12:03:27 +09:00
Stephanos Ioannidis
6d4bce81ae cmake: gcc: target_arm: Support advanced floating-point options
This commit updates the Zephyr build system to support specifying
advanced floating-point compilation options derived from the newly
introduced unified floating-point configurations.

The following changes are introduced by this commit:

1. Specify architecture floating-point option to the `-mcpu` flag.
2. Specify floating-point unit (FPU) type using the `-mfpu` flag.

Note that the `-march` flag is not specified separately because the
`-mcpu` flag provides more detailed architecture options and this
makes the `-march` flag redundant.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 12:03:27 +09:00
Stephanos Ioannidis
5181c61797 arch: arm: Add unified floating-point configuration symbols
This commit adds the unified floating-point configuration symbols for
the ARM architectures.

These configuration symbols allow specification of the floating-point
coprocessors, such as VFP (also known as FP for Cortex-M) and NEON,
for the ARM architectures.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 12:03:27 +09:00
Bradley Bolen
afef64e236 tests: fpu_sharing: Support FPU disable test for Cortex-A/R
For testing, assume that the Cortex-A/R platforms are using a GIC
interrupt controller.  Use the last GIC SGI to trigger an interrupt for
the test.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2022-05-05 12:03:27 +09:00
Bradley Bolen
90b1c6a3e8 tests: fpu_sharing: Enable support for Cortex-R
Reuse the Cortex-M paths for testing the floating point unit.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2022-05-05 12:03:27 +09:00
Stephanos Ioannidis
6a35a793b5 tests: cmsis_dsp: Add mps3_an547 as integration platform for FPU tests
This commit adds the `mps3_an547` board, a Cortex-M55 platform, as an
integration platform for all CMSIS-DSP FPU test cases so that the
M-Profile Vector Extension (MVE) vector function implementations are
tested in the CI.

With this change the FPU-enabled test coverage is as follows:

* mps2_an521_remote (Cortex-M33) tests FPU/DSP-enabled scalar function
  implementations.

* mps3_an547 (Cortex-M55) tests FPU/DSP-enabled MVE vector function
  implementations.

This also has a side effect of comprehensively exercising the M-Profile
Vector Extension support in the ARM architecture port, thereby ensuring
the arch-level FPU/DSP/MVE support is not broken.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
a38e68b97c tests: lib: cmsis_nn: Enable testing on mps3_an547
Zephyr SDK 0.14.1 now includes QEMU 6.2, which supports the emulation
of the MVE instructions.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
5790c5923f Revert "tests: lib: cmsis_dsp: Disable testing on mps3_an547"
This reverts commit 96c7f6ab75.

Zephyr SDK 0.14.1 now includes QEMU 6.2, which supports the emulation
of the MVE instructions.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
2bd4af44f6 Revert "soc: arm: mps3: Only enable MVE if not QEMU"
This reverts commit 91d4b7766c.

Zephyr SDK 0.14.1 now includes QEMU 6.2, which supports the emulation
of the MVE instructions.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
8c160e0d5a tests: lib: cmsis_dsp: filtering: Test vector FIR functions
This commit adds support for testing the vector implementation of the
FIR filter functions when the MVE is enabled.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
4e379f9215 tests: lib: cmsis_dsp: filtering: Test vector Biquad functions
This commit adds support for testing the vector implementation of the
Biquad filter functions when the MVE is enabled.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
db56091560 tests: lib: cmsis_dsp: statistics: Adjust error threshold for MVE
The MVE vector version of the statistics functions are slightly less
accurate than the scalar equivalents, so allow a higher relative error
threshold when the MVE is enabled.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
f560eebd86 tests: lib: cmsis_dsp: fastmath: Adjust error threshold for MVE
The MVE vector version of the `vinverse` function is slightly less
accurate than the scalar version, so allow a higher relative error
threshold when the MVE is enabled.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
0fb4a3566b modules: cmsis_dsp: Fix missing common tables dependency for SVM
This commit adds the missing common tables dependency for the SVM
functions.

The `exp_tab` and `exp_tab_f16` tables are required by the SVM
functions when the MVE is enabled.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
e814a203aa west.yml: Update CMSIS to pull in MVE fixes
This commit updates the west.yml to pull in the the M-Profile Vector
Extension (MVE) fixes.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Stephanos Ioannidis
ae0d3f8ba0 boards: mps3_an547: Update obsolete emulation instructions
The commit 94428044e2, which introduced
this behavioural change, forgot to update the instructions provided in
the comments.

This commit updates the obsolete instructions for using an alternate
emulation platform in the comments.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-05 11:58:11 +09:00
Evgeniy Paltsev
b102a295af ARC: boards: increase timeouts for nSIM SMP platforms
nSIM SMP simulation is s bit slower than single-core one, so
let's increase timeouts for nSIM SMP platforms.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-05-04 19:01:11 -04:00
Evgeniy Paltsev
7353ea5886 twister: implement platform-specific test timeout management
Twister allows us to control maximum execution time for each
test with timeout value in test .yaml configuration. This
helps us to prevent slow tests from stopping by timeout.

However it's hard to choose test timeout for all platforms
as some platforms are naturally slow. It could be a HW board with
power-efficient but slow CPU or simulation platform which
can perform instruction accurate simulation but does it slowly.

As we don't want to increase test timeout infinitely to meet
the needs of the slowest platform let's introduce
platform-specific test timeout management. It's implemented as
an optional 'timeout_multiplier' field in board .yaml
configuration. Setting it to some value multiplies each test
timeout by this value. By that we can increase timeouts only
for the platforms where it's required.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-05-04 19:01:11 -04:00
Stephanos Ioannidis
2c47a919af modules: cmsis_nn: Move Kconfig prompt out of CMSIS-DSP menu
The `CMSIS_NN` Kconfig previously depended on the `CMSIS_DSP` Kconfig,
and this placed the "CMSIS-NN Library Support" prompt under the "CMSIS-
DSP Library Support" menu (note that CMSIS-DSP is a menuconfig).

Since the CMSIS-NN library, although it requires the CMSIS-DSP library,
is not a subordinate component of the CMSIS-DSP library, remove its
dependency on `CMSIS_DSP` and make it select the Kconfig symbol
instead.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-05-04 18:57:41 -04:00
Mariusz Skamra
d43272efdf samples: unicast_audio_server: Remove unused buf pool
The statically defined buffer pool is unused and can be removed.

Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
2022-05-04 18:57:15 -04:00