Commit graph

46065 commits

Author SHA1 Message Date
Emil Gydesen
071db25f66 Bluetooth: Controller: Adds missing ull_disable in ll_sync_terminate
A call to `ull_disable` was missing in the function.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2020-11-19 12:36:14 +01:00
Shihao Shen
90f0a1d6af samples: drivers: add platform filtering for led pwm
The sanity check on this sample gives timeout failure
on reel board because of bad filtering. Because the
sample does not adopt ztest framework, sanitycheck in
our daily test will report this as failure, which lowers
our passrate but this is not a sample with errors.

Signed-off-by: Shihao Shen <shihao.shen@intel.com>
2020-11-19 12:36:03 +01:00
Alexander Kozhinov
ad5b7be929 boards: arm: stm32h747i_disco: doc: images
add images for board ethernet modification
add index.rst Ethernet HW modifications description

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-19 12:35:22 +01:00
Alexander Kozhinov
6d10ca0879 boards: arm: stm32h747i_disco: rng
add rng driver support

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-19 12:35:22 +01:00
Alexander Kozhinov
bc6835ba50 boards: arm: stm32h747i_disco: ethernet
add ethernet driver support

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-19 12:35:22 +01:00
Harry Jiang
c37a0897f6 boards: nucleo_h743zi: Add SPI support
Add SPI1 support on the Arduino R3 connector

Signed-off-by: Harry Jiang <explora26@gmail.com>
2020-11-19 12:35:12 +01:00
Harry Jiang
de729882a0 drivers: spi: spi_ll_stm32: Fix the master mode not work.
On the STM32MP1 and STM32H7 Series SoC, if slave select pin control by
software on master mode operation, the SS input/output polarity (SSIOP)
should be set to high level avoid the mode fault (MODF) error.

Signed-off-by: Harry Jiang <explora26@gmail.com>
2020-11-19 12:35:12 +01:00
Harry Jiang
85e0e21390 drivers: spi: spi_ll_stm32: Add support for STM32H7xx SoC
Add SPI driver support for STM32H7xx SoC.

Signed-off-by: Harry Jiang <explora26@gmail.com>
2020-11-19 12:35:12 +01:00
Harry Jiang
d0058d92db dts: arm: st: h7: Add SPI nodes to STM32H7xx SoC
Add the SPI nodes to STM32H7xx Series Soc

Signed-off-by: Harry Jiang <explora26@gmail.com>
2020-11-19 12:35:12 +01:00
Erwan Gouriou
6c7380183e drivers/bluetooth: ipm_stm32: Wake up C2 at init
When C2 is powered on, flash erase/write operation requires C1
to share a flash mutex with C2. This can only be done if IPM
communication is set up (SHCI).
Instead of configuring C2 (BLE controller) at on ble open,
do it at driver start up.
This allows flash operations before ble_open.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-19 12:35:01 +01:00
Stefan Bigler
596cad8231 spi: fix locking for SPI_LOCK_ON using synchronous API
Keep locking for SPI_LOCK_ON from the first call of transceive until
spi_release release the lock. Use owner parameter to in the spi_context
to store the owner of the lock.
The locking is in line with the SPI_HOLD_ON_CS

Signed-off-by: Stefan Bigler <stefan@bigler.io>
2020-11-19 12:34:44 +01:00
Markus Becker
638b5f389f net: openthread: OpenThread RCP mode integration into Zephyr
* Add RCP library.
* Conditionally remove non required libraries not required for RCP.
* Drop :option: marker for CONFIG_OPENTHREAD_NCP_SPINEL_ON_UART_ACM

Signed-off-by: Markus Becker <markus.becker@tridonic.com>
2020-11-19 12:34:14 +01:00
Lingao Meng
65395f30ec Bluetooth: Mesh: Fixes pb-adv segment recv
Wrong use of function `find_msb_set(~link.rx.seg)`,
uint8_t type is implicitly converted to uint32_t.
As a result, it always returns 32 instead of the
expected value, resulting in abnormal processing
of prov segment.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2020-11-19 13:28:28 +02:00
Lingao Meng
9cd34f8675 Bluetooth: Mesh: Fixes prov string log dump
Missing log_strdup around the string.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2020-11-19 13:28:28 +02:00
Lingao Meng
109d6d4d8c Bluetooth: Mesh: Fixes wrong prov pointer clear
The structure pointer was wrongly cleared before,
`bearer` and `role` in `bt_mesh_prov_link` structure
resulting in illegal pointer access.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2020-11-19 13:28:28 +02:00
Ilya Averyanov
d262b064a2 Bluetooth: shell: fix compilation
phy2str also used when CONFIG_BT_USER_PHY_UPDATE not only
when CONFIG_BT_OBSERVER

Signed-off-by: Ilya Averyanov <a1ien.n3t@gmail.com>
2020-11-19 13:28:06 +02:00
Lingao Meng
88f8c735a7 Bluetooth: Mesh: Fixes missing set virtual addr
Fixes missing virtual address set

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2020-11-19 13:23:48 +02:00
Lingao Meng
4fbce04372 Bluetooth: Mesh: Correction of missing beacon auth generation
When kr phase to `BT_MESH_KEY_REVOKED`, should also call beacon
authentication, since beacon flag has change(0x01-->0x00).

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2020-11-19 13:21:28 +02:00
Marcin Niestroj
8669709d1e Bluetooth: DIS: settings: select SETTINGS
DIS module builts fine when BT_DIS_SETTINGS is selected, but SETTINGS is
not. However no settings handlers are executed, just like with
BT_DIS_SETTINGS disabled, which might confuse user.

Select SETTINGS, so settings handlers are properly selected and executed
in runtime.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-11-19 13:18:16 +02:00
Marcin Niestroj
faabbb6809 Bluetooth: DIS: settings: drop dependency on BT_SETTINGS
Currently BT_DIS_SETTINGS and BT_SETTINGS are independent in
Kconfig. This seems fine, because BT_SETTINGS pulls a lot of
functionality, which is not really needed to implement DIS with values
configured in runtime (from settings subsystem).

Drop BT_SETTINGS conditional compilation and leave check on
BT_DIS_SETTINGS only.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-11-19 13:18:16 +02:00
Jukka Rissanen
84e74b6a88 drivers: uart: Remove extra warn print from native_posix
Sometimes native_posix UART driver starts to flood the output
by printing hundreds of lines like this

    np_uart_poll_out: a character could not be output

Remove the warning as it makes the output very hard to read
without giving much useful information.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-11-19 08:46:51 +01:00
Anas Nashif
62743dc496 tests: native_posix: use llabs with int64_t
subpress warnings from llvm:

warning: absolute value function 'abs' given an argument of type
'int64_t' (aka 'long long') but has parameter of type 'int' which may
cause truncation of value [-Wabsolute-value]

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-19 08:41:56 +01:00
Anas Nashif
63b7313c06 net: lldp: use llabs with int64_t
subpress warnings from llvm:

warning: absolute value function 'abs' given an argument of type
'int64_t' (aka 'long long') but has parameter of type 'int' which may
cause truncation of value [-Wabsolute-value]

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-19 08:41:56 +01:00
Anas Nashif
43989ca675 libc: add labs() and llabs()
Add support for abs with additional integer types.

This is needed to make LLVM quiet and stop warning about abs being used
with int64_t and such.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-19 08:41:56 +01:00
Kamil Lazowski
104f100749 kernel: memslab: Add maximum mem_slab utilization trace
Add new function to mem_slab API that enables user
to get maximum number of slabs used so far.

Signed-off-by: Kamil Lazowski <Kamil.Lazowski@nordicsemi.no>
2020-11-18 22:33:27 -05:00
Kumar Gala
cc0c58c3af tests: coverage: GCOV counter value changed in GCC10.
Updated the GCOV_COUNTERS value, without which the coverage data
was corrupted when gcc 10.2 was used.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-11-18 22:17:58 -05:00
Carlo Caione
7ca246834c arm64: mmu: Fix SMEM_PARTITION_ALIGN define
In the linker script SMEM_PARTITION_ALIGN is being redefined to be the
same as MMU_ALIGN. The problem is that SMEM_PARTITION_ALIGN __must__
take a parameter in input because this is being used by the
scripts/gen_app_partitions.py script passing a parameter as input.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-11-18 12:28:27 -08:00
Gerard Marull-Paretas
eab34cc17c boards: stm32h747i_disco: enable openocd debugging
Add necessary entries to debug CM7 core using OpenOCD.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-18 14:12:41 -06:00
Gerard Marull-Paretas
c00839d243 boards: stm32h747i_disco: adjust openocd reset config
I have experienced some problems when flashing this board using OpenOCD.
Adding `connect_assert_srst` forces reset assertion before any
connection atempt (`srst_nogate` is required).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-18 14:12:41 -06:00
Katsuhiro Suzuki
a48d0b86be MAINTAINERS: add RISCV related directories
This patch gathers and adds all RISCV related directories into
'RISCV arch' entry.
It is preliminary modification until suitable maintainer (or entry)
for each RISCV boards or sub-architecture appears in the future.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2020-11-18 13:53:10 -06:00
Yestin Sun
f6b9edf85c samples: sensor: add sample application for lsm6dso
Add sample application for sensor lsm6dso. This sample has been
tested on stm32l562e_dk board, where lsm6dso is connect to I2C bus.

Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
2020-11-18 14:33:52 -05:00
Yestin Sun
b31b1d133e boards: stm32l562e_dk: add support for I2C
Add i2c1 interface for stm32l552xx and stm32l562xx microcontrollers
and enable i2c1 that connects to lsm6dso sensor module on the
stm32l562e_dk board.

Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
2020-11-18 14:33:52 -05:00
Mohamed ElShahawi
ba12244a47 boards: stm32f769i_disco: Add SDMMC Support
Add board specific configuration for  SDMMC support

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-11-18 14:33:16 -05:00
Mohamed ElShahawi
02376b0d8c dts: stm32: Add SDMMC2 support for STM32F72x/F76x
- Define sdmmc2 for STM32F72x/F76x  series.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-11-18 14:33:16 -05:00
Andrew Boie
5a58ad508c arch: mem protect Kconfig cleanups
Adds a new CONFIG_MPU which is set if an MPU is enabled. This
is a menuconfig will some MPU-specific options moved
under it.

MEMORY_PROTECTION and SRAM_REGION_PERMISSIONS have been merged.
This configuration depends on an MMU or MPU. The protection
test is updated accordingly.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-11-18 08:02:08 -05:00
Andrew Boie
0652d926e3 userspace: fix k_mem_partition definition
This properly is defined against CONFIG_USERSPACE, not
CONFIG_MEMORY_PROTECTION; memory domains are specifically
part of the userspace feature and its associated data
structures should not be used outside of it.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-11-18 08:02:08 -05:00
Andrew Boie
00cdb597ff arm: de-couple MPU code from k_mem_partition
k_mem_partition is part of the CONFIG_USERSPACE abstraction,
but some older MPU code was depending on it even if user mode
isn't enabled. Use a new structure z_arm_mpu_partition instead,
which will insulate this code from any changes to the core
kernel definition of k_mem_partition.

The logic in z_arm_configure_dynamic_mpu_regions has been
adjusted to copy the necessary information out of the
memory domain instead of passing the addresses of the domain
structures directly to the lower-level MPU code.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-11-18 08:02:08 -05:00
Martin Åberg
35264cc214 SPARC: add support for the tracing subsystem
This commit implements the architecture specific parts for the
Zephyr tracing subsystem on SPARC and LEON3. It does so by calling
sys_trace_isr_enter(), sys_trace_isr_exit() and sys_trace_idle().

The logic for the ISR tracing is:
1. switch to interrupt stack
2. *call sys_trace_isr_enter()* if CONFIG_TRACING_ISR
3. call the interrupt handler
4. *call sys_trace_isr_exit()* if CONFIG_TRACING_ISR
5. switch back to thread stack

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-18 10:31:26 +01:00
Martin Åberg
a5fd0d5c0b samples: tracing: use TEST_EXTRA_STACKSIZE
Take TEST_EXTRA_STACKSIZE into account when sizing the stack for the
tracing sample tasks.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-18 10:31:26 +01:00
Meng xianglin
e696c65de1 test: context: Refine descriptions for some test cases
Add or refine comments for some test cases for readability

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2020-11-17 22:11:45 -05:00
Henrik Brix Andersen
9796313e8a tests: drivers: build_all: add build test for Xilinx drivers
Add build test for Xilinx drivers for devices which are not present on
any in-tree boards.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Henrik Brix Andersen
4e7baecb88 tests: drivers: pwm: api: add support for Xilinx AXI Timer IP
Add support for testing the Xilinx AXI Timer IP PWM controller.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Henrik Brix Andersen
c6f1469bf6 drivers: pwm: add driver for the Xilinx AXI Timer
Add PWM controller driver for the Xilinx AXI Timer v2.0 IP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Henrik Brix Andersen
b54677b289 samples: drivers: counter: alarm: add support for the Xilinx AXI Timer
Add support for the Xilinx AXI Timer IP to the counter alarm sample.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Henrik Brix Andersen
6ad1f411c3 tests: drivers: counter: basic_api: add support for Xilinx AXI Timer IP
Add support for testing the Xilinx AXI Timer IP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Henrik Brix Andersen
d31a1dc91b drivers: counter: add driver for the Xilinx AXI Timer
Add counter driver for the Xilinx AXI Timer v2.0 IP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Henrik Brix Andersen
de53643e56 dts: bindings: add bindings for the Xilinx AXI Timer
Add devicetree bindings for the Xilinx AXI Timer IP. This timer can
either be used as a counter or as a PWM controller.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Enjia Mai
a9bacf552c tests: improve test case descriptions of some interrupt APIs
To add some test case descriptions for testing irq_lock(), irq_unlock()
, irq_enable(), irq_disable().

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2020-11-17 19:25:59 -05:00
Marcin Niestroj
980636dad3 drivers: wifi: esp: support hostname configuration
Configure hostname by issuing AT+CWHOSTNAME="<hostname>" command. Do it
just after setting link address, which is used to generate hostname
postfix when CONFIG_NET_HOSTNAME_UNIQUE=y.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-11-17 19:21:43 -05:00
Marcin Niestroj
aac0f98d1d net: hostname: define public macro representing maximum hostname length
Add a macro in public header that represents maximum hostname string
length without terminating NULL character. This will allow other
modules, such as offloaded network drivers, to know how much space is
needed to allocate in order to fit whole hostname.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-11-17 19:21:43 -05:00