Make drivers multi-instance wherever possible using DT_INST_FOREACH.
This allows removing DT_HAS_DRV_INST in favor of making drivers just
do the right thing regardless of how many instances there are.
There are a few exceptions:
- SoC drivers which use CMake input files (like i2c_dw.c) or otherwise
would require more time to convert than I have at the moment. For the
sake of expediency, just inline the DT_HAS_DRV_INST expansion for
now in these cases.
- SoC drivers which are explicitly single-instance (like the nRF SAADC
driver). Again for the sake of expediency, drop a BUILD_ASSERT in
those cases to make sure the assumption that all supported SoCs have
at most one available instance is valid, failing fast otherwise.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The driver was extended so that the tests/drivers/uart/uart_basic_api
test case now passes. The following modifications were made for the
following items of the test case:
* test_uart_configure
* test_uart_config_get
The driver was missing the support to re-configure the UART at run-time
as well as to obtain the current configuration at run-time via the
.configure and .config_get hooks provided within the UART driver API.
For the flow control setting, bit (mask) definitions were added for the
Modem Control Register. Both the configuration get and set functions
come with auxiliary functions that convert configuration register bit
masks to the UART driver API's enumeration types and vice versa.
For run-time configurability, the device's data struct is required un-
conditionally, previously, it was only available whenever interrupt-
driven mode was enabled. Consequently, the device initialization was
simplified to a single call of the DEVICE_AND_API_INIT macro, as the
existance of the device's data struct is now no longer conditional.
* test_uart_fifo_fill
For the user callback function of the test case to receive the initial
'Ready to TX' indication upon which the TX FIFO is filled, it is
necessary that uart_xlnx_ps_irq_tx_enable also sets the TX FIFO empty
bit in the Interrupt Enable Register. Consequently, the same modifi-
cation applies to the irq_tx_disable function.
* test_uart_fifo_read
During inital device configuration, the RX FIFO interrupt trigger
level has to be set to 1 byte for now, as the test case doesn't poll
the incoming data in a while()-loop, therefore, it misses the CR/LF
if more than one character is in the RX FIFO at the time of the
interrupt and neither CR nor LF is the first character.
Whenever the state of an interrupt is checked by the user callback
function (uart_xlnx_ps_irq_tx_ready, uart_xlnx_ps_irq_rx_ready),
the corresponding bits are cleared in the Interrupt Status Register,
re-enabling interrupts generated by the corresponding source.
Tested on QEMU (R5, A9) and actual Zynq7000 hardware.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Fix for the UART_XLNX_PS_IRQ_CONF_FUNC macro, which wraps IRQ_CONNECT
into a function for each device instance. This macro had device
instance #0 hardcoded at one point.
Interrupt support is required for test cases using the UART_PIPE
feature on the upcoming Cortex-A9 targets (QEMU/Zynq-7000).
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
The build infrastructure should not be adding the drivers subdirectory
to the include path. Fix the legacy uses that depended on that
addition.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.
Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.
Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
