Now that we generate a header that extern's all possible devicetree
based device struct we can remove DEVICE_DT_DECLARE and
DEVICE_DT_INST_DECLARE as they aren't needed anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Disable RTC WDT enabled (by default) by 2nd stage bootloader in ESP-IDF.
This WDT timer ensures correct hand-over and startup sequence from
bootloader to application.
Enabling bootloader caused system clock initialization to fail
when clock rate is greater then 80MHz. This also fixes
esp32 clock source code.
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
Since the PU power rail of i2c bus might be gone at the initial state
after ec powered up, we might have no chance to get STOP condition. This
is because no i2c transactions occurred before its power rail is
restored. But it's crucial to reset the whole i2c module after i2c bus
is back to the idle state.
The original test suite for i2c recovery mechanism didn't consider this
case that initial i2c bus is low before ec powered on. Hence, this CL
fixed this symptom by:
1. Force i2c modules must proceed 'reset' step no matter we received
STOP condition or not.
2. Use Boolean for condition check to prevent misusage and meet MISRA.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The NPCX SMB modules provides full support for a two-wire SMBus/I2C
synchronous serial interface. Each SMBus/I2C interface is a two-wire
serial interface that is compatible with both Intel SMBus and Philips
I2C physical layer. There are 8 SMBus modules and 10 buses in NPCX7
series.
In NPCX7 series, the SMB5 and SMB6 modules contain a two-way switch to
support two separate SMBus/I2C buses (ports) with one SMB module
(controller) Please refer Section 4.7.2 in the datasheet. In order to
support it, this CL seperates the i2c driver into port and controller
drivers. The controller driver is in charge of i2c module operations
and internal state machine. The port driver is in charge of pin-mux
and connection between Zehpyr i2c api interface and controller driver.
All of modules have separate 32-byte transmit FIFO and 32-byte receive
FIFO buffers. These FIFO buffers reduce firmware overhead during long
SMBus transactions by allowing the Core to write or read more than one
data byte at a time to/from the SMB module.
The CL also includes:
— Add npcx i2c port/controller device tree declarations.
— Zephyr i2c api implementation.
— Add "i2c-0" aliases in npcx7m6fb.dts for i2c test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add an additional 4 ports for upcoming Arm based server that will have a
total of 12 I2C ports.
Similar to the original 8 ports, these additional 4 ports will not be
enabled unless specified at configuration time.
Signed-off-by: Dan Kalowsky <dkalowsky@amperecomputing.com>
This reverts commit cabbd916cf.
This is considered to be useful enough that it should be restored
as a stable Zephyr API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The i2c controller reset sequence is revamped to address
i2c failures which require a reset. Also, more time is
given for i2c slave device to read data by waiting longer.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE
and use PM_ as the prefix for all PM related Kconfigs
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
imx_msg transmission size type is uint32_t:
changed imx_read and imx_write signature accordingly.
Removed also two unused variables.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
When there is no data to send (e.g. i2c message with NULL buffer and
len=0), i2c_imx driver locks itself in isr handling forever.
So if there is no data to send, only device's address must be written
on bus. This fixes i2c_shell's scan command on both imx7 and imx6sx.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
currently pcie_get_mbar only returns the physical address.
This changes the function to return the size of the mbar and
the flags (IO Bar vs MEM BAR).
Signed-off-by: Maximilian Bachmann <m.bachmann@acontis.com>
The SAM4L have a unique I2C driver. It shares simultaneously pins for
both master and slave controllers. Each controller have their own
instance. This introduces the TWIM controller that handles only the
master part.
The TWIM controller uses no copy and the driver was prepared to work
with both 7 and 10 bits address. The controller can handler up to 256
bytes for a single transfer allowing long data communication with
almost no CPU intervention.
The driver was wrote specifically to Zephyr. It receives a transfer
list of from upper layers to a specific device on the bus. It programs
the first and second transfer, if it exists, before start. At end of
full read/write interrupt, will program the next data block. This
process repeats until all transfers be executed. The driver uses
interrupt from TWIM to check for erros or program next tranfer.
Future work can enable low power mode on the driver allowing long
transfers with low power consumption.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Take advantage of the new pcie_alloc_irq() API so that we get a valid
IRQ on platforms where the IRQ register is not pre-populated with a
valid value up front.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Neither i2c_transfer in i2c.h nor i2c_mcux_transfer in i2c_mcux.c
have any sort of locking. If e.g. an i2c eprom is updated using a
shell and simultaneously another thread access a lm75 then one
of the two transfers will fail or produce a random result.
This changes addresses this issue by that all i2c_msgs of one
i2c_transfer are completed before allowing a subsequent transfer
to start.
The code has been validated on a FRDM_K64F.
Signed-off-by: Andreas Dröscher <github@anticat.ch>
For drivers that support CONFIG_DEVICE_POWER_MANAGEMENT there are some
cases that look like:
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
DEVICE_DEFINE()
#else
DEVICE_AND_API_INIT()
#endif
There is no need to special case this as the pm_control_fn argument to
DEVICE_DEFINE will just be ignored in the
!CONFIG_DEVICE_POWER_MANAGEMENT case. So we can cleanup the code a
little and remove the #else cases for the drivers that do this.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replaces all existing variants of value clamping with the MIN and MAX
macros with the CLAMP macro.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
This is to make the gpio-i2c initialization occur after the GPIO pin
clock initialization.
Signed-off-by: Cassini Zhuang <cassini.zhuang@hansonggroup.com>
Set stm32_dt_pinctrl_configure function as the unique entry point
to STM32 DT pinctrl management.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move pinctrl remap functions out of stm32f1 definition in order
to get it available to all series.
Allows use of more IS_ENABLED macros in calling drivers and make
code more readable.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The only user of the I2C instances is the esp32 driver. Move the
Kconfig symbols down to the esp32 Kconfig for the instances it needs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to be in line with other DT_INST macros in zephyr code base,
swap the arguments order in following macro definitions:
*ST_STM32_DT_PINCTRL
*ST_STM32_DT_INST_PINCTRL
Update the users accordingly.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to pcintrl configuration using pcintrl helper
macros.
Pinctrl init sequence has to be done before bus_mutex initialization.
Driver dts bindings are updated to reflect usage of pinctrl-x
properties
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Described in ES096 2.14.7,
F101X8/B, F102X8/B, and F103X8/B
might not be able to enter i2c master mode on power-up.
Force reset help to mitigate this issue.
Signed-off-by: Yiyu Zhu <smallzzy@outlook.com>
HAS_DTS_I2C is now selected by I2C and
always used as I2C && HAS_DTS_I2C.
It could then be purely removed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When this code was moved from a standalone sample to an optional shell
feature the documentation on how this works and caveats was lost. Put
it back so it can be referenced in issue explanations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
These are all the case that coccinelle cannot find as they are inside
macro declarations.
Fixed via:
git grep -rlz -E "\(struct device \*" |
xargs -0 sed -i 's/(struct device/(const struct device/g'
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In all of these drivers, passing the device's data was sufficient as
only the data is being used by the HAL callback function then.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add an emulation controller which routes I2C traffic to attached
emulators depending on the I2C address selected. This allows drivers
for I2C peripherals to be tested on systems that don't have that
peripheral attached, with the emulator handling the I2C traffic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Reset the i2c device when read or write return with an error
code. This is to bring the i2c hardware back into a known
state after a hardware error (like EMC spikes) caused
the device to lock up.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The driver must be able to read from this pin as well as write to it.
If the driver doesn't support bidirectional configuration then fall
back to the legacy mode.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
In case optional timings property has been defined in DT, let's use it
and look for a matching peripheral clock and i2c bus clock so that
timing value is used instead of using runtime algorithm.
If matching the current configuration, the value will be set directly to
the I2C_TIMINGR register through the LL API.
This property is only valid for I2C V2 peripheral, so the timing config
structure member is only added in case of CONFIG_I2C_STM32_V2. Also the
initialization of the member is done conditionnaly, only in case
it is defined in DT, otherwise timings table will be empty.
Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
-Wimplicit-fallthrough=2 requires a fallthrough comment or a compiler
to tells gcc that this happens intentionally.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
As a general rule devicetree properties should correspond to hardware
description or configuration. In cases where a Zephyr driver receives
instance-specific configuration data from a devicetree property that
property should be marked as being Zephyr-specific. Rename
concat-buf-size to zephyr,concat-buf-size to follow this guideline.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
