drivers/pinctrl: stm32f1: Provide a function which centralize remap
Centralize AFIO remapping into one single function. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
parent
62a5179b7b
commit
0143b5e3de
7 changed files with 221 additions and 225 deletions
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@ -421,37 +421,7 @@ static int can_stm32_init(const struct device *dev)
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return remap;
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}
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/* A valid remapping configuration is provided */
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/* Apply remapping before proceeding with pin configuration */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
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switch ((uint32_t)cfg->can) {
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#if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
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case DT_REG_ADDR(DT_NODELABEL(can1)):
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if (remap == REMAP_1) {
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/* PB8/PB9 */
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LL_GPIO_AF_RemapPartial2_CAN1();
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} else if (remap == REMAP_2) {
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/* PD0/PD1 */
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LL_GPIO_AF_RemapPartial3_CAN1();
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} else {
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/* NO_REMAP: PA11/PA12 */
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LL_GPIO_AF_RemapPartial1_CAN1();
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}
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break;
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#endif
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#if defined(AFIO_MAPR_CAN2_REMAP)
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case DT_REG_ADDR(DT_NODELABEL(can2)):
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if (remap == REMAP_1) {
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/* PB5/PB6 */
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LL_GPIO_AF_EnableRemap_CAN2();
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} else {
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/* PB12/PB13 */
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LL_GPIO_AF_DisableRemap_CAN2();
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}
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break;
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#endif
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}
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stm32_dt_pinctrl_remap_set((uint32_t)cfg->can, remap);
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
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stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len);
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@ -198,21 +198,7 @@ static int i2c_stm32_init(const struct device *dev)
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return remap;
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}
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/* A valid remapping configuration is provided */
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/* Apply remapping before proceeding with pin configuration */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
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switch ((uint32_t)cfg->i2c) {
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay)
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case DT_REG_ADDR(DT_NODELABEL(i2c1)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_EnableRemap_I2C1();
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} else {
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LL_GPIO_AF_DisableRemap_I2C1();
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}
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break;
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#endif
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}
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stm32_dt_pinctrl_remap_set((uint32_t)cfg->i2c, remap);
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
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stm32_dt_pinctrl_configure(cfg->pinctrl_list,
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@ -211,6 +211,214 @@ int stm32_dt_pinctrl_remap_check(const struct soc_gpio_pinctrl *pinctrl,
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return remap;
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}
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void stm32_dt_pinctrl_remap_set(uint32_t base, int remap)
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{
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/* A valid remapping configuration is provided */
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/* Apply remapping before proceeding with pin configuration */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
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switch (base) {
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#if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
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case DT_REG_ADDR(DT_NODELABEL(can1)):
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if (remap == REMAP_1) {
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/* PB8/PB9 */
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LL_GPIO_AF_RemapPartial2_CAN1();
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} else if (remap == REMAP_2) {
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/* PD0/PD1 */
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LL_GPIO_AF_RemapPartial3_CAN1();
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} else {
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/* NO_REMAP: PA11/PA12 */
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LL_GPIO_AF_RemapPartial1_CAN1();
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}
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break;
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#endif
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#if defined(AFIO_MAPR_CAN2_REMAP)
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case DT_REG_ADDR(DT_NODELABEL(can2)):
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if (remap == REMAP_1) {
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/* PB5/PB6 */
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LL_GPIO_AF_EnableRemap_CAN2();
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} else {
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/* PB12/PB13 */
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LL_GPIO_AF_DisableRemap_CAN2();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay)
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case DT_REG_ADDR(DT_NODELABEL(i2c1)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_EnableRemap_I2C1();
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} else {
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LL_GPIO_AF_DisableRemap_I2C1();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers1), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers1)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial_TIM1();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM1();
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} else {
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LL_GPIO_AF_DisableRemap_TIM1();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers2), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers2)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial1_TIM2();
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} else if (remap == REMAP_2) {
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LL_GPIO_AF_RemapPartial2_TIM2();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM2();
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} else {
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LL_GPIO_AF_DisableRemap_TIM2();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers3), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers3)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial_TIM3();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM3();
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} else {
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LL_GPIO_AF_DisableRemap_TIM3();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers4), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers4)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM4();
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} else {
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LL_GPIO_AF_DisableRemap_TIM4();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers9), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers9)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM9();
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} else {
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LL_GPIO_AF_DisableRemap_TIM9();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers10), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers10)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM10();
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} else {
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LL_GPIO_AF_DisableRemap_TIM10();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers11), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers11)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM11();
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} else {
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LL_GPIO_AF_DisableRemap_TIM11();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers12), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers12)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM12();
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} else {
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LL_GPIO_AF_DisableRemap_TIM12();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers13), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers13)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM13();
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} else {
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LL_GPIO_AF_DisableRemap_TIM13();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers14), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers14)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM14();
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} else {
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LL_GPIO_AF_DisableRemap_TIM14();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers15), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers15)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM15();
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} else {
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LL_GPIO_AF_DisableRemap_TIM15();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers16), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers16)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM16();
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} else {
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LL_GPIO_AF_DisableRemap_TIM16();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers17), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers17)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM17();
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} else {
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LL_GPIO_AF_DisableRemap_TIM17();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay)
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case DT_REG_ADDR(DT_NODELABEL(usart1)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_EnableRemap_USART1();
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} else {
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LL_GPIO_AF_DisableRemap_USART1();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay)
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case DT_REG_ADDR(DT_NODELABEL(usart2)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_EnableRemap_USART2();
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} else {
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LL_GPIO_AF_DisableRemap_USART2();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart3), okay)
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case DT_REG_ADDR(DT_NODELABEL(usart3)):
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if (remap == REMAP_2) {
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LL_GPIO_AF_EnableRemap_USART3();
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} else if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial_USART3();
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} else {
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LL_GPIO_AF_DisableRemap_USART3();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay)
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case DT_REG_ADDR(DT_NODELABEL(spi1)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_EnableRemap_SPI1();
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} else {
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LL_GPIO_AF_DisableRemap_SPI1();
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}
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break;
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#endif
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}
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
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/**
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@ -161,6 +161,14 @@ void stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl,
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int stm32_dt_pinctrl_remap_check(const struct soc_gpio_pinctrl *pinctrl,
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size_t list_size);
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/**
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* @brief
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*
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* @param
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* @param
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*/
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void stm32_dt_pinctrl_remap_set(uint32_t base, int remap);
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/* common pinmux device name for all STM32 chips */
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#define STM32_PINMUX_NAME "stm32-pinmux"
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@ -294,135 +294,7 @@ static int pwm_stm32_init(const struct device *dev)
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return remap;
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}
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
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switch ((uint32_t)cfg->timer) {
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers1), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers1)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial_TIM1();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM1();
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} else {
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LL_GPIO_AF_DisableRemap_TIM1();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers2), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers2)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial1_TIM2();
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} else if (remap == REMAP_2) {
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LL_GPIO_AF_RemapPartial2_TIM2();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM2();
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} else {
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LL_GPIO_AF_DisableRemap_TIM2();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers3), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers3)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial_TIM3();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM3();
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} else {
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LL_GPIO_AF_DisableRemap_TIM3();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers4), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers4)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM4();
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} else {
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LL_GPIO_AF_DisableRemap_TIM4();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers9), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers9)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM9();
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} else {
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LL_GPIO_AF_DisableRemap_TIM9();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers10), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers10)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM10();
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} else {
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LL_GPIO_AF_DisableRemap_TIM10();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers11), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers11)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM11();
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} else {
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LL_GPIO_AF_DisableRemap_TIM11();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers12), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers12)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM12();
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} else {
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LL_GPIO_AF_DisableRemap_TIM12();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers13), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers13)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM13();
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} else {
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LL_GPIO_AF_DisableRemap_TIM13();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers14), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers14)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM14();
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} else {
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LL_GPIO_AF_DisableRemap_TIM14();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers15), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers15)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM15();
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} else {
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LL_GPIO_AF_DisableRemap_TIM15();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers16), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers16)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM16();
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} else {
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LL_GPIO_AF_DisableRemap_TIM16();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers17), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers17)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM17();
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} else {
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LL_GPIO_AF_DisableRemap_TIM17();
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}
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break;
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#endif
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}
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stm32_dt_pinctrl_remap_set((uint32_t)cfg->timer, remap);
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
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stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len);
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@ -689,41 +689,7 @@ static int uart_stm32_init(const struct device *dev)
|
|||
return remap;
|
||||
}
|
||||
|
||||
/* A valid remapping configuration is provided */
|
||||
/* Apply remapping before proceeding with pin configuration */
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
|
||||
|
||||
switch ((uint32_t)UART_STRUCT(dev)) {
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay)
|
||||
case DT_REG_ADDR(DT_NODELABEL(usart1)):
|
||||
if (remap == REMAP_1) {
|
||||
LL_GPIO_AF_EnableRemap_USART1();
|
||||
} else {
|
||||
LL_GPIO_AF_DisableRemap_USART1();
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay)
|
||||
case DT_REG_ADDR(DT_NODELABEL(usart2)):
|
||||
if (remap == REMAP_1) {
|
||||
LL_GPIO_AF_EnableRemap_USART2();
|
||||
} else {
|
||||
LL_GPIO_AF_DisableRemap_USART2();
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart3), okay)
|
||||
case DT_REG_ADDR(DT_NODELABEL(usart3)):
|
||||
if (remap == REMAP_2) {
|
||||
LL_GPIO_AF_EnableRemap_USART3();
|
||||
} else if (remap == REMAP_1) {
|
||||
LL_GPIO_AF_RemapPartial_USART3();
|
||||
} else {
|
||||
LL_GPIO_AF_DisableRemap_USART3();
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
stm32_dt_pinctrl_remap_set((uint32_t)UART_STRUCT(dev), remap);
|
||||
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
|
||||
|
||||
stm32_dt_pinctrl_configure(config->pinctrl_list,
|
||||
|
|
|
@ -809,21 +809,7 @@ static int spi_stm32_init(const struct device *dev)
|
|||
return remap;
|
||||
}
|
||||
|
||||
/* A valid remapping configuration is provided */
|
||||
/* Apply remapping before proceeding with pin configuration */
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
|
||||
|
||||
switch ((uint32_t)cfg->spi) {
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay)
|
||||
case DT_REG_ADDR(DT_NODELABEL(spi1)):
|
||||
if (remap == REMAP_1) {
|
||||
LL_GPIO_AF_EnableRemap_SPI1();
|
||||
} else {
|
||||
LL_GPIO_AF_DisableRemap_SPI1();
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
stm32_dt_pinctrl_remap_set((uint32_t)cfg->spi, remap);
|
||||
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
|
||||
|
||||
stm32_dt_pinctrl_configure(cfg->pinctrl_list,
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue