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drivers/pinctrl: stm32f1: Provide a function which centralize remap

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Centralize AFIO remapping into one single function.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2020-10-13 16:44:13 +02:00 • committed by Kumar Gala
commit 0143b5e3de
7 changed files with 221 additions and 225 deletions
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32
drivers/can/can_stm32.c
View file

@ -421,37 +421,7 @@ static int can_stm32_init(const struct device *dev)
return remap;
}
/* A valid remapping configuration is provided */
/* Apply remapping before proceeding with pin configuration */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
switch ((uint32_t)cfg->can) {
#if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
case DT_REG_ADDR(DT_NODELABEL(can1)):
if (remap == REMAP_1) {
/* PB8/PB9 */
LL_GPIO_AF_RemapPartial2_CAN1();
} else if (remap == REMAP_2) {
/* PD0/PD1 */
LL_GPIO_AF_RemapPartial3_CAN1();
} else {
/* NO_REMAP: PA11/PA12 */
LL_GPIO_AF_RemapPartial1_CAN1();
}
break;
#endif
#if defined(AFIO_MAPR_CAN2_REMAP)
case DT_REG_ADDR(DT_NODELABEL(can2)):
if (remap == REMAP_1) {
/* PB5/PB6 */
LL_GPIO_AF_EnableRemap_CAN2();
} else {
/* PB12/PB13 */
LL_GPIO_AF_DisableRemap_CAN2();
}
break;
#endif
}
stm32_dt_pinctrl_remap_set((uint32_t)cfg->can, remap);
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len);

16
drivers/i2c/i2c_ll_stm32.c
View file

@ -198,21 +198,7 @@ static int i2c_stm32_init(const struct device *dev)
return remap;
}
/* A valid remapping configuration is provided */
/* Apply remapping before proceeding with pin configuration */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
switch ((uint32_t)cfg->i2c) {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay)
case DT_REG_ADDR(DT_NODELABEL(i2c1)):
if (remap == REMAP_1) {
LL_GPIO_AF_EnableRemap_I2C1();
} else {
LL_GPIO_AF_DisableRemap_I2C1();
}
break;
#endif
}
stm32_dt_pinctrl_remap_set((uint32_t)cfg->i2c, remap);
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
stm32_dt_pinctrl_configure(cfg->pinctrl_list,

208
drivers/pinmux/stm32/pinmux_stm32.c
View file

@ -211,6 +211,214 @@ int stm32_dt_pinctrl_remap_check(const struct soc_gpio_pinctrl *pinctrl,
return remap;
}
void stm32_dt_pinctrl_remap_set(uint32_t base, int remap)
{
/* A valid remapping configuration is provided */
/* Apply remapping before proceeding with pin configuration */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
switch (base) {
#if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
case DT_REG_ADDR(DT_NODELABEL(can1)):
if (remap == REMAP_1) {
/* PB8/PB9 */
LL_GPIO_AF_RemapPartial2_CAN1();
} else if (remap == REMAP_2) {
/* PD0/PD1 */
LL_GPIO_AF_RemapPartial3_CAN1();
} else {
/* NO_REMAP: PA11/PA12 */
LL_GPIO_AF_RemapPartial1_CAN1();
}
break;
#endif
#if defined(AFIO_MAPR_CAN2_REMAP)
case DT_REG_ADDR(DT_NODELABEL(can2)):
if (remap == REMAP_1) {
/* PB5/PB6 */
LL_GPIO_AF_EnableRemap_CAN2();
} else {
/* PB12/PB13 */
LL_GPIO_AF_DisableRemap_CAN2();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay)
case DT_REG_ADDR(DT_NODELABEL(i2c1)):
if (remap == REMAP_1) {
LL_GPIO_AF_EnableRemap_I2C1();
} else {
LL_GPIO_AF_DisableRemap_I2C1();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers1), okay)
case DT_REG_ADDR(DT_NODELABEL(timers1)):
if (remap == REMAP_1) {
LL_GPIO_AF_RemapPartial_TIM1();
} else if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM1();
} else {
LL_GPIO_AF_DisableRemap_TIM1();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers2), okay)
case DT_REG_ADDR(DT_NODELABEL(timers2)):
if (remap == REMAP_1) {
LL_GPIO_AF_RemapPartial1_TIM2();
} else if (remap == REMAP_2) {
LL_GPIO_AF_RemapPartial2_TIM2();
} else if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM2();
} else {
LL_GPIO_AF_DisableRemap_TIM2();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers3), okay)
case DT_REG_ADDR(DT_NODELABEL(timers3)):
if (remap == REMAP_1) {
LL_GPIO_AF_RemapPartial_TIM3();
} else if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM3();
} else {
LL_GPIO_AF_DisableRemap_TIM3();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers4), okay)
case DT_REG_ADDR(DT_NODELABEL(timers4)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM4();
} else {
LL_GPIO_AF_DisableRemap_TIM4();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers9), okay)
case DT_REG_ADDR(DT_NODELABEL(timers9)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM9();
} else {
LL_GPIO_AF_DisableRemap_TIM9();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers10), okay)
case DT_REG_ADDR(DT_NODELABEL(timers10)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM10();
} else {
LL_GPIO_AF_DisableRemap_TIM10();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers11), okay)
case DT_REG_ADDR(DT_NODELABEL(timers11)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM11();
} else {
LL_GPIO_AF_DisableRemap_TIM11();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers12), okay)
case DT_REG_ADDR(DT_NODELABEL(timers12)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM12();
} else {
LL_GPIO_AF_DisableRemap_TIM12();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers13), okay)
case DT_REG_ADDR(DT_NODELABEL(timers13)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM13();
} else {
LL_GPIO_AF_DisableRemap_TIM13();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers14), okay)
case DT_REG_ADDR(DT_NODELABEL(timers14)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM14();
} else {
LL_GPIO_AF_DisableRemap_TIM14();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers15), okay)
case DT_REG_ADDR(DT_NODELABEL(timers15)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM15();
} else {
LL_GPIO_AF_DisableRemap_TIM15();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers16), okay)
case DT_REG_ADDR(DT_NODELABEL(timers16)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM16();
} else {
LL_GPIO_AF_DisableRemap_TIM16();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers17), okay)
case DT_REG_ADDR(DT_NODELABEL(timers17)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM17();
} else {
LL_GPIO_AF_DisableRemap_TIM17();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay)
case DT_REG_ADDR(DT_NODELABEL(usart1)):
if (remap == REMAP_1) {
LL_GPIO_AF_EnableRemap_USART1();
} else {
LL_GPIO_AF_DisableRemap_USART1();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay)
case DT_REG_ADDR(DT_NODELABEL(usart2)):
if (remap == REMAP_1) {
LL_GPIO_AF_EnableRemap_USART2();
} else {
LL_GPIO_AF_DisableRemap_USART2();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart3), okay)
case DT_REG_ADDR(DT_NODELABEL(usart3)):
if (remap == REMAP_2) {
LL_GPIO_AF_EnableRemap_USART3();
} else if (remap == REMAP_1) {
LL_GPIO_AF_RemapPartial_USART3();
} else {
LL_GPIO_AF_DisableRemap_USART3();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay)
case DT_REG_ADDR(DT_NODELABEL(spi1)):
if (remap == REMAP_1) {
LL_GPIO_AF_EnableRemap_SPI1();
} else {
LL_GPIO_AF_DisableRemap_SPI1();
}
break;
#endif
}
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
/**

8
drivers/pinmux/stm32/pinmux_stm32.h
View file

@ -161,6 +161,14 @@ void stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl,
int stm32_dt_pinctrl_remap_check(const struct soc_gpio_pinctrl *pinctrl,
size_t list_size);
/**
* @brief
*
* @param
* @param
*/
void stm32_dt_pinctrl_remap_set(uint32_t base, int remap);
/* common pinmux device name for all STM32 chips */
#define STM32_PINMUX_NAME "stm32-pinmux"

130
drivers/pwm/pwm_stm32.c
View file

@ -294,135 +294,7 @@ static int pwm_stm32_init(const struct device *dev)
return remap;
}
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
switch ((uint32_t)cfg->timer) {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers1), okay)
case DT_REG_ADDR(DT_NODELABEL(timers1)):
if (remap == REMAP_1) {
LL_GPIO_AF_RemapPartial_TIM1();
} else if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM1();
} else {
LL_GPIO_AF_DisableRemap_TIM1();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers2), okay)
case DT_REG_ADDR(DT_NODELABEL(timers2)):
if (remap == REMAP_1) {
LL_GPIO_AF_RemapPartial1_TIM2();
} else if (remap == REMAP_2) {
LL_GPIO_AF_RemapPartial2_TIM2();
} else if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM2();
} else {
LL_GPIO_AF_DisableRemap_TIM2();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers3), okay)
case DT_REG_ADDR(DT_NODELABEL(timers3)):
if (remap == REMAP_1) {
LL_GPIO_AF_RemapPartial_TIM3();
} else if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM3();
} else {
LL_GPIO_AF_DisableRemap_TIM3();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers4), okay)
case DT_REG_ADDR(DT_NODELABEL(timers4)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM4();
} else {
LL_GPIO_AF_DisableRemap_TIM4();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers9), okay)
case DT_REG_ADDR(DT_NODELABEL(timers9)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM9();
} else {
LL_GPIO_AF_DisableRemap_TIM9();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers10), okay)
case DT_REG_ADDR(DT_NODELABEL(timers10)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM10();
} else {
LL_GPIO_AF_DisableRemap_TIM10();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers11), okay)
case DT_REG_ADDR(DT_NODELABEL(timers11)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM11();
} else {
LL_GPIO_AF_DisableRemap_TIM11();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers12), okay)
case DT_REG_ADDR(DT_NODELABEL(timers12)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM12();
} else {
LL_GPIO_AF_DisableRemap_TIM12();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers13), okay)
case DT_REG_ADDR(DT_NODELABEL(timers13)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM13();
} else {
LL_GPIO_AF_DisableRemap_TIM13();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers14), okay)
case DT_REG_ADDR(DT_NODELABEL(timers14)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM14();
} else {
LL_GPIO_AF_DisableRemap_TIM14();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers15), okay)
case DT_REG_ADDR(DT_NODELABEL(timers15)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM15();
} else {
LL_GPIO_AF_DisableRemap_TIM15();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers16), okay)
case DT_REG_ADDR(DT_NODELABEL(timers16)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM16();
} else {
LL_GPIO_AF_DisableRemap_TIM16();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers17), okay)
case DT_REG_ADDR(DT_NODELABEL(timers17)):
if (remap == REMAP_FULL) {
LL_GPIO_AF_EnableRemap_TIM17();
} else {
LL_GPIO_AF_DisableRemap_TIM17();
}
break;
#endif
}
stm32_dt_pinctrl_remap_set((uint32_t)cfg->timer, remap);
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len);

36
drivers/serial/uart_stm32.c
View file

@ -689,41 +689,7 @@ static int uart_stm32_init(const struct device *dev)
return remap;
}
/* A valid remapping configuration is provided */
/* Apply remapping before proceeding with pin configuration */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
switch ((uint32_t)UART_STRUCT(dev)) {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay)
case DT_REG_ADDR(DT_NODELABEL(usart1)):
if (remap == REMAP_1) {
LL_GPIO_AF_EnableRemap_USART1();
} else {
LL_GPIO_AF_DisableRemap_USART1();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay)
case DT_REG_ADDR(DT_NODELABEL(usart2)):
if (remap == REMAP_1) {
LL_GPIO_AF_EnableRemap_USART2();
} else {
LL_GPIO_AF_DisableRemap_USART2();
}
break;
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart3), okay)
case DT_REG_ADDR(DT_NODELABEL(usart3)):
if (remap == REMAP_2) {
LL_GPIO_AF_EnableRemap_USART3();
} else if (remap == REMAP_1) {
LL_GPIO_AF_RemapPartial_USART3();
} else {
LL_GPIO_AF_DisableRemap_USART3();
}
break;
#endif
}
stm32_dt_pinctrl_remap_set((uint32_t)UART_STRUCT(dev), remap);
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
stm32_dt_pinctrl_configure(config->pinctrl_list,

16
drivers/spi/spi_ll_stm32.c
View file

@ -809,21 +809,7 @@ static int spi_stm32_init(const struct device *dev)
return remap;
}
/* A valid remapping configuration is provided */
/* Apply remapping before proceeding with pin configuration */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
switch ((uint32_t)cfg->spi) {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay)
case DT_REG_ADDR(DT_NODELABEL(spi1)):
if (remap == REMAP_1) {
LL_GPIO_AF_EnableRemap_SPI1();
} else {
LL_GPIO_AF_DisableRemap_SPI1();
}
break;
#endif
}
stm32_dt_pinctrl_remap_set((uint32_t)cfg->spi, remap);
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
stm32_dt_pinctrl_configure(cfg->pinctrl_list,