Both arch_k_cycle_get_32() and z_tsc_read() are marked inline.
However, compiler may decide not to inline them which would put
them in the generic text section. Pin them in physical memory
as they are frequently used functions to avoid page fault costs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Although they are marked as an inline functions, the compiler
may decide not to inline them which would result in them being
outside the pinned text section. Since these functions are
required for userspace to work correctly, pin them in physical
memory.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Although they are marked as an inline functions, the compiler
may decide not to inline them which would result in them being
outside the pinned text section. Since these functions are
required for userspace to work correctly, pin them in physical
memory. This also applies to k_is_user_context().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows memory partitions to be put into the pinned
section so they are available during boot. For example,
the stack guard (in libc partition) is needed during boot
but before the paging mechanism is initialized. Without
pinning it in physical memory, it would fault in early
boot process.
A new cmake property app_smem,pinned_partitions is
introduced so that additional partitions can be pinned
if needed.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This introduces two new macros K_THREAD_PINNED_STACK_DEFINE()
and K_THREAD_PINNED_STACK_ARRAY_DEFINE() to define thread
stack and thread stack array in pinned section.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This groups the device state variables in their own linker section.
This is needed for demand paging as these variables are needed
during boot where the paging mechanism has not been initialized.
These variables need to be in the pinned section so they can
be accessed during boot.
Note that if device PM is not enabled, the device state variables
are put into BSS. So we need to pin these.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This attaches a unique section attribute for each mem slab
buffer defined with K_MEM_SLAB_DEFINE(). This allows them
to be placed as needed via linker scripts. This is useful
for demand paging as developers can choose which memory
slab buffer is pinned in memory.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This attaches a unique section attribute for each kheap
buffer defined with K_HEAP_DEFINE(). This allows them
to be placed as needed via linker scripts. This is useful
for demand paging as developers can choose which can be
pinned in memory.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a new __noinit_named() macro which can be used to
attach named section attributes for symbols. The original
__noinit creates a section attribute with source file name
and a sequential counter. This simply replaces the counter
with the supplied name. This is useful for demand paging
as developers can choose which symbols is pinned memory.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The channels list were originally meant to be used
for multiple bt_iso_chan per iso connect (bt_conn), but
that is not the case for the current API, and won't be
going forward, so the use of the list has been removed.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Delete the "generated_dts_board.h" file which was renamed to
devicetree.h a long time ago and was kept for compatibility.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
To ensure that an off-tree toolchain gets the toolchain/other.h header
included, such that it can include the correct header for the
toolchain via the other.h, the define __TOOLCHAIN_CUSTOM__ will be set
when ever the cmake flag TOOLCHAIN_USE_CUSTOM is set.
An off-tree toolchain needs to set the set(TOOLCHAIN_USE_CUSTOM 1) in
the off-tree generic.cmake and/or target.cmake, in order for the
include/other.h to be included. The generic.cmake and target.cmake will
be under ${TOOLCHAIN_ROOT}/cmake/toolchain/${ZEPHYR_TOOLCHAIN_VARIANT}/
As the TOOLCHAIN_USE_CUSTOM is only set for off-tree toolchains, this
has no impact on in-tree toolchains and their functionality.
Fixes zephyrproject-rtos#36117
Signed-off-by: Danny Oerndrup <daor@demant.com>
Add support for setting initial values in bt_vcs_register_param
when registering a VCS service
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Inform that the queue has to be initialized in zeroed memory or with
the k_work_queue_init before use.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
k_work_queue_start receives a struct that is expected to be
uninitialized (zeroed). Otherwise the behavior is undefined.
Following the Zephyr semantics, this pr introduce a new init function
for this struct.
Fixes#36865
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Adds an API to query and visit supported devices. Follows the example
set by the required devices API.
Implements #37793.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add supported device information to the device `handles` array. This
enables API's to iterate over supported devices for power management
purposes.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Force the inclusion of a `DEVICE_HANDLE_SEP` at the end of the
devicetree dependency section of the array. This lets us simplify the
implementation of `device_required_handles_get`, as there is only one
symbol the section ends with.
This does not use any extra ROM as the array is padded out to the
original size with `DEVICE_HANDLE_ENDS` anyway.
Also adds a description of the array format where the array is
instantiated.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Optimize the handles array by making the following observations:
* The devicetree ordinal at index 0 in pass1 is discarded by
gen_handles.py, and therefore does not appear in the pass2 array.
* gen_handles.py does not need `DEVICE_HANDLE_ENDS` to determine the
end of the handle array, as that information is present in the .elf.
Therefore, instead of replacing the devicetree ordinal with an
additional `DEVICE_HANDLE_ENDS` at the end (to preserve lengths), we
can simply move the ordinal to the end and have it be the original
`DEVICE_HANDLE_ENDS` symbol. This reduces the size of the array by
one handle per device (2 bytes).
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This contains accessor macros for getting phandles out of pinctrl
properties by name and index. As usual, the representation in C for a
phandle is a node identifier.
Add these new macros:
- DT_PINCTRL_BY_IDX(node_id, pc_idx, idx): phandle at index idx
in the pinctrl-<pc_idx> property
- DT_PINCTRL_0(node_id, idx): pinctrl-0 convenience for the same
- DT_PINCTRL_BY_NAME(node_id, name, idx): phandle at index idx
in the pinctrl property named 'name'
- DT_PINCTRL_NAME_TO_IDX(node_id, name): convert a pinctrl property
name to its index number
- DT_NUM_PINCTRLS_BY_IDX(node_id, pc_idx): number of phandles in
pinctrl-<pc_idx>
- DT_NUM_PINCTRLS_BY_NAME(node_id, name): number of phandles in a
named pinctrl property
- DT_NUM_PINCTRL_STATES(node_id): total number of pinctrl-<pc_idx>
properties
- DT_PINCTRL_HAS_IDX(node_id, pc_idx): does pinctrl-<pc_idx> exist?
- DT_PINCTRL_HAS_NAME(node_id, name): does a named pinctrl property
exist?
- DT_PINCTRL_IDX_TO_NAME_TOKEN(node_id, pc_idx): convert a pinctrl
index to its name as a token, similar to DT_STRING_TOKEN()
- DT_PINCTRL_IDX_TO_NAME_UPPER_TOKEN(node_id, pc_idx): like
DT_PINCTRL_IDX_TO_NAME_TOKEN, but with an uppercase result
As well as DT_DRV_INST equivalents, which take inst wherever node_id
appears above:
- DT_INST_PINCTRL_BY_IDX()
- DT_INST_PINCTRL_0()
- DT_INST_PINCTRL_BY_NAME()
- DT_INST_PINCTRL_NAME_TO_IDX()
- DT_INST_NUM_PINCTRLS_BY_IDX()
- DT_INST_NUM_PINCTRLS_BY_NAME()
- DT_INST_NUM_PINCTRL_STATES()
- DT_INST_PINCTRL_HAS_IDX()
- DT_INST_PINCTRL_HAS_NAME()
- DT_INST_PINCTRL_IDX_TO_NAME_TOKEN()
- DT_INST_PINCTRL_IDX_TO_NAME_UPPER_TOKEN()
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Move the IDT_LIST memory region to the location recommended by
`intlist.ld`. The documentation specifies that this region should not
overlap other regions, and there is no guarantee that the area after the
`SRAM` region is not used. The end of the address space is much less
likely to be a valid RAM address.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
These constants are based on (i.e. exactly as) the
recommended values for regular (i.e. non-periodic)
advertising.
The GAP spec does not actually specifiy these numbers (or any
numbers for periodic advertising), but they are sane
numbers to use for periodic advertisement.
The issue with using the non-periodic advertising
whereas the peridic advertising unit is 1.25ms.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Change so that num_completed_packets event handling is also
enabled for broadcast ISO only builds. This is because sending
data on a broadcast ISO still generates this event.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Update the connected ISO API to be more
similar to the broadcast ISO API as well
as the HCI spec.
This updated API allows for more flexibility
and will better support scenarios such as true
wireless setup, as ISO channels and connections
are more independent now.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
STM32WL features a specific HSE clock with dedicated properties.
Add a dedicated binding and update STM32 clock control driver
header to take it into account.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds support for the Legend 2.5" boards (legend25_ssd and
legend25_hdd) based on the STM32F070CB MCU. These boards can be found in
the Seagate FireCuda Gaming Drive, Gaming Drive for Xbox, SSD Gaming
Drive for Xbox, and Gaming Drive for PlayStation devices. Both boards
contain the following hardware components:
- A B1414 LED strip connected to the PA7 pin (SPI MOSI)
- A SPI flash (FM25F005) connected on SPI2 bus
The Legend 2.5" HDD board also contains an activity LED connected on
TIM3 CH3
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
The bt_sdp_get_add_proto_param is used to get the protocol
parameter from Additional Protocol Descriptor List.
In order to implement it, one parameter
(proto_profile_index) is added to sdp_get_uuid_data_index
to get the indexed item.
Fix one bug in sdp_get_uuid_data because there may be more
than 2 consequent "seq len item".
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
ARC MWDT doesn't support building Zephyr as an native
application (CONFIG_NATIVE_APPLICATION).
ARC MWDT doesn't support building with CONFIG_NEWLIB_LIBC
as it doesn't have newlib.
Let's explicitly forbid to use these Kconfig options for the
MWDT toolchain.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
As of today we have libraries provided by MWDT build with
stackcheck enabled. So we have to provide dummy
_fstack, _estack to make it working.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
The ring buffer's static declarations now declare the
ring buffer's data as __noinit, to avoid unnecessary
initialization of the buffer.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Enable RISC-V GP relative addressing by linker relaxation to reduce
the code size. It optimizes addressing of globals in small data section
(.sdata).
The gp initialization at program start needs each SoC support. Also,
if RISC-V SoC has custom linker script, SoC should provide
__global_pointer$ symbol in it's linker script.
Signed-off-by: Jim Shu <cwshu@andestech.com>
Document the behavior of the include name option when this is changed by
updating the advertising parameters of the advertising set.
In this case we cannot update the advertising data since the host does
not have a copy to modify. The application will have to do update with
its current advertising data.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
So far pcie_get_mbar() has been the only way to retrieve a MBAR. But
it's logic does not fit all uses cases as we will see further.
The meaning of its parameter "index" is not about BAR index but about
a valid Base Address count instead. It's an arbitrary way to index
MBARs unrelated to the actual BAR index.
While this has proven to be just the function we needed so far, this has
not been the case for MSI-X, which one (through BIR info) needs to
access the BAR by their actual index. Same as ivshmem in fact, though
that one did not generate any bug since it never has IO BARs nor 64bits
BARs (so far?).
So:
- renaming existing pcie_get_mbar() to pcie_probe_mbar(), which is a
more relevant name as it indeed probes the BARs to find the nth valid
one.
- Introducing a new pcie_get_mbar() which this time really asks for the
BAR index.
- Applying the change where relevant. So all use pcie_probe_mbar() now
but MSI-X and ivshmem.
Fixes#37444
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is the configuration of the stm32h723 where the
dma1 & dma2 of type V1 with a MUX. Even if DMA is of type V1,
the 'feature' does not exist with DMAMUX
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Clarify the PWM pwm_pin_set_cycles() function API details.
The API aims for synchronous (glitch-free) updates of the PWM period and
pulse width, but not all PWM controllers support this.
Similarly, the API aims for independance between channels on
multi-channel PWM controllers, but not all PWM controllers support this.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
