Commit graph

19237 commits

Author SHA1 Message Date
Mazen NEIFER
de2288ac38 Xtensa port: Fixed assembly comments to be accurate with code.
Change-Id: I7e0381cbefae916db515be4c10fe820dd4eddea6
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
ffd4eb9272 Xtensa port: Changed simulation support with xt-run/xtsc-run to be qemu like.
Change-Id: I1626a5cd75d17bc4f72d4a638484f87956f9e703
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
e8813d6fe5 Xtensa port: Define __builtin_unreachable() as CLI macro when using XCC.
XCC does not recognize __builtin_unreachable() and thus cause a link error.

Change-Id: I5dadf5a49d971d5e0a5ef88d582bb5ad2c36bced
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
af2593ea7e Xtensa port: Added linker script for several Xtensa cores.
Change-Id: I7a40d5f0c3fe8d25623b88f06523cb62e4ba4706
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
aa1e95bfb2 Xtensa port: Moved XCC specific libraries out of genric Xtensa make file.
These libraries are unlikely to be uesd by GCC port and thus should not be in
a generic make file. Moved to specific toolchain make file.

Change-Id: Ib585b87700e409d678f7a5cb60cff67b6022ab05
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
b8cbd05e6b Xtensa port: Enable long calls for Xtensa vector table.
Change-Id: I2e4c9ca0742988eb9ab4ec2db7c81bc988212f2c
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
daf28fa339 Xtensa port: Fixed tests/kernel/context to compile with Xtensa internal timer.
Change-Id: I4293adf23b7d46851747e3bcdd41b4a09e8fff05
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
e4e3cf604e Xtensa port: Added Xtensa specific code (C + S) files.
Change-Id: I0dff0c33d8577cc70d4d5ee8f298db38c508ee73
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
b0669a04b3 Xtensa port: Added support for Xtensa simulator console driver.
Change-Id: I58effa98fd6ff53bcfd21cb8de2fcd89651dc1d9
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
0c736f2916 Xtensa port: Added Xtensa internal timer configuration need by assembly files.
This is needed by next commit as some assembly files handling interrupts use
some options from this file.
This file is not included in next commit to separate code and build system
aptches.

Change-Id: Iff3a8019362599beb0c0058c3169480fa5183c1c
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
e2dd006ba7 Xtensa port: Removed the need to put an empy file soc.c in arch/xtensa/soc dir.
Change-Id: I439a6c36f10c6255d15a688c8f425de0fab93912
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
969f000a19 Xtensa port: Added support for Xtensa architecture to linker-defs.h.
Change-Id: Ic20d4746267bb9575960576c6b008c774fb6ef6d
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Andrew Boie
73691609b9 xtensa: fix find_msb_set() and find_lsb_set()
find_msb_set logic was wrong. find_lsb_set() is now an inline function.

Change-Id: I2c19540907723589298b2f6af2ce1d68704bf1d7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 08:04:27 -08:00
Andrew Boie
aa3ab35c88 xtensa: fixup license identifiers
Master branch changed requirements for license headers while this
branch has been in development.

Change-Id: I9bce16ff275057a4bb664019628fc9b6de7aef7c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
dc391f566c Xtensa port: Added support for Xtensa architecture in zephyr include files.
Change-Id: I1ac677cd6da5222707fe31ead71dc354f7c94443
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
9baece323e Xtensa port: Added Kbuild file for Xtensa arch.
Change-Id: I174c5736c891f94309361079cfd8b47dbb43032a
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
49b3c0028d Xtensa port: Added fields offset support for kernel and thread structures.
Change-Id: I9cc44f60757a2f988e2a6341da9591a5e5f54561
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
f69499a4a8 Xtensa port: Remove XCC warning about unrecognized CLI option.
XCC does not support compiler option -fno-defer-pop.

Change-Id: Ic47714331502b10e5e1e510984991615fe801696
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
f7538f0005 Xtensa port: Added support in arch/cpu.h for Xtensa cores.
Change-Id: If4a053f6164fd2fa30f148e6e907f662cda50722
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
c024e429c9 Xtensa port: Added support for Xtensa cores in toolchain/gcc.h.
Change-Id: Ic76934411e79c288e1440e21ee38e9a95a0399b9
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
3eca4f1f57 Xtensa port: Added Xtensa specific include files.
Change-Id: I9316f847934505bc609e271221027221b76050d6
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
0e0e0950dd Xtensa port: Fixed typo in XCC toochain specific make file.
Change-Id: I3ce26e8c047e743bb73fc2e75647788481b2490a
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
71b884b658 Xtensa port: Added Xtensa header generic files.
Change-Id: Ia2202080d09008fbfd4e803cd5266aa8caa16388
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
b78ceec452 Xtensa port: Added kernel arch dependent structs and functions.
Change-Id: I8b35454cdaac0087b7b68b96e6ec1780c71b1e9d
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Max Filippov
f5f69c99c4 xtensa: support 'make qemu' target
Provide generic support for running zephyr kernels on xtensa QEMU and
map D_233L SoC to dc233c QEMU core.

Change-Id: Ie804588f750213a7cc54dbc95c86ee4d62ba1ea5
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
0b4adc398d Xtensa port: Added support for XCC, the Cadence Systems Inc compiler
Change-Id: I6947519be1d3b155e4501950ee1303c40a4e5b16
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
4db0805ad0 Xtensa port: Added board config files for Xtensa simulator paltform
This platform is not a real board but let user handle the xtensa
simulator just like a board.
This is needed until a qemu like simulaotr is added to Xtensa.

Change-Id: I54ab28e86eea956cf85af3ee9b4a10f0d531e54d
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:26 -08:00
Mazen NEIFER
1cded67f38 Xtensa port: Started port to for Xtensa cores family.
Added arch sub folder, make files and Kconfig files for a set of standard SoCs.

Change-Id: I4ee9cba966860072e55c95795d87356b665e4d49
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:26 -08:00
Qiu Peiyang
0c87784c84 tests/gpio: fix test GPIO_INT_EDGE bug
When test GPIO_INT_EDGE, there is no code to skip GPIO_INT_LEVEL
and jump to the end of the function. So GPIO_INT_LEVEL will
always be checked (Besides, it't always true), even if it's
testing GPIO_INT_EDGE, which will cause GPIO_INT_EDGE cases fail.

Add a goto statement for GPIO_INT_EDGE to skip GPIO_INT_LEVEL.

Jira: ZEP-1685

Change-Id: I10ce21c04c49f34aafdc2cd2f60f3e5377d6f1f5
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
2017-02-12 01:04:09 +00:00
Qiu Peiyang
bc2faf3737 tests/pwm: enable PWM case to work on D2000 board
This test case uses PWM0 port to test PWM on Quark Se.
However PWM0 port on Quark D2000 is initialized as tdo,
not PWM0 and disabling tdo will kill JTAG on D2000. So
use PWM1 and add PINMUX setting code to configure PIN_24
as PWM1 port, then the case will work on D2000 board.

Change-Id: Ib28d4750dac7396529388b781fb64bde048139d6
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
2017-02-12 01:04:08 +00:00
jing wang
484f07cec7 tests: add zephyr adc driver api test case
the commit test below adc driver api with different resolutions
and modes
    adc_enable()
    adc_read()
    adc_disable()

move original adc test to adc_simple folder

Change-Id: I016b5e67a5d89fc8d5ae76f33799e5d3eb3e1cf8
Signed-off-by: jing wang <jing.j.wang@intel.com>
2017-02-12 00:33:59 +00:00
Qiu Peiyang
fde2b3f642 pinmux: fix default pinmux driver for quark_se_ss
Fix commit 42e1c9c, missing default pinmux driver
config for quark_se_ss.

Jira: ZEP-1665

Change-Id: I40b693c2d6cf160c470efdabf428c2597abbe881
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
2017-02-12 00:32:13 +00:00
Qiu Peiyang
45c579a271 tests: add zephyr counter and timer api test
The commit verifies below aon counter and timer apis:
	counter_start()
	counter_read()
	counter_set_alarm()
	counter_get_pending_int()

Change-Id: Iaac9a224372ee1c1dd12a223ca222f4485957575
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
2017-02-12 00:26:43 +00:00
Anas Nashif
f16f6ec2df tests: pipe: remove unsupported tests
Remove tests that assert due to invocation from ISR which is not supported.

Change-Id: Idd2360847a467af6afdd9fbed8f87a620d9ed2f7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-10 23:03:58 -08:00
Anas Nashif
bab5534ff6 tests: memory pool: remove unsupported tests
Change-Id: I467e9feb995db22b137038422aea9e1976166fc4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-10 23:03:55 -08:00
Anas Nashif
6e6e94bc77 tests: disable qemu_riscv32 on test_ecc_dh test [REVERT ME]
Change-Id: Iafba43007ab8daf1652b038bfbec184fe92b5ffc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:00:42 +00:00
Anas Nashif
c5e000b2c8 tests: xip: pulpino does not support XIP
Change-Id: I806c3b4cc218d501285174249f173e59e748bea7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:00:41 +00:00
Anas Nashif
468eaf6c39 mvic: include stdint for uint32_t
Change-Id: I1ce93a20d657044526c96998c4fdf37624a0b30e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:00:40 +00:00
Anas Nashif
73a6da0763 tests: benchmarks: add new boards
Change-Id: I54eba3e63091b3bae15cda226735f412490ad77a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:00:40 +00:00
Anas Nashif
3557d04eb5 tests: net: whitelist boards for telnet server
Change-Id: I141cb9e680584b9b26926eae288ae7a2a85633f8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:00:39 +00:00
Anas Nashif
cebc7f95aa newlib: make sure the chain of includes has generated_dts_board.h
Change-Id: I2021a30e1bc16e3eb9fdcc793b908bd0e610d01d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:00:39 +00:00
Anas Nashif
81f61f9cdc arm: sam70: refactor clearing of exception faults to common code
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change-Id: I8a9045eb46d5a23cbbd9a6bce75a0f1e78171eeb
2017-02-11 07:00:38 +00:00
Anas Nashif
f399d5a24a dts: hexiwear: fix fixup to use correct define
Change-Id: I3e97618000a0d18d5b254503c255df2cfbd16421
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:00:38 +00:00
Juan Manuel Cruz Alcaraz
75be503bbb i2c: Adds a functions set that supports flexible addressing.
The current I2C API provides inline functions to access 1 byte
register addresses. This commit adds a set of I2C inline functions
as shortcuts to handle:

- 16 bit register addressing. A family of functions that allows to
  handle 2 byte register addressing and can receive the address
  parameter as a simple variable. This allows a developer to handle
  the address as a C constant or macro.

- Multiple byte addressing. A family of functions to access
  registers with a configurable register address size. This family
  of functions handle register addressing of any size but receives
  the address parameter as a byte array.

Change-Id: Id369ab9eaad7eea807554371d3a520f67dc2e0f2
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
2017-02-11 05:20:07 +00:00
Baohong Liu
59b8af5395 tests: dma: update dma loop transfer app
Update the dma loop transfer sample app to use the new
dma api interfaces. This change is based on the api change
and the updated dma driver.

A RFC was posted recently on this.

Jira: ZEP-873

Change-Id: I289e2e08d4c775a833bf3d585d2706a903edd0bc
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2017-02-11 05:18:22 +00:00
Anas Nashif
110df98619 Merge "Merge arm branch into master" 2017-02-11 04:00:58 +00:00
Leandro Pereira
570634a259 kernel: Add OpenOCD support
In order for OpenOCD to have a high-level view of an RTOS, it uses the
GDB protocol to obtain symbols from the system.

The GDB protocol, however, does not allow obtaining fields from
structures directly, and hardcoding offsets is not only brittle (due to
possibly different architectures or changes in the code), it's also
infeasible considering Zephyr is highly-configurable and parts of key
structs can be compiled in or out.

Export an array with offsets for these key structs. Also add a version
element in that array to allow changes in those structs.

Change-Id: I83bcfa0a7bd57d85582e5ec6efe70e1cceb1fc51
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-02-11 03:57:19 +00:00
Anas Nashif
1208bab079 add curie_ble board for all curie based boards
Change-Id: Id87839f80db00da499077ac1c2bb8f588fcf3f06
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:20:03 +05:30
Anas Nashif
abbd2129ed boards: add tinytile board
Change-Id: I9661c21c25761e29b695f78236df4e44192f367f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:16:31 +05:30
Kuo-Lang Tseng
61452f0e38 samples: bmi160: use correct device name
Binding of the device failed due to incorrect device name. Update
to use the correct device name.

Jira: ZEP-1704

Change-Id: I6ca23a439357592c9c974ca746bccc35e77d996d
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
2017-02-11 01:28:09 +00:00