Use DT_ instead of CONFIG_ for spi freq, spi bus name, flash device
name and flash base address.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Disabled the CONFIG_COVERAGE for benchmarks and other tests.
This is needed because it interferes with normal behavior of the
test case.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
These tests need to use stack size as a function of
CONFIG_TEST_EXTRA_STACKSIZE. These test will fail when
CONFIG_COVERAGE is enabled.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
This is a custom Gcov implementation. Taking excerpts from gcc
gcc libgcc/libgcov.h and gcc/gcov-io.h.
Ported to zephyr by Ramakrishna Pallala <ramakrishna.pallala@intel.com>
and Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
tests: Modify tests to use DEVICE_AND_API_INIT()
Modified samples/tests drivers to use DEVICE_AND_API_INIT() instead
of deprecated DEVICE_INIT() api
Signed-off-by: Varun Sharma <varun.sharma@intel.com>
In driver and application code use the new device-tree values produced
by standard compatible-instance bindings.
As this code may be used as an example add a comment describing how the
binding instance number cannot be reliably used to distinguish multiple
instances.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Zephyr has been using "i2c,eeprom" for the compatible property. This is
inconsistent with the property documentation which expects
"manufacturer,model" to be used.
The Linux standard compatible name for I2C EEPROMs is "atmel,at24". The
standard for SPI EEPROMS is "atmel,at25". We don't have support for the
latter, but change the name for the former.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
These two tests are hitting a stack overflow on x86_64 (not entirely
surprisingly), but can't just increase stack size because there is an
assert in the CMSIS compatibility layer that stacks be under 512
bytes. Just disable for now.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This builds with a host compiler, not one from the SDK, and so no
newlib library is available. There is work to enable newlib detection
at and above the cmake level. This patch can be reverted when that
lands.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
There is actually nothing wrong with this test code idiom. But it's
tickling a qemu emulator bug with the hpet driver and x86_64[1]. The
rapidly spinning calls to k_uptime_get_32() need to disable
interrupts, read timer hardware state and enable them. Something goes
wrong in qemu with this process and the timer interrupt gets lost.
The counter blows right past the comparator without delivering its
interrupt, and thus the interrupt won't be delivered until the counter
is next reset in idle after exit from the busy loop, which is
obviously too late to interrupt the timeslicing thread.
Just replace the loops with a single call to k_busy_wait(). The
resulting code ends up being much simpler anyway. An added bonus is
that we can remove the special case handling for native_posix (which
was an entirely unrelated thing, but with a similar symptom).
[1] But oddly not the same emulated hardware running with the same
driver under the same qemu binary when used with a 32 bit kernel.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This architecture doesn't support stack canaries. In fact the gcc
-fstack-protect features don't seem to be working at all. I'm
guessing it's an x32 ABI mismatch?
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This is intended to be a value set by the platform to adjust the size
of stacks created by tests. This test was setting it explicitly, and
failing to honor it when creating its own stacks.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr.
Only the basic architecture support needed to run 64 bit code is
added; no drivers are added, though a low-level console exists and is
wired to printk().
The support is built on top of a "X86 underkernel" layer, which can be
built in isolation as a unit test on a Linux host.
Limitations:
+ Right now the SDK lacks an x86_64 toolchain. The build will fall
back to a host toolchain if it finds no cross compiler defined,
which is tested to work on gcc 8.2.1 right now.
+ No x87/SSE/AVX usage is allowed. This is a stronger limitation than
other architectures where the instructions work from one thread even
if the context switch code doesn't support it. We are passing
-no-sse to prevent gcc from automatically generating SSE
instructions for non-floating-point purposes, which has the side
effect of changing the ABI. Future work to handle the FPU registers
will need to be combined with an "application" ABI distinct from the
kernel one (or just to require USERSPACE).
+ Paging is enabled (it has to be in long mode), but is a 1:1 mapping
of all memory. No MMU/USERSPACE support yet.
+ We are building with -mno-red-zone for stack size reasons, but this
is a valuable optimization. Enabling it requires automatic stack
switching, which requires a TSS, which means it has to happen after
MMU support.
+ The OS runs in 64 bit mode, but for compatibility reasons is
compiled to the 32 bit "X32" ABI. So while the full 64 bit
registers and instruction set are available, C pointers are 32 bits
long and Zephyr is constrained to run in the bottom 4G of memory.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
It's worth using custom timing information on a few systems to save
cycles or gain precision. But make the use of k_cycle_get_32() a
proper default instead of hardcoding all the platforms and failing to
build on new ones. On Xtensa and RISC-V (and now x86_64) the cycle
informatoin from that call is a very fast wrapper around the native
counters anyway -- all you would save would be the function call
overhead.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
These files were relying on _thread_essential_set() from
kernel_internal.h, but not including it directly. New architectures
won't transitively include things the same way.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Remove configuration parameter CONFIG_BUS_TYPE. Now we may
make use of DT_ST_LSM6DSL_BUS_I2C and DT_ST_LSM6DSL_BUS_SPI
definition to select the bus.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
With the new implementation we do not need a NULL terminated list
of kobjects. Therefore the list will only contain valid entries
of kobjects.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Add negative scenarios, API tests and improve
test coverage for kernel management APIs supported
in CMSIS RTOS V2 portability layer.
Signed-off-by: Spoorthi K <spoorthi.k@intel.com>
The test_timer_periodicity test is racy and subject to initial state
bugs. The operation of that test is to:
1. Start a timer with a known period
2. Take the current time with k_uptime_get()
3. Wait for the timer to fire with k_timer_status_sync()
4. Check that the current time minus start time is the period
But that's wrong, because a tick expiring between any of the first
three steps is going to skew the math (i.e. the timer will have
started on a different tick than the "start time").
And taking an interrupt lock around the process can't fix the issue,
because in the tickless world we live in k_uptime_get() is actually a
realtime quanity based on a hardware counter and doesn't rely on
interrupt delivery.
Instead, use another timer object to synchronize the test start to a
driver tick, ensuring that even if the race is unfixable the initial
conditions are always correct.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Move to latest cmake version with many bug fixes and enhancements.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Used as a checksum on command messages when talking with MMC cards.
Implemented using the unwound bytewise implementation from
https://en.wikipedia.org/wiki/Computation_of_cyclic_redundancy_checks
which is a good mix of size and speed.
The API and naming matches lib/crc7.c in Linux.
Signed-off-by: Michael Hope <mlhx@google.com>
Keeping IRQ0 priority as 1 and IRQ1 priority as 0
so that system timer which of priority 0 in ARC
will be interrupted by IRQ1 of same priority.
In ARM, system timer is of priority 1, hence
making ISR0 priority as 2 and ISR1 priority as 1.
Thus system timer will always be interrupted by
ISR1 in both the architectures.
Fixes: #12147
Signed-off-by: Spoorthi K <spoorthi.k@intel.com>
The options selecting nRF drivers are now enabled by default when
an nRF SoC is selected as the build target.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Convert lsm9ds0_gyro driver to get the device name as well as
i2c slave information and gpio info for triggers from device tree.
Updates the build_all test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Using multi-queue scheduler doesn't work for cmsis_rtos_v2 as it
supports a max of only 32 priority levels which is less than the
total priority levels required by cmsis_rtos_v2 (which is 56).
Hence explicitly asking the tests to use the scalable scheduler.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Convert lsm9ds0_mfd accel/magn driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
