Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Also reduce the check that the affected region is within the device
span to its minimal equivalent conditions.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the necessary clock configuration to support STM32L-based
SoCs. This change likely adds support for other STM32 SoCs as well
since the HSI48 clock is configured for all SoCs that support it
(except the STM32L4x) instead of just the STM32G4X.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The entropy driver needs to use the SYSCFG block to control VREF on
the STM32L0. Clock the block if the entropy driver has been enabled.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The LPTIM driver is supposed to be only available when the SoC is
allowed to enter power sleep mode, as described in commit f30f5fff72
("drivers: timer: lptim is [EXPERIMENTAL] for stm32 soc series only").
For that it should depends on SYS_POWER_MANAGEMENT (which gates the
SYS_POWER_SLEEP_STATES and SYS_POWER_DEEP_SLEEP_STATES options) instead
of DEVICE_POWER_MANAGEMENT.
Fixes#25989
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
MPSL is a library that provides external radio IRQ source for the
802.15.4 driver. If this library is in use, the driver shall not
configure the radio IRQ.
Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
The NRF5 and RF2XX drivers are using different thread names compared
to the other 802.15.4 drivers. Aligned the thread names to <chip>_rx.
Signed-off-by: Markus Becker <markus.becker@tridonic.com>
Set the thread name for the data acquisition thread in the TI LMP90xxx
ADC driver to aid in debugging and profiling.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Replace individual device instance definitions with the macro that
expands to the equivalent change.
F='struct device DEVICE_NAME_GET'
git grep -l "$F" \
| xargs sed -i -r \
-e "s@$F"'\(([^)]*)\);@DEVICE_DECLARE(\1);@'
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Some radio drivers need configuration before start-up. Up to now only
the RF2XX drivers allowed this, but other radio drivers need this as
well. In particular for setting EUI64 addresses.
Signed-off-by: Markus Becker <markus.becker@tridonic.com>
Some ticks are counted additionally when the autoreload
interrupts were too close together.
This patch improve the counts of the clock cycle.
lptim_fired worked badly in particular because the flag ARRM
was not raised when the interrupt was forced.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
If ticks is K_TICKS_FOREVER the register autoreload isn't set.
So, on the next call to the z_clock_set_timeout function
the wait for the flag ARROK will be infinite.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Used for permission validation when accessing the associated file
descriptors from user mode.
There often get defined in implementation code, expand the search
to look in drivers/ and subsys/net/.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is a follow-up to commit cf7dd4981f.
When disabling RX, it is necessary to clear the RXSTARTED event after
the ENDRX_STARTRX shortcut is deactivated, as the event might already
have been generated at this point. If the event is not cleared and
the disabling of RX is done from the user handler called in the context
of the ENDRX interrupt, a spurious UART_RX_BUF_REQUEST event will be
generated (although RX is already disabled) for which a corresponding
call to uart_rx_buf_rsp() would fail, as the second buffer is already
set. Depending on the application implementation, this can result in
other unexpected problems.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
We don't need to reset backup domain to set LSE clock source.
It's dangerous to reset backup domain, it removes:
- RTC configuration
- backup registers
- RCC Backup domain control register
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Having a completion wait function release a lock internally only when
the operation fails is confusing. Remove that feature, and make the
lock and unlock operations explicit and paired.
This makes it much more clear how to properly handle transactions that
require multiple calls to the HAL.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The stack buffer used to pad small reads must still be aligned to a
word address as the underlying driver uses DMA transfers with that
requirement. Don't assume the compiler will naturally align it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The check for small transfers inadvertently allowed a transfer of zero
bytes, which should be an error (invalid parameter).
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The consequent and alternate expressions for COND_CODE_1 must be
enclosed in parentheses, like this:
COND_CODE_1(PREDICATE, (consequent), (alternate))
The parens are missing in exactly one place in the tree. Fix it.
Reported-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Activation of the LPTIMER is valid for SLEEP MODE only
The choice of the lptim clock source is STM32_LPTIM_CLOCK
set the LSE in first position to have as default value
Signed-off-by: Francois Ramu <francois.ramu@st.com>
based on PR#25412
Some kernel tests use `CONFIG_TICKLESS_KERNEL=n` with
`CONFIG_SYS_CLOCK_TICKS_PER_SEC=1` to detect when a test runs longer
than 1 second. These tests break if a tick is announced every time a
timeout occurs. Only announce if the measured duration since the last
tick is at least the duration of a tick.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
set the min and max values of the given ticks from 0
to LPTIM_TIMEBASE which is the full register value
In case the timeout is FOREVER, then lptimer is stopped
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The current value of the counter must not be added to the accumulator.
It will be added when calling z_timer_cycle_get_32.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
When the tickless kernel isn't used, we don't want to wait for ARROK.
This wait can be endless.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
The power configuration is dependent on which SPI is physically used.
In order to allow DT_INST_FOREACH_STATUS_OKAY() to iterate through
instances without the assumption that index 0 corresponds to SPI0
(which would be incorrect in the case when only SPI1 is enabled),
we need to check the base address to identify which SPI is being dealt
with.
Fixes#25673
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The implementation of offload_getaddrinfo in this driver failed
when the node it was called with was an IP address. This condition
was never detected, and as a consequence a DNS query was done on
the IP address instead of returning it directly.
Also, the port was set first after running the DNS query.
As a consequence, if the IP address would have been returned directly,
this would have been done without a port been set.
Both errors are fixed in this patch.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Prevent usage of system work queue before it is ready by delaying
initialization of temperature device. Work queue is not used until
application stage.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
There does not seem to be a simple way to express the fact that UART1
can be initialized later at the POST_KERNEL level. The existing code
is wrong in the sense that it always initializes DT instance 1 later,
instead of doing it for UART1 (which may not be instance 1).
In addition, UART instances on other platforms are
also initialized at the PRE_KERNEL_1 level regardless of the instance
index, so let's do the same on this platform for consistency.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
The power configuration is dependent on which UART is physically used.
In order to allow DT_INST_FOREACH_STATUS_OKAY() to iterate through
instances without the assumption that index 0 corresponds to UART0
(which would be incorrect in the case when only UART1 is enabled),
we need to check the base address to identify which UART is being dealt
with.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This reimplements z_timer_cycle_get_32() so it works
when IRQs are locked and solves the hung
k_busy_wait() problem.
Fixes#23622.
Signed-off-by: Jakub Cebulski <jcebulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Co-authored-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Updating the eswifi driver to provide port information (along with
IP / net context) whenever an async message is received. This is
needed to fully populate the "remote" info in "net_context"
required whenever net_context_send is called.
Also adding code to populate "remote" info in "net_context"..
Tested with STM32 disco IOT kit. Fixes#25621
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
When the loop that tries to obtain the lock in poll_out() finishes
because of hitting the max number of trials (what normally should
never happen), force the lock to be taken instead of just giving up
with sending the data. The latter approach that was in use so far
could not deal with a situation when some thread was aborted while
keeping the lock. Other threads would then have no chance to send
anything with poll_out() until it was called from an ISR.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Correct dependency of the TEMP_NRF5 Kconfig option so that it can be
enabled only on nRF SoCs that feature the TEMP peripheral.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Some Kconfig defined devices may be defined using dt_chosen_label
function. Since there is no way to ensure a device enabled in dts
is also defined in Kconfig, it may happen that instance is not
actually defined.
In this case device_get_binding might return 0, leading to undefined
behavior in the function that calls it.
When not already done, systematically check return of function
device_get_binding on devices defined through dt_chosen_label macro.
Trigger ASSERT when required and return error when possible.
Fixes#20068
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Nordic driver must allow read from control OUT endpoint by
itself. For data stage transactions with length > MPS (64Bytes)
this must be performed for each 64B + Residue data packet.
Residue - data packet with len < 64B.
The exact length of data transfer is known from wLength field
form setup packet in setup stage. Until now driver was incorrectly
initializing the length of the data stage and at some point will
not allow for next data stage.
This commit addresses the issue #23980.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
The weak implementation returns 0 for all operations without doing
anything, which incorrectly suggests that an operation like
device_get_power_state() returned an accurate description of the
system clock power state. Return -ENOTSUP instead.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
If timeout is being overwrite exactly when previous one is expiring
then hardware event was cleared correctly but interrupt was already
triggered. Interrupt routine was assuming that compare event is set
and proceed with that assumption. However, in that corner case when
compare event was overwritten and event was cleared, that was not the
case.
As the outcome, timeout could be triggered prematurely. Fixed by
clearing pending interrupt after handling previous compare value.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
mcuboot and possibly other tools read single byte values to determine
the state of objects. Rather than fail to do the read of values too
short for this peripheral detect the situation and read into a stack
buffer that meets the length criteria, and on success copy the data
into the provided buffer.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
* still need to clear IP bit in timer irq handler
* last_time should be aligned to ticks, old code will miss some
cycles which are about (curret_time - last_time) % CYC_PER_TICK
* in timeout set, shorten the delay needed when tick is 0, this
will improve the response of timer irq
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
the pulse triggered timer irq doesn't work for all targets. In
iotdk, we found the clear of IP bit will clear int request
when elapsed called in thread context. So come back to level
triggered way which is supported in all targets, and use the sw
triggered irq to remember the irq request which may be cleared
in non timer int handler.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
* rename overflow_cyc to overflow_cycles for better understanding
* use MIN macro to replace if .. else ..
* typo fix in comments
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Allow configuring the clock prescaler divider for the NXP Kinetis
FlexTimer. Setting the prescaler to a lower value allows for much
higher resolution/accuracy for the generated PWM waveforms.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
User can now add extra Ethernet TAP parameters when starting QEMU.
This is useful if we want to set for example the MAC address
of the network interface.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
When PCIe is enabled for UART, the port address is probed during
initialization and is written back into the device config struct.
However, the device config struct is supposed to be const and
read only. This results in page faults when MMU is enabled as
the struct cannot be written into. So fix this by storing port
address in device data struct if a particular UART instance is
of PCIE.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The init function returns successful even if the first
configuration function call fails. This may leave
a non-usable UART to be discoverable with
device_get_binding() which will definitely result
in lots of head scratching. So change the init function
to return properly.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the calls to read_timer_{start,end}_of_tick_handler()
to mark the start and end of ISR which will be used to display
the time spent in ISR with benchmarking tests.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
IRQ_CONNECT() can only be called at one location to connect the irq for
CPE0. This commit modifies the driver to call into the HwiP layer in TI
HAL so that TI's RF driver can do the same when connecting the irq.
Fixes#25216
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
New update of hal_ti requires DeviceFamily_CC13X2/DeviceFamily_CC26X2
to be defined in order to include the rfc.h header.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Some kernel tests use `CONFIG_TICKLESS_KERNEL=n` with
`CONFIG_SYS_CLOCK_TICKS_PER_SEC=1` to detect when a test runs longer
than 1 second. These tests break if a tick is announced every time a
timeout occurs. Only announce if the measured duration since the last
tick is at least the duration of a tick.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add +1 tick to alarm in order to compensate the partially started tick.
Alarm will expire between requested ticks and ticks+1.
In case only 1 tick is requested, it will avoid that +1 Tick event
occurs before alarm setting is finished.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The check for assertion on the "config_func" was added to
validate that the function pointer is valid. However, in
the code we are invoking the "config_func" and comparing
its output with NULL. This causes build failures with
CONFIG_ASSERT=1. Caused by PR-25393.
Tested on Nucleo F767Zi board.
Fixes#25427
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
The existing uart driver ns16550 did not have ISR locking that
effected IO APIC working in fixed delivery mode in SMP system
x86_64. This commit adds ISR locking mechanism using spinlock
for the interrupt related services.
The CONFIG_IPM_CONSOLE_STACK_SIZE is increased to lift
limitation of stack size experienced in IPM driver test with
this spinlock impelentation.
Fixes#23026
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
Current dma struture code didn't allowed only rx channel removal,
disabling tx channel (in spi client node) was leading compilation
issue.
Fix this by moving conditional code inside SPI_DMA_CHANNEL macro and
get the part of code which is present or removed (SPI_DMA_CHANNEL_INIT)
outside of {}.
Additionally, fix indentation on '\' in whole instance init macros
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
All initialization of the Ethernet interface is done in the
eth_initialize function which is invoked by the boot code.
This function sets up DMA, programs the Ethernet module and
enables IRQs. However, this function does not setup "netif"
interface info which is done when the ethernet device is
enumerated by the NET stack via the "iface_api.init" func.
However, after the eth_initialize func is called, it is
possible that the system receives RX interrupts, and the
"rx_thread" accesses the "netif" pointer to get iface info.
However, because the "netif" info is not necessarily
populated at this time, we get a crash (as OS does NULL
access).
Fixed by enabling Ethernet IRQ after the interface is
properly setup.
Tested on Nucleo F767Zi board.
Fixes#25408
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
Use device tree provided configurations for arm architecture timer
PPIs.
This fixes issue of timer ppi not working on most hardware where
edge-triggered PPI are not supported.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Hardware does not seem to support triggering interrupts to
itself by setting line as both input/output and setting
output to desired level. So just say interrupt triggering
is not supported when line is set to output.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Change adds abort of ongoing write operation in ep_ctx_reset. This is
required to keep the state of Zephyr driver consistent with state of
nrfx driver. This fixes a bug where nrfx_usbd was stuck in busy state.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
If interrupt is previously enabled and triggering condition
changes, it might fire callback based on previous condition.
To avoid this issue, disable interrupt before trying to
change settings, and enable afterwards.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:
- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
for macros which are equivalent to
DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name
Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.
This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The driver-specific config_info structure referenced from the device
structure is marked const. Some drivers fail to preserve that
qualifier when casting the pointer to the driver-specific structure,
violating MISRA 11.8.
Changes produced by scripts/coccinelle/const_config_info.cocci.
Some changes proposed by the script are not included because they
reveal mutation of state through the const pointer, though the
code works as long as the driver-specific object is defined without
the const qualifier.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
With this change, the spi transceive with dma function
waits for the spi busy flag reset and for the dma transfer end.
Then it reloads the channels until all buffers are consumed.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This change avoids the reload of the dma channel
in the callback function, just sets the corresponding Tx, Rx flag.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add simple commands to read or write a single byte from a device
register.
i2c write_byte I2C_2 36 b0 12
i2c read_byte I2C_2 36 0
Output: 0x82
I modified Anas' version to put args in variables first so that the code
is self-documenting.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of having a Kconfig property, if there is no local-mac-address
property in the devicetree than we'll generate a unique MAC address
based on unique ID registers on the SoC.
We remove the local-mac-address properties in the SoC dtsi files to
match the default behavior that existed before (ie, unique MAC address)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move from a Kconfig to select/initialize the MAC address to using the
"local-mac-address" property in devicetree. If the property is set the
drivers will initialize the mac-address from the devicetree (unless the
mac address is all 0's). The MAC address might get overwritten by
either a driver specific means or by the setting of
"zephyr,random-mac-address" in the devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Utilize the devicetree property "zephyr,random-mac-address" to determine
if a driver should use a random mac address and remove the associated
Kconfig options that enabled this feature.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rather than having each driver have its own slightly different way of
generating a random mac address, add a helper function that they all can
call so we do it one way.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add infineon XMC4 series UART support. Driver supports
only poll mode using XMCLib.
Out of 4 available UART's on SoC, only UART1 is confgired
by default in UART mode until GPIO & pinctrl support.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Both ST and STM32 modules where using same HAS_STLIB Kconfig
symbol.
Now that each module is createing is own lib, we need to be able
to distinguish libs.
Depends on zephyrproject-rtos/hal_stm32/pull/52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use DT_INST_SPI_DEV_HAS_CS_GPIOS() in drivers to determine if we should
utilize CS_GPIO base SPI chipselect handling. This allows us to remove
Kconfig option for this feature.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Updating the eswifi driver to indicate "scan completion"
to WiFi Management once scanning is done.
Tested with STM32 disco IOT kit.
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
Currently all IO APIC interrupts are configured at fixed delivery mode,
which is good for HEPT timer interrupt but it imposes burdens to
device drivers to properly handle the repeated interrupt sent to all
processors.
This patch makes it more flexible so that device drivers can specify
the delivery mode it desires in the IRQ connect APIs.
- Don't hard code IOAPIC_FIXED in z_ioapic_irq_set(), meaning the
IRQ delivery mode is passed in from the 'flags' argument and
individual device driver needs to choose delivery mode for its own
IO APIC interrupt.
- To support different delivery mode in different IO APIC interrupts,
need to save and restore RTE[10:8] during IOAPIC suspend and resume.
If device driver doesn't pass either IOAPIC_FIXED or IOAPIC_LOWEST
in IRQ_CONNECT()/irq_connect_dynamic() alike APIs, the delivery mode
bit fields in the target RTE register are '0' which implies fixed mode.
If the device driver wants the interrupt to be delivered to one CPU
only, it needs to explicitly specify IOAPIC_LOWEST in one of the IRQ
connect APIs.
Signed-off-by: Zide Chen <zide.chen@intel.com>
Currently IO APIC is working in physical destination mode, which
doesn't support interrupt to be delivered to multiple local APICs.
By definition only 4 bits [59:63] in IO APIC IOREDTBL register are
available for destination addresses and it contains an APIC ID only.
This patch changes it to logical destination mode so that IOREDTBL
can potentially define a set of processors and it's posible to deliver
interrupts to multiple APICs.
Signed-off-by: Zide Chen <zide.chen@intel.com>
If IO APIC is in logical destination mode, local APICs compare their
logical APIC ID defined in LDR (Logical Destination Register) with
the destination code sent with the interrupt to determine whether or not
to accept the incoming interrupt.
This patch programs LDR in xAPIC mode to support IO APIC logical mode.
The local APIC ID from local APIC ID register can't be used as the
'logical APIC ID' because LAPIC ID may not be consecutive numbers hence
it makes it impossible for LDR to encode 8 IDs within 8 bits.
This patch chooses 0 for BSP, and for APs, cpu_number which is the index
to x86_cpuboot[], which ultimately assigned in z_smp_init[].
Signed-off-by: Zide Chen <zide.chen@intel.com>
Swap this out and make the status a parameter.
Leave a couple of cases of DT_NODE_HAS_COMPAT().
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
These are redundantly checking a node's status twice.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.
Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.
To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:
- emit macros for all existing nodes in gen_defines.py, regardless
of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Add API for recovering an I2C bus. This API can be used to recover
from situations where the I2C master and one or more I2C slaves are
out of synchronization (e.g. if the I2C master was reset in the middle
of an I2C transaction or if a noise pulse was induced on the SCL
line).
Fixes#23441.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The '_' is not necessary, plus it makes the sys init object name
aligning with all others.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
init_fn is not anymore part of struct device, so let's test instead the
driver's API structure pointer which is also unique per device driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
When the device driver model got introduced, there were no concept of
SYS_INIT() which can be seen as software service. These were introduced
afterwards and reusing the device infrastructure for simplicity.
However, it meant to allocate a bit too much for something that only
required an initialization function to be called at right time.
Thus refactoring the devices structures relevantly:
- introducing struct init_entry which is a generic init end-point
- struct deviceconfig is removed and struct device owns everything now.
- SYS_INIT() generates only a struct init_entry via calling
INIT_ENTRY_DEFINE()
- DEVICE_AND_API_INIT() generates a struct device and calls
INIT_ENTRY_DEFINE()
- init objects sections are in ROM
- device objects sections are in RAM (but will end up in ROM once they
will be 'constified')
It also generate a tiny memory gain on both ROM and RAM, which is nice.
Perhaps kernel/device.c could be renamed to something more relevant.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit adds support for receiveing data from ISO OUT endpoint
for NRF devices. NRF USB IP core does not generate IRQ when
data are received on ISO OUT endpoint and it must be synchronized
with SOF event.
Enable SOF handling by default if usb audio is configured
with NRF devices.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
By this commit exception for ISO endpoints is made when it comes
to its size. ISO endpoint buffer size for nrf devices is 1023 and
may be configured with variable length size. NRFX checks is size
is chosen accordingly and it is no reason to do it in SHIM.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Revise how the unusable memory area is treated.
Do not use SPI interface directly but ssd16xx_write_cmd().
This will allow a common SPI interface to be implemented
in the future.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
INLINE is a very common macro, just like MAX or MIN.
Defining it always can easily collide with libraries or
application headers.
And option would be to add a ifdef guard around it,
But it was used in only 1 place in Zephyr, instead
of keeping it just for that, remove it.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Changes:
- Added all required board files in /boards/arm/96b_aerocore2
- Modified pinmux for stm32f4
Most of the changes in this PR is based on reverse-engineering of the
PCB layout and following commits in the PX4 firmware repository for
the same board. The manufacturer does not provide and or generate
schematics and pinout tables for this board.
This PR includes almost all of the interfaces connected to the STM32
MCU, the only thing not included is the J9 and J8 headers that connect
to a 96Boards baseboard.
These headers are not vital to the functionality of the Aerocore2.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Update dtsi and pinmux macros for stm32f7 family. Add sdmmc1 to dts file
for stm32f746g_disco. Also add board specific configuration file for
fat_fs sample.
Signed-off-by: Helge Juul <helge@fastmail.com>
Update the dtsi for stm32l471 (which the higher SoCs are based on) to
support the stm32-sdmmc disk access device. Enable the device for the
stm32l496g_disco board, and update the pinmuxing.
Note that the stm32l496g_disco board also has a card detect gpio
(MFX_GPIO8), but this is not supported yet. When not specified the
driver will assume a card is present.
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
When MSI clock is used a source of PLL, it should be possible to
select its frequency range. Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update mbedTLS commit along with the following fixes:
* Fix naming inconsistencies in some cipher modes, to match core mbedTLS
configs
* Add Kconfig to enable CTR cipher mode
Fixes#22421
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
During communication initialisation, the IMSI of the inserted SIM
card is evaluated to determine the APN. This is done by comparing
the first 5 characters of the IMSI to a list of known providers.
The list can be given in Kconfig.
To enable this functionality, set following bool in Kconfig:
MODEM_UBLOX_SARA_AUTODETECT_APN
To set a list of providers, set following string:
MODEM_UBLOX_SARA_AUTODETECT_APN_PROFILES
If the provider can not be found in the list, the APN given in
following entry is used as a fallback:
MODEM_UBLOX_SARA_R4_APN
Signed-off-by: Hans Wilmers <hans@wilmers.no>
The modem type (Sara R410 or Sara U201) is detected automatically after
hardware initialisation of the modem. Further initialisation and
functionality is then chosen depending on the detected modem type.
To enable this functionality, set following bool in Kconfig:
MODEM_UBLOX_SARA_AUTODETECT_VARIANT
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Many chips have only one serial port. When the serial port is occupied
by other devices, there is a lack of a console to output debugging
information. Semihosting can provide a console. The disadvantage of
semihosting is that a debugger must be connected, so it can only be
used for online debugging.
Signed-off-by: ZhongYao Luo <LuoZhongYao@gmail.com>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add initial support for Decawave DW1000
IEEE 802.15.4-2011 UWB transceiver.
Driver has basic functionality. Additional functions such
as reading out timestamps and delayed TX were implemented
for test purposes, but also require support in the 802154
subsystem.
Register, sub-register, and defaults defines in the file
ieee802154_dw1000_regs.h are taken from the Decawave's
DW1000 driver for the Mynewt OS.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Add support for ADC on H7 series. Note that ADC1 and ADC2 share the same
register set, so it is added as "adc1_2".
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Like stm32 L4 does,
when the STM32WBx SoC goes into STOP mode, the SPI device is disabled.
This cause the pins to not be drived anymore (i.e. they are floating)
except through their pull-up or pull-down.
From the logical point of view, the NSS pin is held high by a pull-up
so it's not a problem if the other pins are floating. However those pins
are floating input for the slaves, which increase their power
consumption.
The solution is to hold the state of the pins through a pull-up or a
pull-down. This is already done for the NSS and MOSI pins, but not for
SCK. Fix that by using pull-down on the SCK pin the same way it is
already done for the MOSI pin.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Convert i2s_sam_ssc driver to utilize devicetree. We replace Kconfig
options for specifying the DMA configuration (channel, DMA device name)
with getting that from devicetree. We also get pincfg from devicetree,
however we still have Kconfig sybmols to specify if the RF or RK pin is
enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert sam_xdmac driver to utilize devicetree. As part of the
controller binding we specify that dmas should contain a channel and the
perid for the DMA transaction.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The conversion in 9b096f40b6 left out a
few tidbits that were not converted properly. Complete the conversion
properly.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Remove semicolon between instance invocations of DT_FOREACH_IMPL_ and
thus DT_INST_FOREACH. This provides more flexibility to the user. This
requires we fixup in tree users to add semicolon where needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
MCHP Soc operation uses clear-on-write register for interrupt
status, read-OR-write operation may clear interrupts unintentional.
Fixes#24464
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Attached Flexcomm SPI driver to the main clock used by the core.
This means setting the SPI clock the same value as the core clock.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This fixes some cases where an integer timeout received as a parameter
was not converted to a timeout before being used in standard API.
Changes to the POSIX library were not included as that's being
reworked in a separate PR.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The DS3231 is an I2C real-time clock with internal temperature
compensated oscillator, maintaining civil time to 1 s precision with
nominal 2 ppm accuracy from 0-40 Cel.
The basic functionality is exposed as a counter that is always running
at 1 Hz. Much more functionality is exposed as driver-specific API,
including the ability to translate between the time scale of the DS3231
and the time scale of the Zephyr uptime clock. This allows correlation
of events in the system clock to UTC, TAI, or whatever time scale is
used to maintain the DS3231.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add a driver that can handle several instances of AT45 family chips,
which are enabled by specifying DT nodes for them with the "compatible"
property set to "atmel,at45" and other required properties like JEDEC
ID, chip capacity, block and page size etc. configured accordingly.
The driver is only capable of using "power of 2" binary page sizes in
those chips and at initialization configures them to work in that mode
(unless it is already done).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
referring the ARM's Systick driver, we did the following improvements:
* use 31 bits of 32-bit counter to avoid the rare but possible
overflow of elapsed(). If 32 bits val are used, elpased() may
return a wrong value. then wrong HW cycles.
* two ways to update the correct cycles
- through systick timer irq
- when systick timer irq cann't be handled because of irq
locked/disabled, call z_timer_cycle_get_32->elapsed to update
the correct cylces. no more than one counter-wrap is allowed.
* if elapsed() is not called too long (more than one counter-wrap) from
systick tiemr irq or from z_timer_cycle_get_32. The lost of HW cycles
is unavoidable.
* some detailed discussion can be found in #24332
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Fix use of DT_HAS_DRV_INST which does not exist.
Use DT_HAS_NODE_STATUS_OKAY(DT_DRV_INST(n)) instead.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Provide basic commands that are useful when testing a LoRa
radio. Currently, the shell supports:
> lora conf ...
> lora send ...
> lora recv ...
> lora test_cw ...
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Add an API to transmit a continuous wave at a fixed frequency. This
functionality is useful to test the radio in a lab setup.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Add basic driver for GIC V3 interrupt controller.
This implementation supports
- distributor, re-distributor and cpu interface initialization
- configuration and handling of SPI, PPI and SGI.
- V2 Legacy mode is not supported and uses system interface.
Current implementation supports GIC secure state only.
All interrupts are routed to Secure EL1 as 'irq' by configuring
them as Group1 Secure.
TODO:
- MPIDR based affinity routing setting.
- percpu redistributor probe
- message based SPI and SGI generation api
- EL1NS support. Legacy mode support.
- LPI/ITS is not supported.
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Port the I2S and DMIC drivers to the new timeout API so that they do
not need to enable legacy timeouts.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
As we phase out per instance Kconfig symbols convert to utilize
DT_DRV_INST to initialize CAN instances.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As we phase out per instance Kconfig symbols convert to utilize
DT_DRV_INST to initialize CAN instances.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a build-time assert to check that the configured SHM_SIZE
does not exceed the memory allocated as shared memory. USe DT
to extract the shared memory size.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The sam0 has a page size of 64 bytes, making it incompatible with
the nvs driver that specifies a maximum write block size of
32 bytes. When CONFIG_SOC_FLASH_SAM0_EMULATE_BYTE_PAGES is set,
it should report a write block size of 1 byte, which is compatible
with nvs.
Signed-off-by: Adam Serbinski <aserbinski@gmail.com>
The dpd-wake-sequence has a value that is an array of three integers,
which was formerly indexed by a suffix on the property name. This was
updated to new accessors but failed to separate the index from the
property name. Update the access idiom.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Convert to using DT_INST_LABEL() in the dma driver and convert dma users
to use the DMA property macros to get the dma controller name. We make
the assumption in the drivers that there is a single DMA controller
instance.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Had an extra comma between macro and macro usage that casued the
following compile error:
adc_shell.c:477:22: error: expected expression before ',' token
Easy fix to remove trailing comma in ADC_SHELL_COMMAND
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Clean up as we wish to move away from using these Kconfig settings.
Also removing them from the boards' default config.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Make drivers multi-instance wherever possible using DT_INST_FOREACH.
This allows removing DT_HAS_DRV_INST in favor of making drivers just
do the right thing regardless of how many instances there are.
There are a few exceptions:
- SoC drivers which use CMake input files (like i2c_dw.c) or otherwise
would require more time to convert than I have at the moment. For the
sake of expediency, just inline the DT_HAS_DRV_INST expansion for
now in these cases.
- SoC drivers which are explicitly single-instance (like the nRF SAADC
driver). Again for the sake of expediency, drop a BUILD_ASSERT in
those cases to make sure the assumption that all supported SoCs have
at most one available instance is valid, failing fast otherwise.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The TPM (Timer/PWM Module) is a 2- to 8-channel timer which supports
input capture, output compare, and the generation of PWM signals to
control electric motor and power management applications.
This patch adds the driver and the binding necessary for instantiating
the driver. The work is based on the RV32M1 driver for TPM done by
Henrik Brix Andersen. A later patch will enable this driver to be used
for the KW41Z SoC, if PWM support is requested.
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
* Define USB driver for base stm32wb device.
* Enable USB for the nucleo_wb55rg board.
* Properly initialize USB power + clock for the platform.
Signed-off-by: Pete Johanson <peter@peterjohanson.com>
Use the endop bit in the status register (instead of using a k_sleep)
to wait until the current shub operation is completed.
Please note that the recent changes to k_sleep() API was also
breaking the compilation.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear. As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert all canbus related API/samples/tests/subsys
to the new timeout API with k_timeout_t.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
We can utilize the devicetree macros to determine which instances to
enable. This will allow us to phase out the per instance Kconfig
symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This reverts commit 90cc723e65.
Using `DMAC_CHCTRLA_TRIGACT_BLOCK` breaks SERCOM UART peripheral DMA
operations (DMA-based asynchronous UART transmit operation only sends
the first byte and does not proceed any further).
The `DMAC_CHCTRLA_TRIGACT_BURST` with `DMAC_CHCTRLA_BURSTLEN(0)` is a
special case utilising the "internal FIFO", according to the datasheet
(see DS60001507E; 22.6.2.8), and should always be specified for
peripheral data transfer operations.
Also it is worth noting that Atmel and other third-party drivers use
the aforementioned "internal FIFO" configuration for peripheral data
transfers as well.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The channel direction for a V1 DMA is not allowed to be memory to memory
and there is a check in place for this. However, the check is being
performed on the stream prior to actually configuring the stream. This
results in the check always failing regardless of the channel direction.
The check has been modified to be performed on the incoming
configuration.
Signed-off-by: Abe Kohandel <abe@electronshepherds.com>
Fix I2C bit banging REPEATED START condition function by ensuring both
SDA and SCL are high before generating the REPEATED START.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix I2C bit banging STOP condition function to not create a stray
START condition if SDA is high on entry. Instead, set SDA to LOW
before generating the STOP condition.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This patch prepares the dma and introduces the dmamux on soc series
which supports this feature for memory/periph transfers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix some wrong assignments for SPI2 and add all other alternative
functions for USART, I2C, SPI and CAN according to STM32F091VC
datasheet, which is at the top end of this series.
https://www.st.com/resource/en/datasheet/stm32f091vc.pdf
Signed-off-by: Martin Jäger <martin@libre.solar>
Following other drivers, Kconfig based instances are now entirely
removed. In order to do this change, PWM nodes in board DT files have
been given a pwm{N} label so that both:
- DT API checks such as #if DT_HAS_NODE(DT_NODELABEL(pwmN)) can be
used (N being PWM instance number).
- DT references can be written as pwms = <&pwmN x y>; instead of
pwms = <&{/soc/timers@XXXXXXXX/pwm} x y>;
This approach is also used on the Linux Kernel.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Convert the GPIO bit banging I2C controller driver to use devicetree
bindings for configuring instances.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The optimisation in `spi_sam0_fast_txrx()` is broken, loading
two bytes into the `DATA` register in rapid succession will lose
one byte.
This can be observed by running `tests/drivers/spi/spi_loopback`.
The test will get stuck in `spi_sam0_fast_txrx()` forever waiting
for the final byte.
Undo this small optimisation and only load the next byte into the
`DATA` register after the response has been received.
This fixes `tests/drivers/spi/spi_loopback`.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Move to using NODELABEL references to enable driver instances for
PWM0..3. This will allow us to remove per-instance PWM Kconfig symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The PS/2 driver was enabled with a single mouse and kb brand.
However, when plugging other mice brands, the interaction between the
driver and the device(mouse) was broken. A delay after inhibithing
the PS/2 instance helped the internal FSM to start the TX process.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Get rid of legacy timeout API and move to new timeout API for LoRa.
This involves changes to API, SX1276 driver and sample application.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
The LoRa APIs are expected to undergo some change as the usecase get's
increased. So let's mark it as experimental until the APIs got
stabililized.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
The RTC/Counter implementation doesn't fit for the upcoming LoRaWAN
as most of the Counter drivers in Zephyr works with 1s granularity
which is not enough for LoRaWAN stack. So, k_timer calls are used in
place of Counter's alarm and k_uptime_get() APIs are used in place of
Counter's time keeping.
While at it, lets also fixup the broken alarm implementation.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reworked sam_gmac driver to get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h
We remove defines from soc_pinmap.h that are no longer needed due to
getting all that information from devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The DMA callback function now controls the tx or rx buffers
and reload dma in case of multiple trnasfer before the transfer ends
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Enable dma operations with or w/o a dmamux on STM32
for SPI periph/memory operations.
Use the pi dma client with dma macros
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch is disabling the dma channel before reloading
source and dest for memory and peripheral addresses
Then the channel is enabled to re-launch the transfer.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Replace having dts_fixup.h files define DT_ADC_{0..2}_NAME with using
the new devicetree.h macros. We test to see what driver compat is
enabled via DT_HAS_COMPAT and set DT_DRV_COMPAT to that compat. Than we
can utilize the DT_INST_LABEL() macro to extract the name of the device.
We also replace the Kconfig ADC_{0..2} symbols with DT_HAS_DRV_INST.
This will allow us to remove those Kconfig symbols as this was the only
usage.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We want to limit DT_ prefix to macros from devicetree.h and generation.
So rename DT_USB* to just USB*.
Also fixup how USB_MAXIMUM_SPEED was defined. We should only define it
if the property exists.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Substitute integral constants where call sites passed named constants
that have timeout values as arguments to parameters that expect
millisecond durations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Do not assume in the SoC level device trees that NXP Kinetis FlexTimer
nodes will always be configured as PWM. Instead, configure FlexTimer
nodes for PWM at the board level for NXP Kinetis boards.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The goto instruction was removed when adding the RX thread.
While still working, this clearly break the clean handling of
error cases.
Re-instantiate the goto instruction.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
ipm_busy is meant to be used as mutex on transport layer accesses.
Due to wrong configuration on rx_thread, imp_busy was a no-op.
Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
We want to limit DT_ prefix to macros from devicetree.h and generation.
So rename DT_LIS2DH_INT* to just LIS2DH_INT*.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We want to limit DT_ prefix to macros from devicetree.h and generation.
So rename DT_INST_AT2X* to just INST_DT_AT2X*.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We want to limit DT_ prefix to macros from devicetree.h and generation.
So rename DT_INST_MCP320X* to just INST_DT_MCP320X*.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On cortex M4, AHB clock is equal to SystemCoreClock
On Cortex M7, AHB clock is equal to SystemCoreClock/HPRE
By the way, D1CPRE is of no use when starting from SystemCoreColck.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
TCP contexts are referenced twice,
once for the app and once for the stack.
Since TCP stack is not used for offload,
unref a second time to release the context.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Convert CAN to use a chosen node property that is similar to how we
handle zephyr,entroy or zephyr,flash-controller as the means to select a
specific peripheral instance utilized by a subsystem.
Replace references of the form:
alias {
can-primary = &can1;
};
with:
chosen {
zephyr,can-primary = &can1;
};
Replace various macro/define references with either
DT_CHOSEN(zephyr_can_primary) or replace DT_ALIAS_CAN_PRIMARY_LABEL
with DT_CHOSEN_ZEPHYR_CAN_PRIMARY_LABEL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks from devicetree.
We add a property ('calib-offset') for the SAM{D,E}5x family of SoCs
that is the bit position offset from ADC0 BIASCOMP in the NVM Software
Calibration Area Mapping. For ADC0 this is typically 0 and for ADC1
this will be 14.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use new DT_INST macros throughout. Removed per
instance Kconfig symbols and replaced with DT_NODELABEL references
where needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use new DT_INST macros throughout. Removed per
instance Kconfig symbols and replaced with DT_NODELABEL references
where needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the missing prefix z_ required to make the ESP32 version override
the weak implementation.
General practice in ESP32 seems to be to use the MAC address, so
extract that in its canonical byte order.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new path access helpers to avoid hard-coding devicetree paths
in Kconfig, which is a bit messy.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Remove logging of individual threads spread out throughout the
bluetooth subsystem. The stacks can be analysed by enabling the
following options.
CONFIG_THREAD_ANALYZER=y
CONFIG_THREAD_ANALYZER_AUTO=y
CONFIG_THREAD_ANALYZER_RUN_UNLOCKED=y
Optional:
CONFIG_THREAD_NAME=y
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Convert driver to use the new device tree macro's instead of
dts_fixup.h based macros. This moves us closer to removing both
dts_fixup.h and per instance Kconfig symbols.
The pinmux_mchp_xec is also being updated since it's using DT
from GPIO.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Convert driver to use the new device tree macro's instead of
dts_fixup.h based macros. This moves us closer to removing both
dts_fixup.h and per instance Kconfig symbols.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Convert driver to use instance macro's instead of dts_fixup.h based
macros. This moves us closer to removing both dts_fixup.h and per
instance Kconfig symbols.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add a Kconfig option that allows user to set any necessary config
using management interface before interface be operational. A use
case is set the EUI-64 address from an external EEPROM by the
NET_REQUEST_IEEE802154_SET_EXT_ADDR command. After all configs
are done net_if_up() can be invoked to bring interface up.
Fixes#23193.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add local-mac-address on DT and enable it on rf2xx driver. If user
define local-mac-address this value will be used as default mac address.
Otherwise driver automatically add a random mac address.
On application level user can change default mac address using net_mgmt
command with NET_REQUEST_IEEE802154_SET_EXT_ADDR parameter defined on
include/net/ieee802154_mgmt.h header.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Replace DT_FLASH_DEV_NAME with DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL.
We now set zephyr,flash-controller in the chosen node of the device
tree to the flash controller device.
NOTE: For a SoCs with on die flash, this points to the controller and
not the 'soc-nv-flash' node. Typically the controller is the
parent of the 'soc-nv-flash' node).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fasten events handling by unloading callback treatment.
A RX thread is created. IPM RX events are dumped in a FIFO
which is processed in the thread context.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use DT_INST_FOREACH macro to combine code used for multiple instances.
Remove unnecessary Kconfig options and dts fixups for GPIO instances.
A side-effect to using DT_INST_FOREACH is that GPIO ports A0 and A3
are now enabled, whereas they were originally disabled by default as
an optimization.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Changing more of DT_* prefixed macros that refer to instances to use
DT_INST macros in GPIO, I2C and UART drivers.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Convert various DT_DTCM_* macros to use DT_CHOSEN(zephyr_dtcm) and
associated macros from devicetree.h.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert pinmux driver to use nodelabels to get references to devicetree
nodes using the new devicetree.h macros.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert gpio driver to use nodelabels to get references to devicetree
nodes using the new devicetree.h macros.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks from devicetree. Move the prescaler setting
from Kconfig to devicetree as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rename DT_L2_SRAM_* to just L2_SRAM_* and set it using new DT macros.
Do something similar for DT_LP_SRAM_* renamed to LP_SRAM_*
Updated the intel_gna driver as it used the DT_L2_SRAM_* defines.
This change also lets us remove dts_fixup.h on intel_s1000 and
intel_apl_adsp SoCs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks and dma from devicetree. We update the
atmel,sam0-spi binding for dma to replace the rxdma and txdma
properties with proper 'dmas' property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks and dma from devicetree. We update the
atmel,sam0-i2c binding for dma to replace the dma property with
proper 'dmas' property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Reworked spi_sam driver to utilize new DT_INST macros as part of
this rework we also now get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h
We remove defines from dts_fixup.h and soc_pinmap.h and associated
Kconfig symbols that are no longer needed due to getting all that
information from devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use NODELABEL macros rather than DT_INST as this driver is so far
limited to support of LPTIM1 instance.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert the driver to use the new dt macros. As part of this change we
remove a bunch of defines that happened in dts_fixup.h that didn't
belong there. Some of these should be converted to devicetree
properties at some point.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When notifying the handler that GPIO interrupt has occurred
pass only pins that are associated with this handler.
Fixes: #24634
Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
Tests were failing as they were looking for an alias which didn't exist
Also, because some code in kscan_handlers.c wasn't compilable
Signed-off-by: Mark Olsson <mark@markolsson.se>
Replace DT_CPU_CLOCK_FREQUENCY with a PATH based reference to cpu@0
(DT_PATH(cpus, cpu_0)) and than getting the clock_frequency property:
DT_CPU_CLOCK_FREQUENCY -> DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)
This lets us remove DT_CPU_CLOCK_FREQUENCY from dts_fixup.h.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use DT_INST_FOREACH macro to combine code used for multiple instances.
Remove unnecessary Kconfig options for UART instances.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Adding port information for uart tx and rx pins in dts, so that it can
be more systematically retrieved in the uart driver.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Convert driver to use DT_INST_ defines. As part of this conversion we
remove the Kconfig options for per GPIO controller enables and instead
get that information from device tree. This means we now disable each
GPIO controller by default in the DTS and have each board dts enable the
GPIO controller ports it needs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Although it is not clearly specified in the UART API, this function
is supposed to return 0 when the TX interrupt is disabled, regardless
of whether anything could fit into the TX buffer or not (this can be
concluded from looking at implementations of several samples and tests
present in the tree, also almost all UART drivers are implemented this
way).
The problem in the uart_nrfx_uarte driver case is that the flag that
allows generation of the TX interrupt is not cleared directly in the
uart_irq_tx_disable() function but this clearing is deferred to the
end of the current transmission, in case one is in progress, and hence
it is done in the interrupt handler. Consequently, when the interrupt
handler is not entered between calls to uart_irq_tx_disable() and
uart_irq_tx_ready() (e.g. when both functions are called in a loop
executed in the interrupt context), the latter may return an invalid
value.
Fix this problem by additionally checking if the TX interrupt was
requested to be disabled, not only if it is already disabled in
hardware.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Espi bus interrupts need to re-enable after espi reset to get
all espi bus and vw signal interrupts.
Signed-off-by: Venkataramana Kotakonda <venkataramana.kotakonda@intel.com>
Epsi slave need to respond with an OOB_RST_ACK for OOB_RST_WARN sent by
master during host reset. Enable interrupt for OOB_RST_WARN to receive
signal changes and respond with ACK.
Signed-off-by: Venkataramana Kotakonda <venkataramana.kotakonda@intel.com>
The check of the SF_TXDATA_FULL flag is only done on the register
address and not on the actual register content.
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
Convert driver to use instance macro's instead of dts_fixup.h based
macros. This moves us closer to removing both dts_fixup.h and per
instance Kconfig symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Reworked adc_sam_afec driver to utilize new DT_INST macros as part of
this rework we also now get pin ctrl/mux configuration information
from the device tree instead of via Kconfig and defines in soc_pinmap.h
We remove defines from dts_fixup.h and soc_pinmap.h and associated
Kconfig symbols that are no longer needed due to getting all that
information from devicetree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use new DT_INST macros throughout. We also remove
defines in dts_fixup.h as they are no longer needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use new DT_INST macros throughout. We update one
sample app to use a nodelabel reference. We also remove defines in
dts_fixup.h as they are no longer needed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rework the devicetree to utilize new DT_INST macros and extract per
instance data for clocks and dma from devicetree. We update the
atmel,sam0-uart binding for dma to replace the rxdma and txdma
properties with proper 'dmas' property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Si7006-A20 rev. 1.2 datasheet, section 5.1.2. Measuring Temperature
says that:
"Each time a relative humidity measurement is made a temperature
measurement is also made for the purposes of temperature compensation of
the relative humidity measurement. If the temperature value is required,
it can be read using command 0xE0; this avoids having to perform a
second temperature measurement."
Respective improvement is implemented.
Signed-off-by: Max Payne <forgge@gmail.com>
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
The driver was incorrectly converting the temperature samples. According
to Si7006-A20 rev. 1.2 datasheet, section 5.1.2. Measuring Temperature,
the offset -46.85 must be applied.
Signed-off-by: Max Payne <forgge@gmail.com>
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
User reported a flaw in the current algorithm which fails when Zero
Latency Interrupts (ZLI) are used. Ported algorithm from
counter_nrfx_rtc.c which covers all cases. Algorithm is lockless so
no distinction for ZLI is needed.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add I2C1 SDA/SCL configuration on pins PA9 and PA10, as they are
currently only available on other pins.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The driver was extended so that the tests/drivers/uart/uart_basic_api
test case now passes. The following modifications were made for the
following items of the test case:
* test_uart_configure
* test_uart_config_get
The driver was missing the support to re-configure the UART at run-time
as well as to obtain the current configuration at run-time via the
.configure and .config_get hooks provided within the UART driver API.
For the flow control setting, bit (mask) definitions were added for the
Modem Control Register. Both the configuration get and set functions
come with auxiliary functions that convert configuration register bit
masks to the UART driver API's enumeration types and vice versa.
For run-time configurability, the device's data struct is required un-
conditionally, previously, it was only available whenever interrupt-
driven mode was enabled. Consequently, the device initialization was
simplified to a single call of the DEVICE_AND_API_INIT macro, as the
existance of the device's data struct is now no longer conditional.
* test_uart_fifo_fill
For the user callback function of the test case to receive the initial
'Ready to TX' indication upon which the TX FIFO is filled, it is
necessary that uart_xlnx_ps_irq_tx_enable also sets the TX FIFO empty
bit in the Interrupt Enable Register. Consequently, the same modifi-
cation applies to the irq_tx_disable function.
* test_uart_fifo_read
During inital device configuration, the RX FIFO interrupt trigger
level has to be set to 1 byte for now, as the test case doesn't poll
the incoming data in a while()-loop, therefore, it misses the CR/LF
if more than one character is in the RX FIFO at the time of the
interrupt and neither CR nor LF is the first character.
Whenever the state of an interrupt is checked by the user callback
function (uart_xlnx_ps_irq_tx_ready, uart_xlnx_ps_irq_rx_ready),
the corresponding bits are cleared in the Interrupt Status Register,
re-enabling interrupts generated by the corresponding source.
Tested on QEMU (R5, A9) and actual Zynq7000 hardware.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Added the SERIAL_SUPPORT_INTERRUPT feature flag to the driver's
configuration file. This flag was missing, although the driver
supports interrupt-driven operation.
Interrupt support is required for testcases using the UART_PIPE
feature on the upcoming Cortex-A9 targets (QEMU/Zynq-7000).
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Fix for the UART_XLNX_PS_IRQ_CONF_FUNC macro, which wraps IRQ_CONNECT
into a function for each device instance. This macro had device
instance #0 hardcoded at one point.
Interrupt support is required for test cases using the UART_PIPE
feature on the upcoming Cortex-A9 targets (QEMU/Zynq-7000).
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Following the practice for i.MX decoding assume the 32-bit identifier
values need to be converted to big-endian representation for
device-independent interpretation.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Resources indicate that CFG2 holds the upper 32 bits, and CFG1 the
lower 32 bits, of a 64-bit unique identifier. Store it in big-endian
format so it reads correctly when accessed as a byte sequence.
https://community.nxp.com/docs/DOC-94459
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
In some cases (eg at high baud rate, no HW flow control, and when BLE
radio/ints running) data could be lost between when enough characters
have been RX'd to fill the DMA buffer and when the ENDRX event was
fired, where the the STARTRX task is invoked to start filling the next
buffer (which is set up earlier, but I think will not be filled until
STARTRX).
To fix this, the SHORT is enabled between ENDRX and STARTRX whenever the
'next' buffer is available, so that STARTRX is invoked automatically and
subsequent chars go into the next buffer via EasyDMA.
To make this work properly, uarte_nrfx_isr_async() now handles the ENDRX
event _before_ the STARTRX event.
There was also an issue in rx_timeout() where the received character
count (rx_total_byte_count) could be incremented greater than the actual
buffer size. This arises from rx_total_byte_count value coming from the
counting the RXDRDY events (either by PPI/timer counter or counting the
RXDRDY ints themselves) and so if chars are received in the rx_timeout()
(or before ENDRX is handled) the rx_timeout() could increment rx_offset
past the length of the buffer. This could result the remaining 'len'
being calculated incorrectly (an underflow due to unsigned - signed ,
where signed > unsigned).
To fix this, we now store the lengths of the buffers and don't invoke
the UART_RX_RDY callback when the buffers are full; its handled by
ENDRX.
(Also note that the buffer size should be available via the RXD.MAXCNT
register on the nrf, but this register is not exposed through the nrfx
HAL and is also double buffered, so it seemed clearer to just track the
buffer lengths explicitly here in the driver).
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
for fixup
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Convert driver to use new DT_INST macros throughout. This allows us to
also remove dts_fixup.h that are no longer used.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace various drivers and soc code that use DT_CAVS_ICTL_BASE_ADDR
with DT_REG_ADDR(DT_NODELABEL(cavs0)).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>