Commit graph

7653 commits

Author SHA1 Message Date
Sandeep Tripathy 2e42a7028d drivers: interrupt_controller: gicv3: Skip typr for SGI
SGI are always edge triggered. Interrupt type configuration
is not available for SGI.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
2020-07-01 08:02:57 -04:00
Sandeep Tripathy 8aa0248acd drivers: interrupt_controller: Add gicv3 SGI api
Add api to raise SGI to target cores in affinity level identified
by MPIDR. Currently only EL1S is supported.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
2020-07-01 08:02:57 -04:00
Andy Ross b466e579a3 drivers/timer/hpet: Disable FSB interrupts
The front side bus interrupt delivery feature is a somewhat obscure
part of PC history (in some sense a presaging of MSI interrupts) that
we don't use.

But it's part of the spec, works on hardware, has precedence over the
"legacy" interrupt routing feature we do use, and can be legally
enabled by firmware.

Disable at init time.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-06-30 21:37:54 -04:00
Kumar Gala 4cc93041db drivers: flash: atmel_sam: Fix build error
There is a typo in the function pointer assigned to get_parameters.  It
should be flash_sam_get_parameters.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-30 12:51:29 -05:00
Dominik Ermel 849a5432df drivers/flash/fash_simulator: Fix initialization for non-posix
Simulated flash, in non-POSIX compilation path, has been initialized to
incorrect value.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-06-29 15:48:45 -04:00
Sandeep Tripathy ccb4b1ec47 drivers: interrupt_controller: GIC barrier before EOI
It is desired to have the peripheral writes completed to clear the
interrupt condition and de-assert the interrupt request to GIC before
EOI write. Failing which spurious interrupt will occur.

A barrier is needed to ensure peripheral register write transfers are
complete before EOI is done.

GICv2 memory mapped DEVICE nGnR(n)E writes are ordered from core point
of view. However these writes may pass over different interconnects,
bridges, buffers leaving some rare chances for the actual write to
complete out of order.

GICv3 ICC EOI system register writes have no ordering against nGnR(n)E
memory writes as they are over different interfaces.

Hence a dsb can ensure from core no writes are issued before the
previous writes are *complete*.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
2020-06-28 23:47:58 -04:00
Marcin Niestroj 51666b8130 lora: select REQUIRES_FULL_LIBC when LORA=y
Right now we depend on NEWLIB_LIBC to build Zephyr with LORA=y. This
seems to be the only Kconfig option like that. Convert it to select
REQUIRES_FULL_LIBC instead, which will select NEWLIB_LIBC by default and
allow to use external libc as well.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-27 08:19:05 -04:00
laurence pasteau 0388a26a19 lis2dw12 : remove useless semi-colons
cleaning commit to remove useless semi-colons in lis2dw12 trigger

Signed-off-by: laurence pasteau <laurence.pasteau@stimio.fr>
2020-06-26 11:18:38 -05:00
laurence pasteau ba3a6dce95 sensors : fix bad pin value when disabling interruption
In sensors drivers, in gpio callback function :
The device structure in parameter is related to the gpio device.

Signed-off-by: laurence pasteau <laurence.pasteau@stimio.fr>
2020-06-26 11:18:38 -05:00
Tomasz Bursztyka 8260736268 drivers: Remove useless device start/end pointers
Commit id a538dcd8f8 got rid of the usage of these pointers so they are
useless now and can be removed in this drivers.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-06-26 11:09:28 -05:00
Jiří Keresteš 0126c9f46a drivers: serial: Fix uart_poll_in() for mcux flexcomm driver
Replaces kUSART_RxFifoFullFlag with kUSART_RxFifoNotEmptyFlag to
prevent Rx FIFO overrun.

Signed-off-by: Jiří Keresteš <jiri@kerestes.cz>
2020-06-26 11:00:48 -05:00
Christian Taedcke ba7a5408ab drivers: serial: gecko: Use init macros
Convert the present initialization code into initialization macros.
Since both the uart and the usart peripheral is implemented, two sets
of initialization macros are necessary.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-06-25 23:31:51 -05:00
Marcin Niestroj 3c55e1fcf3 lora: shell: use strtoul instead of strtoll
Parsed value is expected to be in range (0, UINT32_MAX). Use strtoul
instead of strtoll, so we better match its range. In a tested
configuration this saves 380 bytes of flash with newlib and arm32
target.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-25 16:17:27 -05:00
Rajavardhan Gundi e71e803674 drivers: espi: Add support for ACPI_EC1 interface
This enables the ACPI_EC1 interface which is typically accessed
through ports 0x6A0 and 0x6A4 in Bios.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2020-06-25 17:05:43 -04:00
Andrzej Głąbek c79620b722 drivers/flash/spi_flash_at45: Fix compilation errors
For some reason, use of the DT_NUM_INST macro in this driver was not
replaced with DT_NUM_INST_STATUS_OKAY. In consequence, this driver
could not be compiled successfully. Furthermore, because this now
undefined macro had been used inside UTIL_LISTIFY, gcc was not even
able to report an error, instead the compilation just "froze".
This patch replaces UTIL_LISTIFY(DT_NUM_INST()) with more appropriate
in this context DT_INST_FOREACH_STATUS_OKAY. It also adds an apparently
missing inclusion of sys/byteorder.h.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-06-25 19:33:41 +02:00
Anas Nashif de57d60732 pcie: shell: add subcommands
pcie has an all in one command for listing pci devices. Make it support
additional commands and move lspcie to `pcie ls`.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-06-24 21:37:12 -04:00
Anas Nashif ee985d81aa shell: enable modules by default if shell is enabled
If shell is enabled then enable all sub-shells if their dependencies are
satisfied. This was done for some modules and subsystems but was not
consistent.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-06-24 21:37:12 -04:00
Jukka Rissanen da2db1ce53 drivers: eth: native_posix: Print errno when interface creation fails
Printing the file descriptor does not give any information when
the network interface creation fails, so print errno here instead.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-06-24 23:34:27 +03:00
Michael Hope ad7ea0d498 drivers: usb: fix usb_dc_ep_mps() for the SAM0 for IN endpoints
The driver was returning zero due to accessing the, say, 0x81'th
endpoint instead of the 0x01'th endpoint.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-24 21:00:59 +02:00
Venkataramana Kotakonda 69aa4eeee6 driver: espi: Enable espi uart port sirq based on uart mapping.
Espi has three uart port from 0 to 2 and uart sirq need to enabled for
the port which is active in the hardware. An active uart sirq shoudl be
enabled based on uart mapping configuration.

Signed-off-by: Venkataramana Kotakonda <venkataramana.kotakonda@intel.com>
2020-06-23 19:22:46 +02:00
Kwon Tae-young a4d5207675 drivers: pinmux: stm32f7: CAN, SPI, I2C pinmuxes added
All pinmux supporting CAN, SPI and I2C of F7 series are added.
Since the F7 series supports up to two CANs,
the pin names of CANs have been changed.

Several minor pinmux errors have also been fixed.
Sorted by Alternate function.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2020-06-23 19:05:26 +02:00
Giancarlo Stasi 259b30016b drivers: timer: stm32 lptim minor fix and optimization
Avoid reading LPTIM counter four times instead of three when second
read doesn't give same value. Use common code, avoid volatile for
local vars.

Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
2020-06-23 19:05:16 +02:00
Giancarlo Stasi 82a08a7678 drivers: clock: stm32: fix Flash latency & clock settings for MSI & HSE
According to RM, when increasing the CPU frequency, the new number of
wait states to the Flash latency bits must be written and verified
before modifying the CPU clock source and/or the CPU clock prescaler,
to prevent NMI to occur; when decreasing the CPU frequency, after.
Tested with STM32L462 SOC and MSI with several frequencies, both
increasing and decreasing. HSE built, not tested.

Signed-off-by: Giancarlo Stasi <giancarlo.stasi@nexxiot.com>
2020-06-23 17:32:38 +02:00
Peter Bigot a538dcd8f8 shell: refactor device_name_get implementation
Several shell modules use cloned code to iterate over all devices and
identify the nth instance that meets some criteria.  The code was
repetitive and included various errors.  Abstract to a helper function
that performs the check consistently.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-23 13:27:14 +02:00
Marcin Niestroj af67b297a3 drivers: lora: sx1276: support antenna power enable
RF SPDT switches used for RX/TX selection have often power enable pin
connected to MCU's GPIO, so it is possible to disable it to save power
when not doing any data transfers. Add 'antenna-enable-gpios' property
to support such designs.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-23 13:08:06 +02:00
Marcin Niestroj 35328cc537 drivers: lora: sx1276: support TCXO power control
Add support for TCXO power control using GPIO pin. Some boards
(including B-L072Z-LRWAN1 already supported in Zephyr) need delay
applied after powering on TCXO, so add device-tree property allowing to
configure that as well. Cache information about TCXO power status, so
subsequent requests to enable it will not result in unnecessary delays.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-23 13:08:06 +02:00
Marcin Niestroj 2aa161a121 drivers: lora: sx1276: support RFI/RFO/PA_BOOST antenna selection
There are several antenna path designs on SX1276 compatible boards in
the wild. B-L072Z-LRWAN1 board has dedicated enable pins for RFI, RFO
and PA_BOOST. This is exactly what this patch allows to
configure. Second variant of antenna selection is done with a single
GPIO pin, which controls RF SPDT switches (input or output). This is
also supported, when either 'rfo-enable-gpios' or
'pa-boost-enable-gpios' property is provided alone (RFO/PA_BOOST is
selected only when transmitting, so there is no need for explicit
'rfi-enable-gpios' configuration).

Drop requirement for 'power-amplifier-output' DT property when there is
either 'rfo-enable-gpios' or 'pa-boost-enable-gpios' configured. Fail
using BUILD_ASSERT() when neither is specified.

Make the SX1276SetAntSw() logic similar to loramac-node examples
implementation, so RFO/PA_BOOST is enabled only in
RFLR_OPMODE_TRANSMITTER.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-23 13:08:06 +02:00
Marcin Niestroj f08ef736a0 drivers: lora: sx1276: select PA output by dts property
PA selection mainly depends on board design. So it looks like
device-tree is a better mechanism than Kconfig in this case. Use string
property with two possible values: "rfo" and "pa-boost".

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-23 13:08:06 +02:00
Marcin Niestroj d1ba1ca5a5 drivers: lora: sx1276: stop reading PA_CONFIG
All fields in PA_CONFIG register are set explicitly, so there is no need
to read this register first.

Suggested-by: Andreas Sandberg <andreas@sandberg.pp.se>
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-23 13:08:06 +02:00
Andreas Sandberg 8d332adf1a drivers: lora: sx1276: fix RFO TX power configuration
The PA_CONFIG register is currently not setup correctly for the RFO
path. The biggest problem is that the output power is incorrectly set
1dBm higher than requested. Additionally, the lower power levels are
not configured properly since the max power field in PA_CONFIG is
always configured for an output power between 0 and 15dBm.

To support lower than 0dBm, adjust the max power field in the
PA_CONFIG register to shift the output power range to -4--11 dBm when
the requested power is 0 or lower.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
[Marcin: rebase on master]
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-23 13:08:06 +02:00
Marcin Niestroj ba0a791635 flash: shell: align test array on 4 bytes
Some flash controllers support operations only when buffers are word
aligned. An example of such is nRF QSPI, which checks input buffer using
nrfx_is_word_aligned() function inside nrfx_qspi_write().

Align test array on 4 bytes, so we will gain compatibility with more
flash controllers, including nRF QSPI.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-22 20:43:59 -04:00
Krzysztof Chruscinski b8781e27b0 sys: util: Deprecate GET_ARGS_LESS_1 macro
GET_ARGS_LESS_N must be used instead.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-22 15:18:07 +02:00
Krzysztof Chruscinski 0afb3445a5 sys: util: Deprecate GET_ARG1 macro
GET_ARG_N(1,...) can be used instead.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-22 15:18:07 +02:00
Dominik Ermel 609b645ac7 drivers/flash: Move write_block_size into flash_parameters
With addition of flash_parameters structure, and supporting API call
to retrieve it, it is no longer needed to store write_block_size as
a part of flash_driver_api and it should be part of flash_parameters.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-06-22 14:35:03 +02:00
Dominik Ermel 6ea6321586 drivers/flash: Add support for flash_get_parameters to drivers
With addition of flash_get_parameters API call, it is needed to provide
support for the API to flash drivers.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-06-22 14:35:03 +02:00
Abhishek Shah 11972a48c2 drivers: pcie: ep: iproc: Add reset callback support
Add support to register callback function for each PCIe reset.
These callback functions are executed from corresponding
PCIe reset interrupt handler if registered.

Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-06-22 12:44:54 +02:00
Abhishek Shah 7d587abc6e drivers: pcie: ep: iproc: Add reset interrupt handlers
Add reset interrupt handlers for all three types of reset
interrupts that iProc PCIe EP can receive - namely PERST,
INB PERST and FLR.

Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-06-22 12:44:54 +02:00
Gerard Marull-Paretas 76f0d72e5d drivers: pwm: stm32: add support for polarity
Add support for the polarity flag in the STM32 PWM driver.

STM32 boards using PWM have been updated accordingly.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-06-19 15:18:50 +02:00
Gerard Marull-Paretas 528a98ba3f drivers: pwm: stm32: refactor driver using LL API
The PWM drivers has been refactored using the HAL LL API. Not only that,
but the set pin_set function is now faster, as channel output compare is
just initialized if needed.

NOTE: Has been tested using H743zi board for now.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-06-19 15:18:50 +02:00
Henrik Brix Andersen 696fc3afbf drivers: sensor: add api function for getting a sensor attribute
Add an API function for getting the value of a sensor attribute.

Fixes #26167.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-06-17 17:13:14 +02:00
Flavio Ceolin 1cd5578539 serial: ns16550: Simplify poll out
Simplify poll_out loop.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-06-17 17:10:59 +02:00
Flavio Ceolin 459dde17e5 serial: ns16550: Fix poll in
poll_in was dropping all data and return just the last character.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-06-17 17:10:59 +02:00
Ioannis Glaropoulos f1264b7e47 drivers: entropy: nrf5: add docs and a DSB in get_entropy_isr
Add a DSB before doing WFE in get_entropy_isr, to ensure
the memory transactions are complete.

Add a note clarifying a dependency for the existing solution
(dependency is satisfied by ARCH code but is good to state
clearly).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-06-17 15:55:44 +02:00
Ioannis Glaropoulos a182f74de9 drivers: entropy: nRF: clear NVIC pending before doing WFE on RNG IRQ
We need to clear the NVIC Pending bit for the RNG IRQ before
doing any WFEs and expect to wake up by RNG events. This is
because the event register will be set only if NVIC status
is changed from 0 to 1.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-06-17 15:55:44 +02:00
Johann Fischer 3f19918041 drivers: ssd16xx: add temperature sensor support
Appropriate WS can be loaded automatically if
the display controller has integrated temperature
sensor or an external sensor is connected.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-06-17 12:31:20 +02:00
Johann Fischer ac19e0f263 drivers: ssd16xx: support to load default WS from OTP
Add support to load default WS from OTP.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-06-17 12:31:20 +02:00
Maureen Helm 4475959285 drivers: sensor: Check i2c device pointer is non-null in bq274xx
Fixes the bq274xx sensor driver to check the i2c device pointer is
non-null, rather than the bq274xx sensor device pointer. This appears to
be the originally intended check based on the LOG_ERR message.

Coverity CID: 210035

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-06-17 09:31:16 +02:00
Karsten Koenig 189ae8c890 drivers: spi: rv32m1_lpspi: Fix null tx
Initialize the dummy data transfer so spi transfer is defined even for
an undefined tx data buffer. This aligns the rv32m1 spi driver with the
mcux spi driver.

Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2020-06-17 09:30:12 +02:00
Andrei Gansari 3722c643c9 drivers: eth: enc28j60: Misc fixes
Aligns MAC registers to the latest reference manual.
Replaces NULL buffers as some SPI drivers will fail.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-06-17 08:52:42 +03:00
Thomas Stenersen 7a8ac5e2e6 Bluetooth: hci: Depend on SOC not BOARD
The CONFIG_BT_RPMSG_NRF53 should depend on the SOC, not the BOARD
definition. Otherwise this will break for custom boards.

Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no>
2020-06-16 22:12:00 +02:00
Piotr Mienkowski 4b194eb4fc gpio: remove deprecated API functions/macros
This commit removes API functions and macros which were deprecated in
2.2 release. GPIO drivers are updated accordingly.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-06-16 19:13:05 +02:00
Krzysztof Chruscinski 8592d43191 drivers: uart: sam0: Reorder events on rx_disable
Modified order of reported events on rx disable to match API
description: first RX_RDY and then RX_BUF_RELEASED.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-16 19:11:57 +02:00
Krzysztof Chruscinski 6cb9199dfc drivers: uart: nrf_uart: Generate RX_RDY after rx_disable
So far, when rx_disable was called then received data was discarded.
This is currently not according to the API but it is needed if
rx_disabled is called due to out of band information about end of
packet.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-16 19:11:57 +02:00
Krzysztof Chruscinski 62087be265 drivers: uart: nrf_uarte: Generate RX_RDY after rx_disable
So far, when rx_disable was called then received data was discarded.
This is currently not according to the API but it is needed if
rx_disabled is called due to out of band information about end of
packet.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-16 19:11:57 +02:00
Markus Becker 51d84c9eb4 drivers: pinmux: stm32: add PWM pinmux on PA3 for F4 series
Add PWM2 CH4 functionality on PA3 pin.

Signed-off-by: Markus Becker <markus.becker@tridonic.com>
2020-06-16 19:11:35 +02:00
Jun Li 486dab02ec dma: stm32: implement get_status api
get_status api is not implemented in stm32 dma driver
but it will be used by others like async uart driver.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2020-06-16 10:55:19 -05:00
Daniel Leung afc1b9de13 timer: hpet: enable level triggering
The HPET timer was hard-coded to support only edge triggering
interrupts. This adds the necessary bits to enable level
triggering for the timer.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-06-16 10:52:43 -05:00
Peter Bigot 78f14aa91d drivers: i2c_dw: remove inappropriate assignment of API pointer
This is set when the device is defined, and should not be modified.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-16 10:46:39 -05:00
Peter Bigot 3cb335d0df drivers: gpio_intel_apl: remove inappropriate assignment of API pointer
This is set when the device is defined, and should not be modified.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-16 10:46:39 -05:00
Jun Li 8f7832cfb2 dma: stm32: increase driver init priority
DMA driver shall be initialized before any of its
clients. Right now, its initialization priority is
lower than that of UARTs. So, increase its init
priority to support future async uart drivers.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2020-06-16 16:37:24 +02:00
Mohamed ElShahawi f9e0fa9af3 drivers: esp32/clock_control: support UART, I2C
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
Mohamed ElShahawi 4acac3e9ef drivers: esp32/clock_control: Add Clock Driver
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).

- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
Henrik Brix Andersen 05da68c7cb drivers: sensor: shell: allow passing channel as number
Allow passing the channel as a number instead of a string in order to
support sensor-specific channels (channel SENSOR_CHAN_PRIV_START and
up).

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-06-15 12:59:20 -05:00
Jukka Rissanen fc713d1f6b drivers: eth: e1000: Enable VLAN support
Enable VLAN support so that this driver can be used to test
the VLAN when using qemu_x86 board.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-06-15 18:24:20 +03:00
Adam Porter 722a85aea2 drivers: wifi: remove dependency on NET_SOCKETS_POSIX_NAMES
This change removes references to raw POSIX types and functions,
allowing the drivers to build without NET_SOCKETS_POSIX_NAMES.

After this, the dependency between NET_SOCKETS_OFFLOAD and
NET_SOCKETS_POSIX_NAMES can be removed.

See issue #26033 for additional context

Signed-off-by: Adam Porter <porter.adam@gmail.com>
2020-06-15 16:59:36 +02:00
Michael Hope 18d3499dba drivers: usb: fix a buffer overflow in usb_sam0.c
The driver currently blindly copies all of the outgoing bytes into the
endpoint.  Instead, calculate the endpoint size and copy up to that
amount instead.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-15 16:56:05 +02:00
Michael Hope fe35269d12 drivers: usb: handle a null output arg on SAM0
The output parameter `ret_bytes` is optional and may be NULL.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-15 16:55:52 +02:00
Vincent Wan e7a85ddef9 drivers: entropy: add get_entropy_isr() for CC13x2/CC26x2
A non-blocking, isr-safe version of get_entropy() is necessary in order
to be called during boot time before POST_KERNEL initialization.
Otherwise a crash is seen as the existing get_entropy() implementation
uses k_sem and relies on interrupts.

Fixes #18629

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-06-15 16:53:39 +02:00
Flavio Ceolin 83d0c0a53e serial: uart_xlnx_ps: Fix duplicate initialization
The uart configuration was initializing two fields of an union.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-06-15 16:53:20 +02:00
Jose Alberto Meza a1b6dd51d0 drivers: espi: Add support for KBC status operations
In some systems, eSPI host perform operations directly over KBC HW
status.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-06-15 16:52:53 +02:00
Flavio Ceolin b0d1abac9c drivers: uart_mux: Add missing verfification handler
Add the verifcation handler for the syscall uart_mux_find.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-06-13 16:37:58 -04:00
Abhishek Shah ecc1673b78 pcie: endpoint: Add iProc PCIe EP driver
iProc PCIe EP IP is present in Broadcom PCIe offload chips.
Add iProc PCIe EP driver to provide basic PCIe EP functionality.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Shivaraj Shetty <shivaraj.shetty@broadcom.com>
2020-06-13 01:35:19 -07:00
Abhishek Shah 3c2fa8cd51 pcie: endpoint: Introduce API to achieve PCIe data transfer
Introduce common API to achieve data transfer using memcpy
to/from outbound region of PCIe EP.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-06-13 01:35:19 -07:00
Abhishek Shah ca17315d7f pcie: endpoint: Add public APIs for PCIe endpoint driver
Add public APIs for PCIe endpoint driver:
- EP configuration space read/write
- Mapping/Unmapping of Host buffer and PCIe outbound region
- Raise interrupt to Host
These are minimal base APIs to make PCIe EP functional.

Also, add a Kconfig and an empty CMakeLists.txt for drivers to extend.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-06-13 01:35:19 -07:00
Abhishek Shah bee0fdea1e drivers: pcie: remove depends on X86
Remove depends on X86 for config PCIE,
Let the platforms select PCIE if they want to.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-06-13 01:35:19 -07:00
Hake Huang 999c59c1ec dma: add error check on peripheral to peripheral
add dma direction check for dma_sam0

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-06-12 13:03:28 -05:00
Hake Huang 10fc7a38cc dma: add EDMA MCUX support for RT and k6s
tested on mimxrt1060_evt
  MEMORY_NOCACHE is needed
test on frdmk64f
  special test slot need configure with
  CONFIG_DMA_TEST_SLOT_START

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-06-12 13:03:28 -05:00
Hake Huang 6bb555ce83 clock_control: add EDMA clock support
add clock rate for RT series from ipg
Kinetis does not need additional clock added

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-06-12 13:03:28 -05:00
Anas Nashif 2ca3473349 spelling: fix typo
Fix some random typos..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-06-12 11:53:41 -04:00
Peter Bigot f2ac844cf7 drivers: flash: nrf_qspi_nor: optionally support write from NVMC
The Nordic QSPI peripheral uses DMA transfers so data to write must be
located in SRAM.  Add a Kconfig that enables copying data from NVMC to
a stack SRAM buffer so it can be written to flash.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-12 11:13:23 +02:00
Peter Bigot 16573923b3 drivers: flash: nrf_qspi_nor: support write of sub-word lengths
mcumgr and possibly mcuboot write single byte values to update the
state of objects.  Rather than fail to do the write of values too
short for this peripheral detect the situation and write from a stack
buffer that meets the length criteria.

Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-12 11:13:23 +02:00
Marcin Niestroj 5bf4ee4f6c drivers: flash: nrf_qspi_nor: support specifying only 2 io-pins
Currently user is forced to configure an array of 4 IO pins. This makes
no sense when there are only 2 IO pins connected on board.

Configure 3rd and 4th pin in internal structure as
NRF_QSPI_PIN_NOT_CONNECTED if only 2 were specified in device-tree.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-12 11:11:30 +02:00
Ilya Tagunov b899bbf9b9 soc: stm32l1: Enable DAC support
Enable STM32 DAC driver for STM32L1 series.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
2020-06-12 11:06:44 +02:00
Aurelien Jarno 6c798aa31c drivers: lora: sx1276: make GPIO CS pin optional
The cs-gpios pin on SPI controller is optional for SPI controllers that
can automatically control CS line.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2020-06-12 11:06:26 +02:00
Maureen Helm c603aa8928 drivers: serial: Fix uart_irq_tx_complete() in remaining mcux drivers
Extends the fix in commit 2175675199 to
all other mcux serial drivers. They were incorrectly checking if the
transmit buffer was empty when they should have been checking if the
transmission is complete.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-06-12 09:49:42 +02:00
Robert Lubos 041252b764 drivers: serial: nrfx_uart: Fix s32_t usage
s32_t was used instead of int32_t after the type transition in Zephyr.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-06-11 13:20:17 -05:00
Andreas Sandberg aec341e677 boards: arm: b_l072z_lrwan1: Enable the USB controller
The STM32L072CZ MCU has a built-in USB device controller which is
supported by Zephyr's USB STM32 driver. The b_l072z_lrwan1 board has a
micro-USB connector that is wired to the MCU via two solder bridges
(SB15 and SB16) that need to be closed to connect the data lines.

Update the board documentation to describe the solder bridges and
enable the USB controller in the device tree.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-11 13:11:59 -05:00
Andreas Sandberg a36147c9cb drivers: lora: Factor out sx12xx common functionality
LoRa radios supported by LoRaMAC-Node have a lot of common
functionality. Zephyr's LoRa implementation for the SX1276 uses
LoRaMAC-Nodes Radio HAL to implement API functionality like send and
recv. The exact same functionality will be used by the SX126x
driver. Facilitate sharing by moving that to a separate source file.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-11 07:15:34 -04:00
Andreas Sandberg 69fac5c498 drivers: lora: Move board support to a separate file
The implementation of the board support routines is shared between all
LoRa drivers that use LoRaMAC-Node. Move them from the SX1276
implementation to a separate source file to facilitate reuse. Make
this source file conditional on CONFIG_HAS_SEMTECH_RADIO_DRIVERS since
it will be used by all LoRaMAC-Node-based drivers.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-11 07:15:34 -04:00
Andy Liu 2175675199 drivers: serial: Fix "mcux_lpuart_irq_tx_complete" returns wrong result
Use "kLPUART_TransmissionCompleteFlag" instead of
"kLPUART_TxDataRegEmptyFlag" to check if the tx transmition is finished.

The "kLPUART_TxDataRegEmptyFlag" would give a wrong result
even if the transmition isn't over.

Signed-off-by: Andy Liu <andy@madmachine.io>
2020-06-11 11:00:53 +02:00
Dimitris Tassopoulos c2e9c1fa49 boards: nucleo_f401re: added pwm-led0
Added onboard led to the devicetree to be supported also with pwm-led0

Signed-off-by: Dimitris Tassopoulos <dimtass@gmail.com>
2020-06-11 10:58:58 +02:00
Maureen Helm 3dd3c6a393 drivers: i2c: Check non-null pointer before dereferencing in i2c shell
Fixes the i2c shell to check the device name pointer is non-null before
dereferencing it.

Coverity CID: 210558

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-06-10 18:33:42 -04:00
Lukasz Majewski 43427c4d49 clk: eth: Add ETH_MCUX_RMII_EXT_CLK option to enable external RMII clock
This option will configure MCUX block (by setting RMIISRC [19] bit to 1
in SIM_SOPT2 register) to use external clock source for RMII from
ENET_1588_CLKIN).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-06-10 13:02:22 -05:00
Francois Ramu 0856e99155 drivers: timer: stm32 lptim stops counting on timeout FOREVER
When setting a timeout K_TICKS_FOREVER,the lptimer clock is stopped
(no reset of the lptim).
Then is the lptim possibly re-started when another source asks for.
The lptim clock must then be re-started and continue counting.
This is the case when wakeup from sleep mode, for example.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-06-10 09:33:40 -05:00
Krzysztof Chruscinski 1089b91ba2 drivers: gpio: nrf: Add mask to track GPIOTE usage
So far, register state was used to determine if GPIOTE channel is busy.
This leads to issues if channel is used in more customized way after
allocation. In particular, if it temporarly disabled since disabled
channel is treated as available and can be allocated to another user.

Added additional mask which tracks allocated channels. After allocation
user can reconfigure the channel.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-10 11:57:45 +02:00
Francois Ramu 732df68fff drivers: counter: rtc for stm32f2 soc series
This patch set the EXTI line 17 as the RTC alarm pin
on the stm32f2x serie from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-06-10 09:40:21 +02:00
Adam Porter 9da0f2af31 drivers: modem: use zsock_ variants of socket API
By using the Zephyr-native zsock_ family of types and functions, these
drivers will be decoupled from NET_SOCKETS_POSIX_NAMES.

Signed-off-by: Adam Porter <porter.adam@gmail.com>
2020-06-10 09:27:51 +03:00
Krzysztof Chruscinski 43cad10f73 drivers: serial: nrf: Remove flow control configuration from kconfig
Removed flow control configuration from Kconfig and updated samples
to use device tree for that.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-09 19:06:16 +02:00
Krzysztof Chruscinski 176d2d9f85 drivers: serial: nrfx_uarte: Use hw-flow-control from device tree
Cleaned up flow control configuration. Added support for using only
cts or only rts.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-09 19:06:16 +02:00
Krzysztof Chruscinski f86e61be93 drivers: serial: nrfx_uart: Use hw-flow-control from device tree
Cleaned up flow control configuration. Added support for using only
cts or only rts.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-09 19:06:16 +02:00
Michael Hope d0f87fa9d8 drivers: flash: report if the read returns an error
This matches the other commands that log on error.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-09 18:57:54 +02:00
Peter Bigot 204612b3b2 drivers: flash: at45: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Peter Bigot c11ef527b1 drivers: flash: nrf_qspi_nor: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Also reduce the check that the affected region is within the device
span to its minimal equivalent conditions.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Peter Bigot f6cfdf79ba drivers: flash: spi_nor: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Andreas Sandberg 19c165a119 drivers: entropy: stm32: Add support for STM32L0 SoCs
Add the necessary clock configuration to support STM32L-based
SoCs. This change likely adds support for other STM32 SoCs as well
since the HSI48 clock is configured for all SoCs that support it
(except the STM32L4x) instead of just the STM32G4X.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-09 14:44:25 +02:00
Andreas Sandberg f1d80b3f02 drivers: clock_control: stm32: Enable SYSCFG on STM32L0
The entropy driver needs to use the SYSCFG block to control VREF on
the STM32L0. Clock the block if the entropy driver has been enabled.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-06-09 14:44:25 +02:00
Aurelien Jarno e4b62a8ce2 drivers: timer: lptim: depend on SYS_POWER_MANAGEMENT
The LPTIM driver is supposed to be only available when the SoC is
allowed to enter power sleep mode, as described in commit f30f5fff72
("drivers: timer: lptim is [EXPERIMENTAL] for stm32 soc series only").

For that it should depends on SYS_POWER_MANAGEMENT (which gates the
SYS_POWER_SLEEP_STATES and SYS_POWER_DEEP_SLEEP_STATES options) instead
of DEVICE_POWER_MANAGEMENT.

Fixes #25989

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2020-06-09 08:15:56 -04:00
Hubert Miś 7f66fd84e8 drivers: ieee802154: fix nrf5 initialization with external irq source
MPSL is a library that provides external radio IRQ source for the
802.15.4 driver. If this library is in use, the driver shall not
configure the radio IRQ.

Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
2020-06-09 13:46:39 +02:00
Markus Becker f253096a9c net: ieee802154: Align thread names of radio drivers
The NRF5 and RF2XX drivers are using different thread names compared
to the other 802.15.4 drivers. Aligned the thread names to <chip>_rx.

Signed-off-by: Markus Becker <markus.becker@tridonic.com>
2020-06-09 11:38:25 +02:00
Henrik Brix Andersen 0cf9be32c9 drivers: adc: lmp90xxx: set thread name
Set the thread name for the data acquisition thread in the TI LMP90xxx
ADC driver to aid in debugging and profiling.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-06-09 10:54:21 +02:00
Peter Bigot bc34501892 drivers: use macro to define device structures
Replace individual device instance definitions with the macro that
expands to the equivalent change.

    F='struct device DEVICE_NAME_GET'
    git grep -l "$F" \
     | xargs sed -i -r \
       -e "s@$F"'\(([^)]*)\);@DEVICE_DECLARE(\1);@'

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-08 15:01:52 -04:00
Markus Becker 2115b575a4 net: ieee802154: Allow to disable auto-start of 802.15.4 interfaces
Some radio drivers need configuration before start-up. Up to now only
the RF2XX drivers allowed this, but other radio drivers need this as
well. In particular for setting EUI64 addresses.

Signed-off-by: Markus Becker <markus.becker@tridonic.com>
2020-06-08 19:55:19 +03:00
Jukka Rissanen d81be8fd9c drivers: modem: gsm: Do not reference possible null pointer
The ppp_dev was used even if its value could be NULL.

Fixes #25781
Coverity-CID: 210031

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-06-08 16:50:35 +03:00
Kumar Gala a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Julien D'Ascenzio 37e50a6775 driver: timer: stm32_lptim: fix excess ticks
Some ticks are counted additionally when the autoreload
interrupts were too close together.
This patch improve the counts of the clock cycle.
lptim_fired worked badly in particular because the flag ARRM
was not raised when the interrupt was forced.

Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
2020-06-04 22:10:45 +02:00
Julien D'Ascenzio 01ff7ba6e1 driver: timer: stm32_lptim: fix deadlock when waiting ARROK flag
If ticks is K_TICKS_FOREVER the register autoreload isn't set.
So, on the next call to the z_clock_set_timeout function
the wait for the flag ARROK will be infinite.

Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
2020-06-04 22:10:45 +02:00
Krzysztof Chruscinski dc9d373eab drivers: clock_control: nrf: Allow calibration disabling
Allow to disable calibration even though RC is used.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-06-04 11:20:01 +02:00
Andrew Boie fed960b94a net: tag net socket objects
Used for permission validation when accessing the associated file
descriptors from user mode.

There often get defined in implementation code, expand the search
to look in drivers/ and subsys/net/.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-06-03 22:33:32 +02:00
Henrik Brix Andersen 974e05a9d8 drivers: can: flexcan: handle rx overflow and undhandled irqs
Add handling of RX overflows and IRQs reported as undhandled by the
NXP MCUX HAL.

Fixes: #22625

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-06-02 21:49:53 +02:00
Andrzej Głąbek 49627feb03 drivers: uart_nrfx_uarte: Prevent spurious UART_RX_BUF_REQUEST
This is a follow-up to commit cf7dd4981f.

When disabling RX, it is necessary to clear the RXSTARTED event after
the ENDRX_STARTRX shortcut is deactivated, as the event might already
have been generated at this point. If the event is not cleared and
the disabling of RX is done from the user handler called in the context
of the ENDRX interrupt, a spurious UART_RX_BUF_REQUEST event will be
generated (although RX is already disabled) for which a corresponding
call to uart_rx_buf_rsp() would fail, as the second buffer is already
set. Depending on the application implementation, this can result in
other unexpected problems.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-06-02 21:49:39 +02:00
Pete Johanson f525a4b25a usb: stm32wb: Properly lock Sem5 before initializing USB.
* AN5289 notes that Sem5 should be held before configuring
  CLK48 for USB timing.

Signed-off-by: Pete Johanson <peter@peterjohanson.com>
2020-06-02 20:11:30 +02:00
Johann Fischer 6da7e41592 drivers: console: fix USB initialization
Initialize USB even if USB_UART_DTR_WAIT is not enabled.

Fixes: #25811

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-06-02 18:02:16 +02:00
Julien D'Ascenzio edd72848fe driver: timer: stm32_lptim: don't reset backup domain
We don't need to reset backup domain to set LSE clock source.
It's dangerous to reset backup domain, it removes:
	- RTC configuration
	- backup registers
	- RCC Backup domain control register

Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
2020-06-02 17:13:49 +02:00
Peter Bigot 7d84d16aac drivers: flash: nrf_qspi_nor: clean up lock/unlock idioms
Having a completion wait function release a lock internally only when
the operation fails is confusing.  Remove that feature, and make the
lock and unlock operations explicit and paired.

This makes it much more clear how to properly handle transactions that
require multiple calls to the HAL.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-01 16:39:02 +02:00
Peter Bigot 5c80789f32 drivers: flash: nrf_qspi_nor: ensure source buffer is aligned
The stack buffer used to pad small reads must still be aligned to a
word address as the underlying driver uses DMA transfers with that
requirement.  Don't assume the compiler will naturally align it.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-01 16:39:02 +02:00
Peter Bigot ed7fe169af drivers: flash: nrf_qspi_nor: reject zero length transfers
The check for small transfers inadvertently allowed a transfer of zero
bytes, which should be an error (invalid parameter).

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-01 16:39:02 +02:00
Piotr Mienkowski bf1eceeebc drivers: ublox-sara-r4: update to the new timeout api
Update to the new timeout api. This fixes compilation errors.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-06-01 12:30:40 +02:00
Martí Bolívar 3852e08126 drivers: spi_ll_stm32: fix COND_CODE_1 usage
The consequent and alternate expressions for COND_CODE_1 must be
enclosed in parentheses, like this:

COND_CODE_1(PREDICATE, (consequent), (alternate))

The parens are missing in exactly one place in the tree. Fix it.

Reported-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-29 23:07:19 +02:00
Francois Ramu f30f5fff72 drivers: timer: lptim is [EXPERIMENTAL] for stm32 soc series only
Activation of the LPTIMER is valid for SLEEP MODE only
The choice of the lptim clock source is STM32_LPTIM_CLOCK
set the LSE in first position to have as default value

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-29 14:13:05 +02:00
Francois Ramu 7be27b5169 drivers: timer: stm32_lptim fix TICKLESS=n processing
based on PR#25412
Some kernel tests use `CONFIG_TICKLESS_KERNEL=n` with
`CONFIG_SYS_CLOCK_TICKS_PER_SEC=1` to detect when a test runs longer
than 1 second.  These tests break if a tick is announced every time a
timeout occurs.  Only announce if the measured duration since the last
tick is at least the duration of a tick.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-29 14:13:05 +02:00
Francois Ramu 29ea09ee52 driver: timer: stm32_lptim control the timer duration
This change makes the lptimer running with lower tick periods
and small tick values

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-29 14:13:05 +02:00
Francois Ramu fcfcc1d6ea driver: timer: stm32_lptim set_timeout limit values
set the min and max values of the given ticks from 0
to LPTIM_TIMEBASE which is the full register value
In case the timeout is FOREVER, then lptimer is stopped

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-29 14:13:05 +02:00
Julien D'Ascenzio 3894c6ee50 driver: timer: fix accumulated counter increment
The current value of the counter must not be added to the accumulator.
It will be added when calling z_timer_cycle_get_32.

Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
2020-05-29 14:13:05 +02:00
Francois Ramu b0081d1f38 driver: timer: stm32_lptim: tickless mode without a compilation flag
In the timeout function, remove the compilation flag
and use the macro instead.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-29 14:13:05 +02:00
Julien D'Ascenzio b976e76866 driver: timer: stm32_lptim: fix hang when no tickless
When the tickless kernel isn't used, we don't want to wait for ARROK.
This wait can be endless.

Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
2020-05-29 14:13:05 +02:00
Julien D'Ascenzio e20d7890ef driver: timer: stm32_lptim: fix autoreload value
Autoreload value must be decrement by one

Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
2020-05-29 14:13:05 +02:00
Vincent Wan 002de4decf drivers: spi: cc13xx_cc26xx: set power config based on SPI base addr
The power configuration is dependent on which SPI is physically used.
In order to allow DT_INST_FOREACH_STATUS_OKAY() to iterate through
instances without the assumption that index 0 corresponds to SPI0
(which would be incorrect in the case when only SPI1 is enabled),
we need to check the base address to identify which SPI is being dealt
with.

Fixes #25673

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-05-28 10:30:14 +02:00
Hans Wilmers 2972cdc763 drivers: modem: ublox-sara-r4: fix getaddrinfo
The implementation of offload_getaddrinfo in this driver failed
when the node it was called with was an IP address. This condition
was never detected, and as a consequence a DNS query was done on
the IP address instead of returning it directly.

Also, the port was set first after running the DNS query.
As a consequence, if the IP address would have been returned directly,
this would have been done without a port been set.

Both errors are fixed in this patch.

Signed-off-by: Hans Wilmers <hans@wilmers.no>
2020-05-27 18:35:39 +02:00
Krzysztof Chruscinski d8560f698b drivers: clock_control: nrf: Fix error during initialization
Prevent usage of system work queue before it is ready by delaying
initialization of temperature device. Work queue is not used until
application stage.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-05-27 14:49:54 +02:00
Vincent Wan e7ecdec536 drivers: uart: cc13xx_cc26xx: use PRE_KERNEL_1 init level for all UARTs
There does not seem to be a simple way to express the fact that UART1
can be initialized later at the POST_KERNEL level. The existing code
is wrong in the sense that it always initializes DT instance 1 later,
instead of doing it for UART1 (which may not be instance 1).

In addition, UART instances on other platforms are
also initialized at the PRE_KERNEL_1 level regardless of the instance
index, so let's do the same on this platform for consistency.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-05-27 14:17:20 +02:00
Vincent Wan bacf412c7b drivers: uart: cc13xx_cc26xx: set power config based on UART base addr
The power configuration is dependent on which UART is physically used.
In order to allow DT_INST_FOREACH_STATUS_OKAY() to iterate through
instances without the assumption that index 0 corresponds to UART0
(which would be incorrect in the case when only UART1 is enabled),
we need to check the base address to identify which UART is being dealt
with.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-05-27 14:17:20 +02:00
Jakub Cebulski 265d2cfa69 drivers: litex_timer: Fix IRQ lock intolerance
This reimplements z_timer_cycle_get_32() so it works
when IRQs are locked and solves the hung
k_busy_wait() problem.

Fixes #23622.

Signed-off-by: Jakub Cebulski <jcebulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>

Co-authored-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2020-05-26 21:43:30 +02:00
Bilal Wasim 64d5192f60 drivers: wifi: eswifi: Fully populate sockaddr_in on async msg
Updating the eswifi driver to provide port information (along with
IP / net context) whenever an async message is received. This is
needed to fully populate the "remote" info in "net_context"
required whenever net_context_send is called.

Also adding code to populate "remote" info in "net_context"..

Tested with STM32 disco IOT kit. Fixes #25621

Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
2020-05-26 21:40:23 +02:00
Andrzej Głąbek d000ff38dc drivers: serial: nrfx: Force poll_out when lock attempts are over
When the loop that tries to obtain the lock in poll_out() finishes
because of hitting the max number of trials (what normally should
never happen), force the lock to be taken instead of just giving up
with sending the data. The latter approach that was in use so far
could not deal with a situation when some thread was aborted while
keeping the lock. Other threads would then have no chance to send
anything with poll_out() until it was called from an ISR.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-05-25 18:46:28 +02:00
Flavio Ceolin c07f71e3fe drivers: peci: Add verification handlers
Add verification handlers for syscalls defined in peci driver.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-05-25 18:06:22 +02:00
Andrzej Głąbek f766a3e18b sensor: temp_nrf5: Allow use only when the TEMP peripheral is present
Correct dependency of the TEMP_NRF5 Kconfig option so that it can be
enabled only on nRF SoCs that feature the TEMP peripheral.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-05-25 16:03:02 +02:00
Erwan Gouriou 2716cbcaa6 drivers: susbsys: Check errors on devices selected using dt macro
Some Kconfig defined devices may be defined using dt_chosen_label
function. Since there is no way to ensure a device enabled in dts
is also defined in Kconfig, it may happen that instance is not
actually defined.
In this case device_get_binding might return 0, leading to undefined
behavior in the function that calls it.
When not already done, systematically check return of function
device_get_binding on devices defined through dt_chosen_label macro.
Trigger ASSERT when required and return error when possible.

Fixes #20068

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-25 11:43:14 +02:00
Emil Obalski 19f6ed02b8 usb: driver: Fix Nordic driver for fragmented control OUT transfers.
Nordic driver must allow read from control OUT endpoint by
itself. For data stage transactions with length > MPS (64Bytes)
this must be performed for each 64B + Residue data packet.

Residue - data packet with len < 64B.

The exact length of data transfer is known from wLength field
form setup packet in setup stage. Until now driver was incorrectly
initializing the length of the data stage and at some point will
not allow for next data stage.

This commit addresses the issue #23980.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2020-05-22 12:50:35 +02:00
Peter Bigot de9ed4e6a1 kernel: sys_clock: update weak pm control function
The weak implementation returns 0 for all operations without doing
anything, which incorrectly suggests that an operation like
device_get_power_state() returned an accurate description of the
system clock power state.  Return -ENOTSUP instead.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-21 20:32:12 +02:00
Krzysztof Chruscinski a719b8c5e4 drivers: timer: nrf: Remove RTC1 dependency
Removed RTC1 dependencies in the code. Single define picks the instance.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-05-21 17:43:08 +02:00
Krzysztof Chruscinski 699b717452 drivers: timer: nrf: Fix premature timeouts
If timeout is being overwrite exactly when previous one is expiring
then hardware event was cleared correctly but interrupt was already
triggered. Interrupt routine was assuming that compare event is set
and proceed with that assumption. However, in that corner case when
compare event was overwritten and event was cleared, that was not the
case.

As the outcome, timeout could be triggered prematurely. Fixed by
clearing pending interrupt after handling previous compare value.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-05-21 17:43:08 +02:00
Peter Bigot bfb56c5e20 drivers: flash: nrf_qspi_nor: support read of sub-word lengths
mcuboot and possibly other tools read single byte values to determine
the state of objects.  Rather than fail to do the read of values too
short for this peripheral detect the situation and read into a stack
buffer that meets the length criteria, and on success copy the data
into the provided buffer.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-21 17:04:05 +02:00
Wayne Ren bc6f11b730 drivers: arcv2_timer0: minor fix and optimization for SMP case
* still need to clear IP bit in timer irq handler

* last_time should be aligned to ticks, old code will miss some
cycles which are about (curret_time - last_time) % CYC_PER_TICK

* in timeout set, shorten the delay needed when tick is 0, this
 will improve the response of timer irq

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-05-21 12:37:41 +02:00
Wayne Ren ac5dc1dd34 drivers: arcv2_timer0: back to use level triggered irq
the pulse triggered timer irq doesn't work for all targets. In
iotdk, we found the clear of IP bit will clear int request
when elapsed called in thread context. So come back to level
triggered way which is supported in all targets, and use the sw
triggered irq to remember the irq request which may be cleared
in non timer int handler.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-05-21 12:37:41 +02:00
Wayne Ren f511d51ca3 drivers: arcv2_timer0: rename overflow_cyc to overflow_cycles
* rename overflow_cyc to overflow_cycles for better understanding
* use MIN macro to replace if .. else ..
* typo fix in comments

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-05-21 12:37:41 +02:00
Emil Obalski 2a2d92f9c2 usb: driver: nordic: Unlock mutex in case of error.
Mutex that was previously locked must be unlocked in case
of an error.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
2020-05-21 11:02:02 +02:00
Henrik Brix Andersen 784c4728b5 drivers: pwm: mcux_ftm: allow configuring the clock prescaler
Allow configuring the clock prescaler divider for the NXP Kinetis
FlexTimer. Setting the prescaler to a lower value allows for much
higher resolution/accuracy for the generated PWM waveforms.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-05-20 19:03:14 +02:00
Jukka Rissanen c6a19a2046 cmake: qemu: Allow user to add parameters to Ethernet TAP
User can now add extra Ethernet TAP parameters when starting QEMU.
This is useful if we want to set for example the MAC address
of the network interface.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-05-20 15:36:39 +02:00
Peter Bigot edd9aecddf device: avoid casting away const from config_info pointer
Re-run the const_config_info Coccinelle patch to fix code.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-20 13:30:17 +02:00
Daniel Leung 74306a6578 gpio: intel_apl: fix incorrect address access
The address used to access to REG_MISCCFG is not correct.
So fix it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-19 19:19:51 +02:00
Daniel Leung 7cd0ef0939 gpio: intel_apl: fix ISR function signature
Fix build error regarding the function signature of ISR.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-19 19:19:51 +02:00
Daniel Leung af43e14bd0 serial: ns16550: do not write to device cfg struct when PCIE=y
When PCIe is enabled for UART, the port address is probed during
initialization and is written back into the device config struct.
However, the device config struct is supposed to be const and
read only. This results in page faults when MMU is enabled as
the struct cannot be written into. So fix this by storing port
address in device data struct if a particular UART instance is
of PCIE.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-19 19:19:51 +02:00
Daniel Leung 36674f6bf8 serial: ns16550: return error when init fails
The init function returns successful even if the first
configuration function call fails. This may leave
a non-usable UART to be discoverable with
device_get_binding() which will definitely result
in lots of head scratching. So change the init function
to return properly.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-19 19:19:51 +02:00
Daniel Leung cee9d9b039 timer: hpet: enable benchmarking during ISR
This adds the calls to read_timer_{start,end}_of_tick_handler()
to mark the start and end of ISR which will be used to display
the time spent in ISR with benchmarking tests.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-19 19:19:51 +02:00
Vincent Wan f6bbad831a drivers: ieee802154: cc13xx_cc26xx: use HwiP_construct to connect CPE0
IRQ_CONNECT() can only be called at one location to connect the irq for
CPE0. This commit modifies the driver to call into the HwiP layer in TI
HAL so that TI's RF driver can do the same when connecting the irq.

Fixes #25216

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-05-19 17:28:29 +02:00
Vincent Wan e21da06a16 drivers: ieee802154: fix build for cc13xx/cc26xx
New update of hal_ti requires DeviceFamily_CC13X2/DeviceFamily_CC26X2
to be defined in order to include the rfc.h header.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-05-19 17:28:29 +02:00
Peter Bigot ec55314d28 drivers: timer: nrf_rtc: fix TICKLESS=n processing
Some kernel tests use `CONFIG_TICKLESS_KERNEL=n` with
`CONFIG_SYS_CLOCK_TICKS_PER_SEC=1` to detect when a test runs longer
than 1 second.  These tests break if a tick is announced every time a
timeout occurs.  Only announce if the measured duration since the last
tick is at least the duration of a tick.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-19 17:19:02 +02:00
Alexandre Bourdiol 5559430654 driver: counter: counter_ll_stm32_rtc.c: Add 1 tick to alarm
Add +1 tick to alarm in order to compensate the partially started tick.
Alarm will expire between requested ticks and ticks+1.
In case only 1 tick is requested, it will avoid that +1 Tick event
occurs before alarm setting is finished.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-05-19 14:48:49 +02:00
Bilal Wasim 190ade91b8 drivers: eth: stm32: Fix invalid assertion comparison
The check for assertion on the "config_func" was added to
validate that the function pointer is valid. However, in
the code we are invoking the "config_func" and comparing
its output with NULL. This causes build failures with
CONFIG_ASSERT=1. Caused by PR-25393.

Tested on Nucleo F767Zi board.

Fixes #25427

Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
2020-05-19 14:47:51 +02:00
Jennifer Williams d2c74eb987 drivers: serial: uart: ns16550 add missing isr locking
The existing uart driver ns16550 did not have ISR locking that
effected IO APIC working in fixed delivery mode in SMP system
x86_64. This commit adds ISR locking mechanism using spinlock
for the interrupt related services.

The CONFIG_IPM_CONSOLE_STACK_SIZE is increased to lift
limitation of stack size experienced in IPM driver test with
this spinlock impelentation.

Fixes #23026

Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
2020-05-18 19:35:37 -04:00
Erwan Gouriou ac98a786d4 drivers/spi: stm32: Fix use of single dma channel
Current dma struture code didn't allowed only rx channel removal,
disabling tx channel (in spi client node) was leading compilation
issue.
Fix this by moving conditional code inside SPI_DMA_CHANNEL macro and
get the part of code which is present or removed (SPI_DMA_CHANNEL_INIT)
outside of {}.
Additionally, fix indentation on '\' in whole instance init macros

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-18 19:14:37 +02:00
Bilal Wasim 10a05017bc drivers: eth: stm32: Fix driver crash caused by RX IRQ trigger
All initialization of the Ethernet interface is done in the
eth_initialize function which is invoked by the boot code.
This function sets up DMA, programs the Ethernet module and
enables IRQs. However, this function does not setup "netif"
interface info which is done when the ethernet device is
enumerated by the NET stack via the "iface_api.init" func.
However, after the eth_initialize func is called, it is
possible that the system receives RX interrupts, and the
"rx_thread" accesses the "netif" pointer to get iface info.
However, because the "netif" info is not necessarily
populated at this time, we get a crash (as OS does NULL
access).

Fixed by enabling Ethernet IRQ after the interface is
properly setup.

Tested on Nucleo F767Zi board.

Fixes #25408

Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
2020-05-18 19:11:40 +02:00
Sandeep Tripathy 17fcaa3fc4 drivers: timer: get ppi configuration from dt
Use device tree provided configurations for arm architecture timer
PPIs.

This fixes issue of timer ppi not working on most hardware where
edge-triggered PPI are not supported.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
2020-05-18 11:07:57 +02:00
Daniel Leung e4734e088a gpio: intel_apl: don't enable interrupt if line is output
Hardware does not seem to support triggering interrupts to
itself by setting line as both input/output and setting
output to desired level. So just say interrupt triggering
is not supported when line is set to output.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-16 19:56:19 +02:00
Wentong Wu 72227574d8 timer: remove QEMU_TICKLESS_WORKAROUND
Qemu icount mode enabled, remove QEMU_TICKLESS_WORKAROUND.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2020-05-14 13:52:07 +02:00
Marek Pieta 6da15634bf drivers: usb_dc_nrfx: Abort write on ep_ctx_reset
Change adds abort of ongoing write operation in ep_ctx_reset. This is
required to keep the state of Zephyr driver consistent with state of
nrfx driver. This fixes a bug where nrfx_usbd was stuck in busy state.

Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
2020-05-14 13:28:46 +02:00
Christoph Reiter d49e7da7da sensor: add sensor driver for Infineon DPS310
Add driver for Infineon DPS310 temperature and pressure sensor.

Signed-off-by: Christoph Reiter <christoph.reiter@infineon.com>
2020-05-14 11:02:29 +02:00
Daniel Leung ba5b141e2f gpio: mchp_xec: fix erroneous interrupt triggers
If interrupt is previously enabled and triggering condition
changes, it might fire callback based on previous condition.
To avoid this issue, disable interrupt before trying to
change settings, and enable afterwards.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-05-14 10:48:26 +02:00
Martí Bolívar 6e8775ff84 devicetree: remove DT_HAS_NODE_STATUS_OKAY
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:

- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
  for macros which are equivalent to
  DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name

Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.

This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-13 18:24:42 +02:00
Peter Bigot 4f16b419e8 device: avoid casting away const from config_info pointer
The driver-specific config_info structure referenced from the device
structure is marked const.  Some drivers fail to preserve that
qualifier when casting the pointer to the driver-specific structure,
violating MISRA 11.8.

Changes produced by scripts/coccinelle/const_config_info.cocci.

Some changes proposed by the script are not included because they
reveal mutation of state through the const pointer, though the
code works as long as the driver-specific object is defined without
the const qualifier.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-13 18:21:52 +02:00
Francois Ramu 1a163673c7 drivers: spi: driver reloading dma buffers in the main transceive loop
With this change, the spi transceive with dma function
waits for the spi busy flag reset and for the dma transfer end.
Then it reloads the channels until all buffers are consumed.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-13 16:22:10 +02:00
Francois Ramu c83e2a41ae drivers: spi: driver dma callback function to set transfer flag
This change avoids the reload of the dma channel
in the callback function, just sets the corresponding Tx, Rx flag.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-13 16:22:10 +02:00
Johann Fischer 5a3d44256e drivers: usb_dc_sam: free endpoint memory on End of Reset event
Free endpoint memory on End of Reset event (EORST).

Fixes: #24626

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-05-13 11:13:36 +02:00
Johann Fischer 29d95ba1d4 drivers: usb_dc_sam: tweak logging for enable, disable, configure
Tweak logging for enable, disable, configure.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-05-13 11:13:36 +02:00
Gerson Fernando Budke 9a37154151 drivers: wifi: esp: Update to new timeout api
Update to new timeout api.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-05-12 17:18:34 +02:00
Anas Nashif 8ec88164ac i2c: shell: add braces around if statement
Add braces around if statements per coding guideline.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-05-10 17:49:30 +02:00
Simon Glass 9360150c0c i2c_shell: Add write/read multiple-byte commands
Allow writing multiple registers (or a single 16-bit register) and
reading multiple registers.

   i2c read I2C_2 36 40
   00000000: 12 34 00 00 0F 3D 80 80 AF 9C 17 00 90 01 00 00

   i2c write I2C_2 36 40 12 34 56 78 90 12 34 56 78 90

   i2c read I2C_2 36 40
   00000000: 12 34 00 00 90 12 80 80 AF 9C 17 00 90 01 00 00

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10 17:49:30 +02:00
Anas Nashif ffd568db09 i2c_shell: Add write_byte/read_byte commands
Add simple commands to read or write a single byte from a device
register.

   i2c write_byte I2C_2 36 b0 12
   i2c read_byte I2C_2 36 0
   Output: 0x82

I modified Anas' version to put args in variables first so that the code
is self-documenting.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10 17:49:30 +02:00
Anas Nashif 0ecc71ccb2 i2c_shell: Tidy up the code style
Fix some code-style nits in this file.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10 17:49:30 +02:00
Xavier Chapron 2a8ff02ef2 drivers: Replace printf by printk when applicable
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
2020-05-09 21:25:33 +02:00
Kumar Gala df56ce3efb drivers: ethernet: mcux: rework how unique mac is determined
Instead of having a Kconfig property, if there is no local-mac-address
property in the devicetree than we'll generate a unique MAC address
based on unique ID registers on the SoC.

We remove the local-mac-address properties in the SoC dtsi files to
match the default behavior that existed before (ie, unique MAC address)

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 16:29:57 +02:00
Kumar Gala b19cf0bed3 drivers: eth: Get Manual MAC address from devicetree
Move from a Kconfig to select/initialize the MAC address to using the
"local-mac-address" property in devicetree.  If the property is set the
drivers will initialize the mac-address from the devicetree (unless the
mac address is all 0's).  The MAC address might get overwritten by
either a driver specific means or by the setting of
"zephyr,random-mac-address" in the devicetree.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 16:29:57 +02:00
Kumar Gala 1de61b4c42 drivers: eth: Replace driver specific RANDOM_MAC Kconfig with devicetree
Utilize the devicetree property "zephyr,random-mac-address" to determine
if a driver should use a random mac address and remove the associated
Kconfig options that enabled this feature.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 16:29:57 +02:00
Kumar Gala 8178f76470 drivers: eth: Refactor generation of random mac into help function
Rather than having each driver have its own slightly different way of
generating a random mac address, add a helper function that they all can
call so we do it one way.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 16:29:57 +02:00
Parthiban Nallathambi f4adfd52cb drivers: serial: add XMC seris UART support
Add infineon XMC4 series UART support. Driver supports
only poll mode using XMCLib.

Out of 4 available UART's on SoC, only UART1 is confgired
by default in UART mode until GPIO & pinctrl support.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-05-09 14:21:44 +02:00
Jose Alberto Meza eaaf1af79e drivers: espi: mchp: Report correct length during OOB Rx operation
Use correct HAL macro to report amount of bytes received.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-05-09 07:20:13 -04:00
Erwan Gouriou 6ea53792f4 modules: stm32: Rename lib Kconfig symbol
Both ST and STM32 modules where using same HAS_STLIB Kconfig
symbol.
Now that each module is createing is own lib, we need to be able
to distinguish libs.

Depends on zephyrproject-rtos/hal_stm32/pull/52

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-09 13:08:42 +02:00
Albin Söderqvist 35c4838425 drivers: display: st7789v: add power management support
This adds sleep mode along with power managament control.

Signed-off-by: Albin Söderqvist <albin.soderqvist@endian.se>
2020-05-09 13:07:17 +02:00
Kumar Gala db725c0ec9 drivers: Replace GPIO_CS Kconfig with devicetree detection
Use DT_INST_SPI_DEV_HAS_CS_GPIOS() in drivers to determine if we should
utilize CS_GPIO base SPI chipselect handling.  This allows us to remove
Kconfig option for this feature.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 13:07:05 +02:00
Bilal Wasim 1966d48498 drivers: wifi: eswifi: WiFi Scan completion indication
Updating the eswifi driver to indicate "scan completion"
to WiFi Management once scanning is done.

Tested with STM32 disco IOT kit.

Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
2020-05-09 13:06:26 +02:00