Commit graph

3814 commits

Author SHA1 Message Date
Andrew Boie
68b3b6135e errno: implement _get_errno() in common code
We really should have more faith in the compiler, it generates
code to implement this exactly like the arch-specific assembly
versions, and on ARM is actually 4 bytes shorter.

FUNC_NO_FP used to disable the usual C preamble to update the
frame/stack pointers, which is how the sizes are still the same
or less. It's debatable how useful the occasional use of
FUNC_NO_FP is in practice since it hinders debugging and in a
production build frame pointers should be globally disabled, but
we can address that later.

Change-Id: I6c4b64ab3e3a9b6f91d52fa8c92e6e79a986fc77
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-04 17:04:14 +00:00
Chuck Jordan
6fd732f780 arch/arc/include: start_task_arch.h needed so ARC can build microkernel apps
Change-Id: Ibf23fb3545f98a4d5ade7640abde4819b95d0b8e
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-04 14:55:33 +00:00
Chuck Jordan
822b19ef74 arch/arc: add ICCM_BASE_ADDRESS and ICCM_SIZE
I am working on porting Zephyr to ARC EM Starterkit. This board has ARC 
CPUs with ICCM memories. On quark_se_ss ICCM is missing and ignored.

Change-Id: Ic49fc8ef3e6ad879ffc673b8baf34dd467f76c04
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-04 14:54:54 +00:00
Iván Briano
5e92acf9cf quark_x1000: The Quark X1000 does have an FPU
Change-Id: I2e23e7a950a055f31f01ccb871d476a9b9d8018b
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2016-05-04 10:24:30 +00:00
Andrew Boie
f6cf65d57c nios2: add prep_c to zero BSS and copy XIP data
Copied verbatim from arch/arc/core

Change-Id: I00c920064f75455010806951ad052289d0290654
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-03 23:18:46 +00:00
Andrew Boie
d380e555c6 nios2: turn on function and data sections
Change-Id: I5bd841873207d1106a82b3e05187ee401b6c5478
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-03 23:18:46 +00:00
Andrew Boie
f00671ab16 nios2: move cflags hacks to main Nios2 Makefile
These are for any Nios II at this stage of bring-up.

Change-Id: Ie4d0c80df164f81f6615ac35d3f42235b04870f1
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-03 23:18:46 +00:00
Andrew Boie
9433895954 nios2: basic build, non-functional
Basic build framework for Nios2. Everything is stubbed out,
we just want to have a build going so that we can start to
parallelize implementation tasks.

This patch is not intended to be functional, but should be
able to produce a binary for all the nanokernel-based
sanity checks.

Change-Id: I12dd8ca4a2273f7662bee46175822c9bbd99202a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-03 23:18:45 +00:00
Geoff Thorpe
ded3070c1c nanokernel: tighten _is_thread_essential()
Of the 3 related functions;
  _thread_essential_set()
  _thread_essential_clear()
  _is_thread_essential()

The first two are parameter-less and always operate on
"_nanokernel.current". The last one takes a 'thread' parameter but will
operate on _nanokernel.current if the parameter is NULL. All calls to
_is_thread_essential() pass NULL!

This change makes the 3 functions consistent by removing the parameter
to the 3rd function. This should also be marginally more efficient,
though consistency was the motivation. This change corrects the doc
preamble to all 3 functions.

(These functions would probably be better as inlines. Also, the choice
of when to use wrappers seems a bit arbitrary. E.g. there's nothing
for setting/testing the "FIBER" flag.)

Change-Id: Ie3589f8a28b227c6d7a3a31b664d3b3e6e9c6d17
Signed-off-by: Geoff Thorpe <geoff.thorpe@nxp.com>
2016-05-03 17:42:54 +00:00
Daniel Leung
8f0ab3038c arm/nxp_kinetis/k6x: simplify uart init
The UART console init should be done after UART init. So it can be
folded into general UART init, thus one fewer SYS_INIT().

Change-Id: Ifb18c5308dfef790325e6bff5bc7b5976fcd421e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-05-03 12:43:31 +00:00
Daniel Leung
ad6ed299b7 arm/nxp_kinetis/k6x: always inline clock init function
The clkInit() is always called so this can be inlined.
This saves 32 bytes of ROM space compared to non-inlined version.

Change-Id: I2cb6d02c0996acad16029be243f6059183938089
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-05-03 12:43:31 +00:00
Daniel Leung
b6f56d478a arm/atmel_sam3: always inline clock init function
The clock_init() is always called so this can be inlined.
This saves 32 bytes of ROM space compared to non-inlined version.

Change-Id: I1b95142da4c22f4b7fc7f7f6210503d90cf65cc9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-05-03 12:43:31 +00:00
Juan Manuel Cruz
2170ca79ff build: support icx llvm compiler
Change-Id: I0bcc1f2e0ea93830e61fb3eaf8b523b7c4e1c301
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
2016-05-03 00:02:40 +00:00
Anas Nashif
79ba6c5d47 gpio: unify kernel configuration for all architectueres
This also enables GPIO on ATMEL SAM3 when GPIO is set.

Change-Id: I4125af4910d57bed98b0ee4967fb696e3f345e67
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-30 13:43:26 -04:00
Anas Nashif
ea54982e99 quark_se: remove hardcoded reset vector for ARC
Change-Id: Iba4d46b50990167aa9e21635a6a8e6c1dd90c5e3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-30 11:00:35 +00:00
Andrew Boie
7327c9ee1f nanokernel: move C atomic operations to centralized code
These C variants of atomic operations can work on any arch,
have platforms select them if they don't have ASM equivalents.

Change-Id: I38eb03bb58beff865681ee56ef7bc0fcded1e906
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-04-27 21:40:19 +00:00
Andrew Boie
97dcf63a5a arch/Makefile: simplify
The arch names and the directories are the same, make it so we
don't have to keep appending stuff to this file as new arches
are defined.

Change-Id: I640526f5cb83fe34f5af14b62e5d06295a4912b0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-04-27 21:40:19 +00:00
Andre Guedes
981caded95 arch: st_stm32: Include errno.h
The files soc_config.c and soc_gpio.c use errno code so they should
include errno.h.

Change-Id: I94237aa294701cc71ed17ea42eca9d8073d4ae47
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-04-26 22:49:49 +00:00
Anas Nashif
04e6243aa5 gpio: rename device name for AON GPIO
Change-Id: Iccd3790d3e7adbe790fe78755d297aad0ae97834
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 19:17:05 +00:00
Anas Nashif
1a1f7fd916 arc: make SRAM/DCCM values configurable
Remove hardcoding and make the values configurable. Also make the
Kconfig variables consistent with other architectures.

Change-Id: I69334002303d4d8abaf7363d9134fd5f46ce4eeb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 19:17:03 +00:00
Anas Nashif
9d8c332b21 i2c: use I2C_X nameing instead of I2CX
Other IOs use this format, so lets be consistent and use

I2C_0 instead of I2C0 and I2C_1 an instead of I2C1.

Change-Id: I591ab08e14bd533ef0fac38e596559da783863b8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 17:01:48 +00:00
Anas Nashif
ce836e2c69 toolchain: move iamcu output format/arch to SoC
Instead of defining the output format in the toolchain environment
setup, define this per SoC that supports the ABI.

This will allow us to directly referencing an installed toolchain
without the need for declaring ZEPHYR_GCC_VARIANT

Change-Id: Icd1a7a21acbf075a51854fb2ebb3ef06788ce9b5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 17:01:48 +00:00
Anas Nashif
e8bc8af602 quark_d2000: remove unused code
For Quark D2000 we use QMSI drivers, so the initialisation code is no
longer needed.

Change-Id: I22aaa35288e230c455a19b9e67dc6cfb7dc0ff12
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:55:36 -04:00
Anas Nashif
b0c0040894 quark_se: quark_d2000: remove all defines that now come from qmsi
QMSI defines all the registers of the SoC and other values in
qm_soc_regs.h, so cleanup soc.h and rely on the data from the BSP
contained in qm_soc_regs.h.

Change-Id: I672925cf1c0144a9ed64073ea289c691285a8082
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:55:36 -04:00
Anas Nashif
a6915c070d qmsi: spi: use built-in qmsi driver
Change-Id: Ic7e86e015d4beb11a01d75aa50bc50f95c784e5e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:55:36 -04:00
Anas Nashif
1797c8f108 qmsi: uart: use built-in qmsi driver
Change-Id: Ie19aee8dad8ba082891f92a2d42dc71f4ac34dbe
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:55:36 -04:00
Anas Nashif
b3e02b406a qmsi: adc: use built-in qmsi driver
Fix naming and use a global driver name for instance.

Change-Id: I30a54cb9c20773e1b6fdc57b934aa564612a6c45
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:55:36 -04:00
Anas Nashif
85b3c2c62a qmsi: gpio: use built-in qmsi driver
Change-Id: I11444bcc146dbc477bb605f6b405bee559716f2a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:55:36 -04:00
Anas Nashif
f4feacf8b2 qmsi: aon_counters: use built-in qmsi driver
Change-Id: I5df98e9eacf429f017a094c861dcf54ab61566c1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:29 -04:00
Anas Nashif
b512681f8c qmsi: aio: use built-in qmsi driver
Change-Id: I24b227d9367a4f0144cb9fa968a51827f8c2dfc5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:29 -04:00
Anas Nashif
940d539834 qmsi: pwm: use built-in qmsi driver
Change-Id: I154840f704b9cfec269addaf3cbd7e71bb6310af
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:29 -04:00
Anas Nashif
a7d3329694 qmsi: i2c: use built-in qmsi driver
Change-Id: I2e650198117128cec79a64abcd2cc065b5f9804c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:29 -04:00
Anas Nashif
98c09140f1 qmsi: watchdog: use built-in qmsi driver
Change-Id: I0cff75181bb2a51c91e6589f9624f0891db0b6e9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:29 -04:00
Anas Nashif
80e9d63dec qmsi: rtc: use built-in qmsi driver
Change-Id: If8e70c946f73abf03a695fecaeff30a9881f6e94
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:28 -04:00
Anas Nashif
987016b954 drivers: add qmsi files for Quark MCUs
This is from QMSI porject at https://github.com/01org/qmsi

The version included in this change is 1.0.1:

https://github.com/01org/qmsi/releases/tag/v1.0.1

commit: c902bc5143546b76a3708ddb465ea9b7a8bd314a

Origin: https://github.com/01org/qmsi
Change-Id: I983deb2cffe2f84b7b7f2dd381367863eab7c6d1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:28 -04:00
Anas Nashif
7c27d8ab3a soc: arm: add Makefiles one level up
It was not possible to add directories under an SoC family
because of the direct call to Makefile in the SoC series from the
architecture level.

While we have SoC still using the old structure, add a conditional
to still support old structure and allow Makefiles directly under
an SoC family directory. 

This is useful for adding drivers and BSP files common to one family.

Change-Id: I85dc8341523b41949de91d78675153ce0baa5aac
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 21:33:26 +00:00
Johan Hedberg
264c207f4f Bluetooth: Add custom "monitor" protocol logging over UART
With most boards there's no simple way to get access to the HCI
traffic. Simultaneously these boards only have one external UART for
the console. This patch introduces a protocol which combines both
normal logs and HCI logs over a single binary protocol sent over the
console UART.

The protocol is modeled based on the btsnoop/monitor protocols used by
BlueZ, and the first tool that's able to decode this is btmon from
BlueZ ("btmon --tty <tty>").

For platforms with two or more external UARTs it is still possible to
use CONFIG_UART_CONSOLE as long as the UART devices used are
different, however on platforms with a single external UART
UART_CONSOLE should be disabled if BLUETOOTH_DEBUG_MONITOR is enabled
(in this case printk/printf get encoded to the monitor protocol).

Origin: Original
Change-Id: I9d3997c7a06fe48e7decb212b2ac9bd8b8f9b74c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2016-04-22 18:49:11 +03:00
Juan Manuel Cruz
b17258b536 debug: interrupt event logger support for arc
Jira: ZEP-53
Change-Id: Id6ee505a7e89122a47fc22162b4c257ac2126d09
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
2016-04-22 12:39:22 +00:00
Anas Nashif
d2f1c76686 new SoC naming convention
Use SOC_FAMILY and SOC_SERIES to identify soc families and series
and to point to the correct linker files and files related to a
specific SoC.

Change-Id: I8b1a7339f37d6ea4161d03073d36557a40c0b4a6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:59 +00:00
Anas Nashif
a02c34ef0b soc: introduce SoC families and series
Add additional layers when defining SoCs to allow reuse among SoCs
of the same family and architecture.

The Board is the first location where we search for a linker.cmd file,
if not found we look for the linker file in
arch/<arch>/soc/<family>/<series>

Change-Id: I51d5e9a056220d0bd2ae0fa31474ffe63568e698
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:59 +00:00
Anas Nashif
b85ffc8104 stm32: reorganise soc directory and use family/series
Use SoC family/series and reoganise the structure to follow new
hierarchy.

Change-Id: I8637f1487a8287a6614ce6636cd018cf342fec95
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:59 +00:00
Anas Nashif
65c06afa58 kinetis: reorganise soc directory using soc family
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.

Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Anas Nashif
4b411b34a1 stm32: rename SOC_STM32F1X -> SOC_SERIES_STM32F1X
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.

Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Anas Nashif
9bf2da7ef4 stm32: rename CONFIG_SOC_STM32 -> CONFIG_SOC_FAMILY_STM32
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.

Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-18 21:24:58 +00:00
Benjamin Walsh
43592b1127 x86/debug: GDB server needs to handle some exceptions
GDB server needs ownership of some exceptions to display information when
taking a fatal exception (DIVIDE_ERROR, PAGE_FAULT).

Introduce a Kconfig option that can work for any debugger.

Change-Id: I39aef22a820543a7fe9ac333b487592946abc0f3
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:22 +00:00
Benjamin Walsh
f703f7d0f6 debug: add target GDB server
The GDB server implements a set of GDB commands, such as read/write
memory, read/write registers, connect/detach, breakpoints, single-step,
continue. It is not OS-aware, and thus provides a 'system-level'
debugging environment, where the system stops when debugging (such as
handling a breakpoint or single-stepping).

It currently only works over a serial line, taking over the
uart_console. If target code prints over the console, the GDB server
intecepts them and does not send the characters directly over the serial
line, but rather wraps them in a packet handled by the GDB client.

Change-Id: Ic4b82e81b5a575831c01af7b476767234fbf74f7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:22 +00:00
Benjamin Walsh
270d602efd debug/x86: add runtime info needed by target debuggers
Introduce an x86 interrupt stack frame that contains more information
than the non-debug one, namely the caller-saved GPRs, as well as an API
to retrieve it. Able to handle nested interrupts stack frames.

Change-Id: If182aaa2f34e4714b16ca65ff79da63b72d962f7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:22 +00:00
Benjamin Walsh
e83ddd1471 x86: add debug hook in _NanoFatalErrorHandler()
Allow a debug server such a GDB to take control when a fatal error
occurs. The debug server simply has to define a _debug_fatal_hook()
function that will override the weak function installed by default.

Change-Id: Ib9dca5755868f747b697fa3178e09109f1eedb07
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:21 +00:00
Baohong Liu
d45eab2a7c drivers: Quark flash support
Quark flash sub-driver. It is based on the QMSI driver.

In order to enable this driver, the following options
must be set.

CONFIG_QMSI_DRIVERS
CONFIG_QMSI_INSTALL_PATH
CONFIG_FLASH
CONFIG_SOC_FLASH_QMSI

Origin: Original

Change-Id: Iffbea3b17624c755e367677b76d7216c2fba2ca1
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-04-16 02:01:25 +00:00
Daniel Leung
0c9876cc8d ipm: convert to use DEVICE_AND_API_INIT()
Change-Id: I2c81bc0d232473c76c0a4ffbf13faf4eabedda85
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 22:06:16 +00:00