Commit graph

5973 commits

Author SHA1 Message Date
Savinay Dharmappa
bf389e0853 drivers: watchdog: Add dts support for QMSI based watchdog.
patch adds the device binding for qmsi watchdog and device node
for socs which are using wdt qmsi driver.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 14:16:03 -04:00
Savinay Dharmappa
7b6776a36a drivers: wdt: Migrate esp32 wdt driver api to new wdt interface
patch migrates the esp32 wdt driver to new wdt interfaces

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-10-14 14:16:03 -04:00
Anas Nashif
1d0136ef3b Revert "linker: allow SoC to insert linker script fragments"
This reverts commit 2fed930f4e.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 12:14:04 -04:00
Anas Nashif
a220e2690f Revert "arm: cypress/psoc6: add SoC specific linker input sections"
This reverts commit 08c165f2b0.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 12:14:04 -04:00
Anas Nashif
0d4b5daeaa Revert "linker: warn about orphan sections"
This reverts commit 8ce758a8ff.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 12:14:04 -04:00
Rajavardhan Gundi
47bd922f70 xtensa: intel_s1000: Remove redundant call to soc_get_ref_clk_freq
Call to soc_get_ref_clk_freq function is redundant in soc.c as it
simply returns a global static variable. Hence removed that call.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-10-12 07:52:17 -04:00
Rajavardhan Gundi
6bcb9c6a98 xtensa: intel_s1000: Move some functions to SoC level SYS_INIT
Mux configuration for I2C and GPIO are now done in SYS_INIT
which were earlier done in the respective tests.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2018-10-12 07:52:17 -04:00
Paweł Zadrożniak
68cb7b3e38 drivers: usb: Add nRF52840 USBD driver
* Add usbd_dc_nrfx shim

The shim is based on the previous one usbd_dc_nrf5.
For handling the USBD hardware, tested nrfx_usbd driver from nRF SDK
was used.

Briefly tested examples:
* usb/cdc_acm
* usb/dfu (USB communication only due to flash handling issues)
* usb/hid-mouse
* bluetooth/hci_usb

Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
2018-10-12 13:14:12 +02:00
Jun Li
08d5c5ef1d soc: stm32f4: enable dma options for soc
Enable "CONFIG_DMA_STM32F4X" when "CONFIG_DMA" is enabled.

Signed-off-by: Jun Li <jun.r.li@intel.com>
2018-10-11 12:58:30 -05:00
Armando Visconti
31f2e81e10 soc/arm/stm32f4xx: Add I2S defines to dts.fixup
For the stm32f4xx family the SPI and I2S are sharing same
controller, so we can reuse same definitions.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-10-11 16:55:00 +02:00
Armando Visconti
411dc003ee arch: arm: soc: stm32f4xx: Add LL include file also for I2S case
stm32f4xx_ll_spi.h include file is shared between I2S and SPI
(controller is same). So we need to include it even when I2S_STM32
is enabled.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-10-11 16:55:00 +02:00
Kumar Gala
0acc0fdd4b soc: silabs: efm32hg: Move USART fixups from board to SoC
The USART fixup in the board dir really are SoC level fixup's.  So move
them there and remove the board fixup file since there isn't anything in
it now.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-10 13:04:09 -05:00
Yannis Damigos
84737529d3 dts: st: f2/l4: Add missing maximum-speed property
Add missing maximum-speed property to usb nodes
for F2 and L4 series.

Fixes: #10472

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-10-10 12:27:55 -05:00
Marcio Montenegro
17b2ac6967 arm: exx32: Add Silabs EFM32HG soc files
The Silicon Labs EFM32 Happy Gecko MCU includes:
        * Cortex-M0+ core at 24MHz
        * Up to 64KB of flash and 8KB of RAM
        * Full speed (12 MHz) USB 2.0 Device
        * Multiple low power peripherals

Signed-off-by: Marcio Montenegro <mtuxpe@gmail.com>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-10 12:00:06 -05:00
qianfan Zhao
3974978ea3 same70: Add SPI1, SPI2 support
Add SPI1/2 pinmap, dts.fixup for atmel sam series soc

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2018-10-10 11:29:49 -05:00
Oleg Zhurakivskyy
65ea181c92 drivers: eth: e1000: Add driver for Intel PRO/1000 Ethernet controller
This patch adds a driver for Intel PRO/1000 Gigabit Ethernet controller.

The driver currently supports only a single instance of the NIC.

Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2018-10-10 04:17:15 -04:00
Kumar Gala
c3076d6eb2 gpio: silabs gecko: Add device tree support for GPIO
Convert gpio_gecko driver over to using device tree. Added binding
files, updates to dts for various SoCs that use gpio_gecko.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-09 22:34:56 -04:00
Yannis Damigos
1c4f22edaf arch: stm32f4/f7/l4: Add usb maximum speed defines to dts fixup
Add CONFIG_USB_MAXIMUM_SPEED defines to dts fixup files.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-10-09 12:59:34 -04:00
Daniel Leung
8ce758a8ff linker: warn about orphan sections
This adds a linker flag and necessary changes to linker scripts
so that linker will warn about orphan sections.

Relates to #5534.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-09 08:23:41 -04:00
Daniel Leung
08c165f2b0 arm: cypress/psoc6: add SoC specific linker input sections
The Cypress PSoC6 specifies some input sections in the startup
scripts. These sections (.heap, .stack, etc.) need to be placed
at correct location.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-09 08:23:41 -04:00
Daniel Leung
2fed930f4e linker: allow SoC to insert linker script fragments
This allows the SoC to specify some additional linker script
fragments into the bss, data and read-only data sections.

For example, the Cypress PSOC6 has a few input sections that
must be put into bss and data sections. Without specifying
these in the linker script, they are consider orphan sections
and the placement is based on linker heuristic which is
arbitrary.

POSIX is not supported as the main linker script is
provided by the host system's binutils and we have no control
over it. Also, currently Xtensa SoCs have their own linker
scripts so there is no need to this feature.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-09 08:23:41 -04:00
Anas Nashif
071c9dc0f3 soc: logging: move soc tree to new logger
Use the new logger framework for soc related code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Pushpal Sidhu
3ed0375c8d arch: arm: mpu: add support for 640k SRAM
The STM32L4+ parts have 640k of SRAM.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2018-10-08 12:52:00 -04:00
Pushpal Sidhu
f1d78d8f38 arm: st: add stm32l4r5xx support
New parts from ST. See http://www.st.com/en/microcontrollers/stm32l4r5-s5.html
for more details.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2018-10-08 12:52:00 -04:00
Sebastian Bøe
8eb734cd82 DT: Rename from dts.fixup to dts_fixup.h
The Zephyr configuration system uses many different files in many
different formats. It makes it a lot easier for users to understand
what these files do if when we use the correct file extensions.

To this end we rename the dts.fixup files to the correct file
extension '.h'.

This is a breaking change for out-of-tree fixup files. Such files will
be detected and given an appropriate error message.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-10-08 11:38:56 -04:00
Kumar Gala
11e98fa925 riscv32: sifive-freedom: Move dts.fixup into soc dir
The dts.fixup for the hifive1 board was not board specific but related
to the SoC.  Move the dts.fixup into the SoC dir so any other boards
using this same SoC will take advantage of it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-05 13:21:49 -05:00
Chen Han
d7a6b7e101 dts: stm32f1: fix UART4 define
fix stm32f1 UART4 define in dst.fixup

Signed-off-by: Chen Han <qq1433255094@outlook.com>
2018-10-05 08:49:26 -05:00
Kumar Gala
db2ca70a23 dts: pulpino: Add device tree support for GPIO controller
Add the needed bits to get device tree support for the GPIO controller
on the Zedboard-Pulpino.  This will allow us to move LED & button info
into the board.dts.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-04 07:48:32 -05:00
Kumar Gala
be4f53fa50 riscv: Add device tree support to pulpino
Add simple device tree support for the Pulpino SoC and Zedboard-Pulpino
board port.  This gets the UART info from device tree instead of soc.h

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-04 07:48:32 -05:00
Kumar Gala
de78ecd79c arm: beetle: Use device tree for IRQs
Get the IRQs for the devices we define in the device tree from the dts
file.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-10-03 09:47:25 -05:00
Vincent van der Locht
b941561e74 soc: sam4s: added missing devices in sam4s range
added sam4s16b, sam4s8c, sam4s8b, sam4s4c, sam4s4b,
sam4s4a, sam4s2c, sam4s2b and sam4s2a.
Used the same order as in the data sheet and code structure
equal to same70. Updated the sam4s_xplained board to match
the altered .dtsi location of the specific SoC.

Signed-off-by: Vincent van der Locht <vincent@vlotech.nl>
2018-10-02 16:17:54 -05:00
Aurelien Jarno
335222d189 dts/arm/st_stm32: Add timers and PWM nodes to STM32 F7 series
This patch adds timers and PWM nodes to STM32 F7 series, as well as the
corresponding dts fixup entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-10-02 14:08:00 -07:00
Maureen Helm
89ccead382 drivers: boards: Merge HAS_DTS_SPI_DEVICE with HAS_DTS_SPI
Every board that uses dts-enabled spi drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_SPI_DEVICE and
HAS_DTS_SPI.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-10-01 21:15:06 -05:00
Maureen Helm
75bc6ba454 drivers: boards: Merge HAS_DTS_I2C_DEVICE with HAS_DTS_I2C
Every board that uses dts-enabled i2c drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_I2C_DEVICE and
HAS_DTS_I2C.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-10-01 21:15:06 -05:00
Ramakrishna Pallala
3a8e37caae soc: x86: quark_se: Select the supported Power States
Select the Low Power States supported by Intel Quark SE SoC series.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-09-28 06:54:15 +05:30
Ramakrishna Pallala
a404d4df6b soc: arc: quark_se_c1000_ss: Select the supported Power States
Select the Low Power States supported by Quark_SE_C1000_SS SoC series.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-09-28 06:54:15 +05:30
Maureen Helm
0be600016c soc: x86: arc: Remove spi base address and irq macros
Now that we get the spi base address and irq numbers from dts, we can
remove the preprocessor macros from soc.h

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-28 06:27:06 +05:30
Maureen Helm
55caa7b743 drivers: spi: Select HAS_DTS_SPI in designware driver
Makes the designware spi driver consistent with other spi drivers by
selecting HAS_DTS_SPI in the driver. This required adding spi nodes and
dts fixups to several arc and x86 socs, as well as enabling those nodes
in associated boards.

Also refactors the driver to use the base address, interrupt number, and
interrupt priority from dts.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-28 06:27:06 +05:30
Maureen Helm
c73d5c7880 boards: mimxrt1050_evk: Enable lpuart3 for bluetooth hci
Enables instance 3 of the lpuart driver, adds dts fixups, and configures
pinmuxes to use bluetooth hci on the mimxrt1050_evk board. Updates board
documentation accordingly.

Tested with samples/bluetooth/peripheral_hr, with frdm_kw41z attached as
an arduino shield running the nxp hci controller application.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-27 05:55:55 +05:30
Maureen Helm
3b72a54506 soc: nxp_imx: Use generated clock controller in dts fixup
Use the generated "_CLOCK_CONTROLLER" macro for the lpuart clock name.
This change is similar to commit
e81d9b98fe, but applied to nxp_imx.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-27 05:55:55 +05:30
Ryan QIAN
5b62ea0e7a arch: arm: nxp: imxrt1060: add device support
- Add SoC information for RT1060

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2018-09-26 18:14:22 -05:00
Ioannis Glaropoulos
ccffca4a5d soc: arm: mps2: remove un-necessary Kconfig option selection
Remove the selection of MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
in SOC_MPS2_AN3385, as this is selected automatically by
ARM_MPU option (for ARMv7-M MCUs).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-09-24 14:34:53 -05:00
Nazar Chornenkyy
93f938c44e arm: Add Cypress PSoC6 SoC support
Added initial support and created the corresponding device tree part for
building PSoC6 SoC as part of Zephyr.

Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
2018-09-21 18:50:59 -04:00
Dominik Kilian
67ca29a0e7 dts: nrf: Expand nRF DTS to support ARM TrustZone CryptoCell 310
Commit introduces support for ARM TrustZone CryptoCell 310
for Nordic Semiconductor nRF SoCs in device tree.

Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
2018-09-21 00:29:58 -07:00
Adithya Baglody
0e60644ff8 soc: mps2_an385: Enable Memory Protection unit.
This patch will enable the MPU in MPS2_AN385 soc.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-20 20:35:25 -04:00
Adithya Baglody
023bc923b0 soc: mps2_an385: Added support for MPU
Added required files/support for the MPU in MPS2-AN358 (Cortex-M3).

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-20 20:35:25 -04:00
Ramakrishna Pallala
f0a2f2b423 soc: arm: nrf52: Select the supported Power States
Select the Low Power States supported by nrf52 SoC series.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-09-20 10:20:23 -04:00
Ramakrishna Pallala
6320043669 qemu: nios2: Enable UART 16550 driver for QEMU
Enable UART 16550 driver for Nios-II QEMU platform.

Note: This PR is tested with patched version Qemu 3.0.0 which
adds support for altera_10m50_zephyr machine type.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-09-20 08:51:51 -04:00
Piotr Zięcik
1c16cfcc30 arch: arm: Make ARM_MPU the sole option controlling MPU usage
This commit removes all MPU-related (ARM_CORE_MPU and NXP_MPU)
options exept ARM_MPU, which becomes master switch controlling
MPU support on ARM.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Piotr Zięcik
d393186d51 arch: arm: Introduce CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options
This commit introduces CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options,
which indicate which flavour of MPU is supported by given SoC family.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00