The linker script for the intel_s1000 was missing an include for the
snippets-rodata.ld file which is needed for any applications using the
`zephyr_linker_sources(RODATA <linker_script>)` cmake function.
Signed-off-by: Yuval Peress <peress@google.com>
The common linker script for cavs_v?? was missing an include for the
snippets-rodata.ld file which is needed for any applications using the
`zephyr_linker_source(RODATA <linker_script>)` cmake function.
Signed-off-by: Yuval Peress <peress@google.com>
This PR removes common-rom.ld section so that logging sections
can now be mapped into RAM area.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This PR removes common-rom.ld section so that logging sections
can now be mapped into RAM area.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Adds hda link in and out drivers. The link in and link
out channels of HDA have small differences
with the host channels. Updates the existing
cavs_hda drivers and code to account for these
differences.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Platform specific functions necessary to enable this feature were
implemented (z_xtensa_ptr_executable() and
z_xtensa_stack_ptr_is_sane() for Intel ADSP platforms.
Current implementation just ensures stack pointer and program counter
are within relevant areas defined in the linker scripts, without going
too fine grained.
Also, `.iram1` section, used by the backtrace code, also added to
Intel ADSP linker script.
Finally, update west manifest to use up-to-date SOF, which contains a
patch to fix build issues related to the linker changes.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Align definitions with definitions used in SOF upstream and define
CONFIG_XTENSA_WAITI_BUG for cAVS1.8, cAVS2.0 and cAVS2.5 platforms. On
these platforms, a workaround is needed with waiti.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The autoconf.h header is not required because the definitions present in
the file are exposed using the compiler `-imacros` flag.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This macro conflicts with C++'s std::condition_variable::wait_for
and makes it very difficult to use Zephyr with C++. Replace it with
an all uppercase name which fits the naming standard better.
Signed-off-by: Yuval Peress <peress@google.com>
Rather than defining them in the header, require a set of defines
be provided to cavs_hda.h as part of the expected input to the API.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds an initial driver for HDA streams on cAVS. A common code base is
provided for all HDA streams while the drivers are identified
differently as they have small behavior differences.
Uses dma_status to describe the positions for read/write. Uses dma_reload
to inform when to move the read/write positions. This closely follows
how HDA is being used in SoF
Simple test case is provided for both drivers.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds a header only low level driver for HDA streams along with smoke
tests to ensure basic host in and out stream functionality.
The tests require host side interaction. In cavstool a new HDAStream
class encapsulates somewhat a single stream and its registers. This
is manipulated in the tests using IPC with the Host ensuring that a
specific order of operations is done.
This low level driver allows testing certain hardware configurations
and flows with easy to use register dump debugging. It is not
intended to be the end API an application might use. That would be
a DMA driver using this.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The IPC enum definition and WAIT_FOR macro are useful outside of
the board smoke tests for intel_adsp. They can be commonly used
by other board tests for a variety of peripherals that require
DSP and Host interaction (using cavstool).
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
SMP support might not work if esp_mp.c initialization code
is placed in ROM area. This fix that scenario.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Only cAVS15 is different in terms of definitions, so the ifdef logic can
be simplified quite a bit. Also reorder some of the definitions to
improve readability. No functional change.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The SOF ipc4 driver and Windows driver can't work with
SOF built with zephyr and ipc4 configuration on cAVS 1.8+
platforms. Because the UUIDs of BRNGUP and BASEFW are
copied from APL (cAVS 1.5), which is incompatible with
cAVS 1.8+ platforms.
This patch updates BRNGUP and BASEFW to use cAVS 1.8+ UUIDs.
Signed-off-by: Chao Song <chao.song@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@intel.com>
Re-running the script that checks for the const qualifier missing on
ISR's parameter.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Removing backend config from board Kconfig.defconfig and moving
it to xtensa_sim backend configuration in logging. Without this
change define persisted even when logging was not using backends
and that impacted what is compiled in.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Commit bdce0a5742 ("soc/intel_adsp: Add a cavs_ipc driver to manage
host IPC") added a new driver for cAVS IPC. Although patch included the
CONFIG_CAVS_IPC option, in practise this had no effect and instead
driver was enabled whenever device tree included IPC hardware. This
caused IPC errors in SOF application builds where two drivers, one out
of tree in SOF and one in Zephyr, initialize the same hardware.
Fix the issue by enabling the driver only when CONFIG_CAVS_IPC is
enabled.
BugLink: https://github.com/thesofproject/sof/issues/5477
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This configures soc and flash size definition
using DTSI information instead of hardcoded
values.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This modifies esp32s2 SOC configuration to support MCUBoot.
CmakeLists is moved from board to soc specific. It also
includes MCUBoot changes.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This change updates startup code to setup MMU mappings.
west: update hal_espressif revision so that rom calls, i.e
esp_rom_Cache_*, can properly be used in MMU mapping.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This change creates XiP image handling and proper
LMA and VMA regions configurations.
This also adds common-ram.ld and common-rom.ld sections that
require explicit handling due to image sections limitation
in esptool.
Move additional drivers into IRAM to protect against
flash cache disable read/write operation.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The same options were copied to each Kconfig.defconfig, in different
places (my own doing) for both DMA and I2S. This dedups the defines and
moves them into the common soc Kconfig.defconfig.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Acorrding to RM, HIFI4 DSP default configured frequency is:
- 666Mhz for i.MX8
- 800Mhz for i.MX8M
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Make xtensa/intel_adsp/common/rimage_modules.c CAVS-specific by adding a
guard.
Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Make xtensa/intel_adsp/common/boot.c CAVS-specific by adding a guard.
Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add a fairly simple test of the IPM-over-IPC driver. This hits all
the code, but works by implementing the host side of the protocol
partially in the C test code. The message is sent with an initial
payload, and then IPC commands from the firmware copy the data over
into the "inbox" region to simulate data being sent via the host.
Then we make sure it lands correctly as if the host driver had done it
directly.
This requries a new command in the cavstool script that will copy a
word from the "outbox" region to the "inbox" region (both are just
different SRAM windows, conceptually no different than the way the
script is already managing log output), but no significant surgery.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Now that we have easy access to code on the host, it's trivial to
check the clock against host timestamps with high precision.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
On cAVS 1.8 (specifically) there seems to be a propagation delay on
the IPC registers. Hitting the TDA register to signal DONE too soon
after clearing the interrupt via TDR can cause the interrupt to be
dropped. Merely polling for it to read back correctly isn't
sufficient, we need an actual sleep here.
(The behavior that a message won't send while an existing message is
in progress is actually a hardware feature that is new with 1.8. My
guess is it's a little glitchy in its first version.)
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
On cAVS before 2.5, core power was controlled by the host. Add a
command to the cavstool.py script to allow us to do that under test
command so we can exercise multiprocessor startup/shutdown outside of
SOF.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Remove the soc_relaunch_cpu() API. There's now nothing that this does
that isn't already done by the kernel's own z_smp_start_cpu() API. We
don't need a SOC-level API for this anymore.
Rename soc_halt_cpu() to soc_adsp_halt_cpu() to clarify the domain,
simplify by removing the synchronization (there's nothing to
synchronize!). Also move its declaration and docs into the soc.h
header.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Things had gotten a little tangled in there so let's do some cleanup.
Remove the distressingly-special-purpose z_reinit_idle_thread() hook
(which existed to support secondary core bringup when
SMP_BOOT_DELAY=y), and just fold that into a generic z_init_cpu(),
which we can call in obvious and symmetric ways from main
initialization, z_smp_init(), and z_smp_start_cpu() (the now-official
programmatic hook for starting cpus).
Remove the "#if CONFIG_MP_NUM_CPUS > 1" exclusions. These weren't
saving any code size and were propagating themselves into platform
layers trying to avoid build failures.
There are some "special" APIs added for SOF which need to go away in
favor of the newer/generic z_smp_start_cpu(). Collect them in one
place and put them under a "#ifdef CONFIG_SOF" to prevent them from
being used in Zephyr apps.
Move some function declarations that didn't have homes into
<kernel/thread.h>.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
As Zephyr begins to absorb drivers for these platforms that had
previously been managed by the SOF app, there's a need for a rapid
board-specific smoke test to use during development.
This starts with the smp_boot_delay test (itself a unit test for a
SOF-derived feature) and adds a host IPC case (that needs to match
code in cavstool.py on the other side of the PCI bus!).
It will grow more features over time as needed.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This is a slightly higher level Zephyr device that manages the host
IPC device for applications. There's an interface to make synchronous
and asynchronous calls, to receive commands via (interrupt context)
callbacks and emit async "done" notifications after processing is
complete. It should work for pretty much any application
architecture.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Add a new board to support Intel Tiger Lake H PCH variant of cAVS2.5.
Move common Kconfig options for cavs25 to soc level. No need to
replicate these for every board.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The Xtensa implementation of arch_irq_offload() required that the user
select the correct interrupt manually, and would race with itself if
invoked from separate CPUs (it was saved here by the main
irq_offload() function which has a semaphore to serialize access).
Use the new gen_zsr.py script to automatically detect the highest
available software interrupt, and keep a per-CPU set of
callback/parameter pointers.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
